Phase Patents (Class 324/622)
  • Patent number: 6362631
    Abstract: Absolute delay of a FTD is characterized by applying a stimulus signal to a first port of the FTD. A second port of the FTD is coupled to a delay element having a known delay and a reflective termination. A drive signal is applied to a third port of the FTD. A time domain reflection response to the stimulus signal is obtained and a signal peak within the response that corresponds to a return signal from the reflective termination is identified. Absolute delay of the frequency translation device is then extracted based on the known delay of the delay element and a time that corresponds to the occurrence of the identified signal peak. Delay versus frequency is characterized by isolating a segment of the obtained time domain reflection response that corresponds to a return signal from the reflective termination. Inverse frequency transforming the isolated segment of the time domain reflection response provides delay characteristics of the FTD versus frequency.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: March 26, 2002
    Assignee: Agilent Technologies, Inc.
    Inventor: Michael E Knox
  • Patent number: 6351683
    Abstract: A system and method for monitoring the conditions in a gas plasma processing system while varying or modulating the RF power supplied to the system, so that resulting signals of the electrical circuits of the system provide information regarding operational parameters of the system or the state of a process. Significant improvements in sensitivity and accuracy over conventional techniques are thereby achieved. In addition, the plasma processing system can be thoroughly tested and characterized before delivery, to allow more accurate monitoring of and greater control over a process, thereby improving quality control/assurance of substrates being produced by the system. The information obtained by the modulation technique can be displayed on a monitor screen, in order to allow an operator to accurately monitor the system/process and diagnose any problems with the system/process.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: February 26, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Wayne Johnson, Richard Parsons
  • Patent number: 6304202
    Abstract: Delay correction in a dual-channel analog-to-digital converter (ADC) is accomplished by insertion of coarse and fine delay correction registers prior to and after a frequency reduction element in a voltage channel. A dual-channel ADC includes first and second delta-sigma modulators and a digital filter, subject to multiple sampling rates for optimizing coarse and fine adjustments of delay. An energy calculation is performed in a sampled data domain, which is implemented using digital multiplication techniques in a delay compensation scheme performed in the digital domain. The digital data subject to filter processing is delayed by predetermined amounts. The dual-channel ADC is provided with a programmable channel delay adjustment in the voltage channel thereof. A delay differential equal to &Dgr;I−&Dgr;V is calibrated and compensated subject to an acceptable time delay for production of a correct energy value.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: October 16, 2001
    Assignee: Cirrus Logic, Inc.
    Inventors: Douglas F. Pastorello, Eric T. King
  • Patent number: 6185510
    Abstract: A PLL jitter measuring method used for an integrated circuit with a PLL that generates an internal clock signal is disclosed, that comprises the steps of extracting jitter information of the internal clock signal of the PLL as an output signal to the outside of the integrated circuit without removing a package of the integrated circuit, and measuring the jitter of the internal clock signal with the extracted output signal.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: February 6, 2001
    Assignee: NEC Corporation
    Inventor: Tomoo Inoue
  • Patent number: 5789927
    Abstract: An RF power amplifier distortion measurement system measures amplitude and phase distortion of a microwave/RF power amplifier by phase quadrature down-conversion of each of an RF amplifier's input signal and amplified output signals to baseband in-phase (I) and quadrature (Q) components, and performing RF amplifier distortion measurements on these down-converted baseband I and Q signals. The derived error measurement signal is remodulated to RF by phase quadrature up-conversion circuitry to produce an up-converted RF signal that corresponds to the RF distortion component contained in the RF output signal produced by the RF power amplifier.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: August 4, 1998
    Assignee: Spectrian
    Inventor: Donald K. Belcher
  • Patent number: 5469051
    Abstract: A device which detects conductors, the device has a portion which applies a current to a conductor consisting of a first frequency signal and a second frequency signal. The frequency of the second frequency signal is double the frequency of the first frequency signal. The device has another portion which detects a DC voltage across the conductor. An adjusting portion adjusts a phase of the first frequency signal relative to a phase of the second frequency signal to produce a zero detected DC voltage across a representative length of conductor known to be free of defects.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: November 21, 1995
    Assignee: International Business Machines Corp.
    Inventor: Edward J. Yarmchuk
  • Patent number: 5337014
    Abstract: An improved circuit for phase noise measurements utilizing a frequency down conversion/multiplier and direct spectrum measurement technique. The circuit is particularly useful for field test environments where laboratory instrumentation is normally not available, and fast and accurate phase noise measurements are required. The phase noise measuring circuit includes a frequency mixer which has a first input signal from a device under test and a second input signal from a reference stable oscillator having ultra low phase noise with a fixed center frequency. The frequency mixer produces a down converted signal comprising the frequency difference signal of the first and second input signals. A lowpass filter passes the down converted signal to a frequency multiplier circuit which produces a second harmonic signal, a fourth harmonic signal, and higher harmonic signals of the down converted signal.
    Type: Grant
    Filed: December 24, 1992
    Date of Patent: August 9, 1994
    Assignees: Harris Corporation, Advanced Testing Technologies, Inc.
    Inventors: Esteban G. Najle, Robert M. Buckley
  • Patent number: 5179344
    Abstract: An improved circuit for phase noise measurements utilizing a frequency down conversion/multiplier and direct spectrum measurement technique which uses a combination of a phase detector method and a direct spectrum approach. The circuit is particularly useful for field test environments where laboratory instrumentation is normally not available, and fast and accurate phase noise measurements are required. The phase noise measuring circuit includes a frequency mixer which has a first input signal from a device under test and a second input signal from a reference stable oscillator having ultra low phase noise with a fixed center frequency. The frequency mixer mixes the first and second input signals to produce a down converted signal comprising the frequency difference signal of the first and second input signals. A lowpass filter then passes the down converted signal to a frequency doubler circuit which produces a doubled frequency, down converted signal.
    Type: Grant
    Filed: June 21, 1991
    Date of Patent: January 12, 1993
    Assignee: Harris Corporation
    Inventors: Esteban G. Najle, Robert M. Buckley