Including R/c Time Constant Circuit Patents (Class 324/677)
  • Patent number: 6853201
    Abstract: A capacitive actuating element is driven using a control signal of duration T1. This duration T1 is related to prescribed or measured values for charging, discharging and open periods T2, T3 and T4: (T1+T3?T2?T4)?|X| and is compared with a magnitude (limit value |X|). If a magnitude greater than |X| is obtained, then a fault is inferred.
    Type: Grant
    Filed: December 6, 2002
    Date of Patent: February 8, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Hirn, Michael Käsbauer
  • Patent number: 6819123
    Abstract: The apparatus for detecting the effects of interconnect resistance and capacitance (RC) in a logic circuit includes a first ring oscillator with the interconnect RC parasitics in a logic circuit and a minimum reference ring oscillator without the interconnect RC parasitic in a logic circuit multiplexed to have common stages to obtain delay with and without the parasitics of the interconnect RC. The frequency difference between the first ring oscillator frequency and the minimum reference ring oscillator frequency is determined to detect the effects of the interconnect RC in the logic circuit.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: November 16, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Andrew Marshall, Victor C. Sutcliffe
  • Patent number: 6791343
    Abstract: A method is contemplated. According to the method, capacitances in a first resistance/capacitance (RC) extraction corresponding to a circuit are modified. Each capacitance is modified to estimate Miller effect on that capacitance. A ratio of a total capacitance on a first wire after the modification in the first RC extraction to a total capacitance on the first wire before the modification in the first RC extraction is calculated. Capacitances in a second RC extraction that are coupled to the first wire are modified according to the ratio. The second RC extraction is a reduced extraction as compared to the first RC extraction. A timing analysis is performed for the circuit using the second RC extraction with capacitances modified to estimate Miller effect.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: September 14, 2004
    Assignee: Broadcom Corporation
    Inventors: Kumarswamy Ramarao, Matthew J. Page
  • Patent number: 6775627
    Abstract: A method for determining the capacitance of an analog/mixed signal circuit, comprising the steps of (A) acquiring a capacitance at a plurality of different input slope rates, (B) verifying each acquired capacitance, (C) determining an average capacitance of said plurality of different input slope rates over a partial average range and (D) determining an accuracy of the capacitance.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: August 10, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Zhiwu Liu, Barry A. Boes, II, Dinesh Maheshwari
  • Patent number: 6771082
    Abstract: Systems, methods and apparatus for stabilizing resistance measurements in electroporation systems so as to achieve high-accuracy measurements, and for controlling the pulse duration, or time constant, of electroporation pulses. Circuitry is provided to accurately determine the resistance of a sample in the electroporation system, for example a sample provided in an electroporation cuvette. Additionally, a resistance control system is provided to automatically measure the resistance of a sample, determine a capacitance and determine a parallel add-on resistance that substantially provides a desired pulse duration (time constant) for an electroporation pulse.
    Type: Grant
    Filed: December 6, 2002
    Date of Patent: August 3, 2004
    Assignee: Bio-Rad Laboratories, Inc.
    Inventors: Charles W. Ragsdale, Tony Chiu
  • Publication number: 20040100286
    Abstract: A method is contemplated. According to the method, capacitances in a first resistance/capacitance (RC) extraction corresponding to a circuit are modified. Each capacitance is modified to estimate Miller effect on that capacitance. A ratio of a total capacitance on a first wire after the modification in the first RC extraction to a total capacitance on the first wire before the modification in the first RC extraction is calculated. Capacitances in a second RC extraction that are coupled to the first wire are modified according to the ratio. The second RC extraction is a reduced extraction as compared to the first RC extraction. A timing analysis is performed for the circuit using the second RC extraction with capacitances modified to estimate Miller effect.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Inventors: Kumarswamy Ramarao, Matthew J. Page
  • Patent number: 6737877
    Abstract: Embodiments of the invention describe a method and apparatus used to determine the position of a wiper on a potentiometer without the need for an external ADC. Two capacitors are each connected to an end of a potentiometer, and then are charged or discharged simultaneously by a current source or current sink attached to the wiper of the potentiometer. The time required for each of the capacitors to charge or discharge to a threshold voltage level is measured and subsequently used to determine the position of the wiper on the potentiometer.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: May 18, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Barry S. Hatton, David G. Wright
  • Patent number: 6624640
    Abstract: An apparatus and method of measuring capacitances are provided in which charge packets of known value are delivered to a capacitor of unknown value until a final voltage is determined, and the capacitance is calculated based on the known total charge and measured voltage.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: September 23, 2003
    Assignee: Fluke Corporation
    Inventors: John M. Lund, Benjamin Eng, Jr.
  • Patent number: 6593755
    Abstract: A system and method are disclosed for shielding a capacitive sensor. The system and method drive the shield to the same potential as the sensor electrode being shielded to eliminate sensor interference due to mutual capacitance. An independently created signal is applied to the shield which matches the signal applied to the sensor electrode. Use of the independent driving signal allows the shield to maintain the same potential as the sensor electrode, especially during rapid transition of the sensor electrode's potential.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: July 15, 2003
    Assignee: Banner Engineering Corporation
    Inventor: Brian P. Rosengren
  • Patent number: 6580279
    Abstract: A capacitance of a firing capacitor for the firing of a firing pellet, where the firing capacitor is contained in an occupant protection system of a motor vehicle, is implemented on a rising edge of a capacitor voltage in a charging phase. For this purpose, a quantity of charge taken up by the storage capacitor during a test time interval is determined by measurement of a charge current or of a corresponding value and integration over the test time interval. The capacitance is obtained through a quotient of the resultant integral and a voltage change in the capacitor voltage that occurred in the test time interval. The functional availability of the firing capacitor is not adversely affected at any time during the testing.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: June 17, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Walter Baumgartner, Klaus Bauer, Stefan Hermann
  • Patent number: 6518777
    Abstract: A method and an apparatus for measuring insulation resistance capable of removing the influences of piezoelectric noise which is occurring due to mechanical vibrations applied to an electronic component to measure the insulation resistance of the electronic component with high accuracy. In order to do so, a predetermined measured voltage is applied to the electronic component arranged in a position subjected to periodic mechanical vibrations from the outside to measure a current flowing through the electronic component. Then, the value of the measured current flowing through the electronic component is integrated over the period of the mechanical vibrations or over a time which is an integral multiple thereof. With this arrangement, a piezoelectric noise current can be cancelled and only a leakage current to be primarily measured can be extracted. Thus, by calculating the value of the insulation resistance from the value of the current, the insulation resistance can be detected with high accuracy.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: February 11, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Gaku Kamitani, Akihiro Hayashi, Koichi Teramura
  • Patent number: 6469516
    Abstract: In a method for judging the conformity or non-conformity of a capacitor from the charging characteristic at the time when a direct-current voltage is applied to the capacitor, a threshold current value I0 of the dielectric polarization component of the capacitor is determined in advance, an evaluation function n(t) is determined based on a logarithmic value of the difference between the measured charging current value m(t) of the capacitor and the threshold current value I0 or the difference between their logarithmic values, and the evaluation function n(t) is approximated to a quadratic curve. When the quadratic coefficient of the quadratic approximation equation has a plus sign the capacitor is judged to be non-conforming, and when the coefficient has a minus sign, the capacitor is conforming.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: October 22, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoshinao Nishioka, Mitsuru Kitagawa
  • Publication number: 20020113604
    Abstract: A device for measuring the power of a motor, comprising a measurer for measuring the current sent to the motor and a measurer for measuring the voltage, related to the current, that is sent to the motor, a rephaser for rephasing the waveform of the voltage measured by the voltage measurer and a multiplier suitable to multiply the current measured by the current measurer means with the voltage rephased by the rephaser, the output signal of the multiplier being processed in order to obtain active power.
    Type: Application
    Filed: January 22, 2002
    Publication date: August 22, 2002
    Applicant: Z. BAVELLONI S.p.A.
    Inventor: Franco Bavelloni
  • Publication number: 20020101251
    Abstract: For measuring a capacitance with high accuracy, a capacitance measuring apparatus includes a voltage source with a current limiting function for applying different voltage values to the capacitance, and an integrator capable of continuous integrating operation for repeatedly integrating a current flowing through the capacitance at given periodic intervals. There is also disclosed a capacitance measuring method that is carried out by the capacitance measuring apparatus.
    Type: Application
    Filed: November 2, 2001
    Publication date: August 1, 2002
    Applicant: Agilent Technologies, Inc.
    Inventor: Akira Shimizu
  • Patent number: 6424161
    Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: July 23, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Tim Damon, Phillip E. Byrd
  • Publication number: 20020093346
    Abstract: Photometric apparatus and photometric method are offered which can measure a wide range of incident light amounts accurately and efficiently.
    Type: Application
    Filed: September 24, 2001
    Publication date: July 18, 2002
    Inventors: Kenji Hyakutake, Hiroyuki Saito, Kazuyuki Akiyama
  • Publication number: 20020079909
    Abstract: An electric fence energiser for coupling to an electric fence line. The energiser includes a sensor to sense the load on the fence line, at least one storage capacitor, and a charge circuit to charge the storage capacitor(s). A control circuit provides an output pulse with energy appropriate to the sensed load and determines whether the current pulse will exceed a predetermined limit adjustment and adjust the output pulse to send out an output pulse with voltage and/or energy below the predetermined limit if the current pulse will exceed said limit.
    Type: Application
    Filed: January 25, 2002
    Publication date: June 27, 2002
    Applicant: Tru-Test Limited
    Inventor: Jack Hartstone Reeves
  • Publication number: 20020067172
    Abstract: Apparatus for measuring voltage across an isolation barrier. The apparatus includes a voltage input and a voltage output and an opto-isolator provided between the voltage input and voltage output. Processing means are provided at the voltage output to measure and/or monitor pulse width. A Circuit arrangement including two transistors and two resistors is provided to allow a substantially constant current to flow through the opto-isolator.
    Type: Application
    Filed: December 4, 2001
    Publication date: June 6, 2002
    Applicant: PACE MICRO TECHNOLOGY PLC.
    Inventor: Ray Alker
  • Publication number: 20020036508
    Abstract: In cases where a delay time in a wire, which connects a first NAND placed on the upstream side and a second NAND placed on the downstream side, is calculated, there are a plurality of logical paths in the first NAND, and a parasitic capacitance of an output pin of the first NAND is determined for each logical path. Therefore, the parasitic capacitance corresponding to each logical path of the first NAND is separated from a fixed load model which indicates a sum of a load of the wire and a capacitance of an input pin of the second NAND, and the parasitic capacitance is added to the fixed load model in the calculation of the delay time. Accordingly, a load for the delay time calculation can be produced while precisely reflecting the parasitic capacitance changing with the logical path on the load production, and the delay time calculation can be performed with high accuracy.
    Type: Application
    Filed: June 12, 2001
    Publication date: March 28, 2002
    Inventors: Michio Komoda, Sigeru Kuriyama
  • Publication number: 20020021135
    Abstract: A variable current source model accurately determines timing delays for designs of circuits implemented in integrated circuits. A design for an integrated circuit specifies a resistive-capacitive (“RC”) network. The RC network couples a driving point and a receiving point, and a circuit specified in the design, drives the RC network at the driving point. The variable current source model determines driving currents for the circuit at the driving point based on the RC network and a characterization model of the circuit. A timing delay between the driving point and the receiving point is determined by simulating the drive of the RC network with the driving current at the driving point.
    Type: Application
    Filed: May 11, 2001
    Publication date: February 21, 2002
    Inventors: Jun Li, Hong Zhao, Hsien-Yen Chiu
  • Patent number: 6191723
    Abstract: A method of measuring capacitance is provided in which measurement speed is increased by as much as two orders of magnitude by optimizing timing parameters to rapidly charge and discharge the capacitor in small increments about an equilibrium voltage. The capacitor is charged at a linear rate by applying a predetermined constant current thereto, and discharged at an exponential rate determined by the RC time constant in the discharge path. Incremental charge and discharge times are selected in such a manner that results in an equilibrium voltage at a point where the charge voltage ramp and discharge voltage curve would cross if they were superimposed on one another. By appropriate selection of the incremental charge and discharge times, the equilibrium voltage may be conveniently established at a point well within the range of a measuring analog-to-digital converter (ADC). The voltage difference over the incremental charge time may be measured on one cycle and utilized to compute the capacitance value.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: February 20, 2001
    Assignee: Fluke Corporation
    Inventor: Jason D. Lewis
  • Patent number: 5992950
    Abstract: A controlled stop system for an AC electric locomotive includes a braking effort control circuit responsive to a braking command regulating braking effort produced by AC traction motors coupled in driving relationship to wheels of the locomotive. The control circuit is responsive to a vehicle speed signal for adjusting motor operation to maintain braking effort to about zero speed. A filter processes the speed signal before application to the braking effort control circuit such that the control circuit operates as a speed regulator at zero speed to maintain the vehicle in a stopped condition.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: November 30, 1999
    Assignee: General Electric Company
    Inventors: Ajith Kuttannair Kumar, Bret Dwayne Worden
  • Patent number: 5977893
    Abstract: A test method for charge redistribution type digital-to-analog and analog-to-digital converters by utilizing the special characteristics of a DAC or ADC such that the accuracy and linearity of the converted signal is only determined by the internal capacitance ratios of the converter, and that the accuracy and linearity are not related to the test reference voltage, the test voltage and the noise signal of the test machine. The test method utilizes a principle of capacitance comparison to directly compare the capacitance ratios in a converter in order to determine the accuracy and linearity of the converted signal. The present invention method enables an effective reduction in the test time and test steps required and an increase in the test efficiency.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: November 2, 1999
    Assignee: Holtek Semiconductor, Inc.
    Inventors: Jason Chen, Henry Fan
  • Patent number: 5798648
    Abstract: An apparatus for inspecting an electric component in an inverter circuit has a DC power supply for supplying a direct current to a given position in an inverter circuit, a voltage detector for detecting a voltage at a given position in the inverter circuit, a current detector for detecting a current flowing at a given position in the inverter circuit, a switching circuit for changing positions at which the direct current is supplied from the DC power supply, positions at which the voltage is detected by the voltage detector, and positions at which the current is detected by the current detector, and a controller for outputting a switching signal to the switching circuit. The switching circuit is controlled by the controller to charge an electrolytic capacitor in an inverter circuit with a current from the DC power supply. The electrolytic capacitor is determined as to its quality by determining whether the calculated electrolytic capacitance of the electrolytic capacitor falls within a preset range or not.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: August 25, 1998
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Atsushi Ueyama, Yoshinari Tsukada, Fumitomo Takano
  • Patent number: 5798650
    Abstract: A process for controlling the weldability of a sheet (1) of the composite metal sheet type having a layer (7) which is interposed between two metal facing sheets (3,5) and comprises a polymer (8) having a filler of conductive particles (9). This process comprises measuring by means of a signal of given frequency f applied to two electrodes (11,13) disposed in facing relation to each other, each electrode being in contact with a corresponding metal facing sheet (3,5), the voltage/current phaseshift .phi. due to the resistive and capacitive properties of the composite sheet (1). The response of the composite sheet (1) to this signal corresponds to that of an equivalent parallel RC circuit. Thereafter, the mass fraction of the conductive particles (9) is calculated from the value of .phi.. By comparing the determined mass fraction with prefixed thresholds, the weldability and the vibration-damping capacity of the composite sheet (1) are evaluated.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: August 25, 1998
    Assignee: Sollac
    Inventor: Jerome Guth
  • Patent number: 5777904
    Abstract: In a system which comprises an apparatus, having a connection device with connection contacts, and at least one peripheral device which can be connected to the apparatus and comprises a counter-connection device which can be detachably connected to the connection device and comprises counter-contacts, at least one counter-contact being connected to a resistor provided in the peripheral device, the apparatus comprising a circuit arrangement for determining the value of a resistor, the circuit arrangement is additionally arranged to generate at least one control information item for the peripheral device which comprises an evaluation device for evaluating the control information.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: July 7, 1998
    Assignee: U.S. Philips Corporation
    Inventor: Gerhard Schneider
  • Patent number: 5730165
    Abstract: A capacitive field sensor, which may be used for the control of a water supply valve in a basin or fountain, employs a single coupling plate to detect a change in capacitance to ground. The apparatus comprises a circuit for charging a sensing electrode and a switching element acting to remove charge from the sensing electrode and to transfer it to a charge detection circuit. The time interval employed for the charging and discharging steps can vary widely. Usually at least one of the charge or discharge pulses is on the order of a hundred nanoseconds, and is shorter in duration than a characteristic conduction time for a body of water disposed about the sensing plate. Thus, the sensor can detect the presence of a user near a controlled faucet without being subject to measurement artifacts arising from standing water.
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: March 24, 1998
    Inventor: Harald Philipp
  • Patent number: 5657238
    Abstract: A dual-slope measuring circuit for measuring an unknown resistance. A first time measurement measures the time which is needed to charge a capacitor to a first reference voltage (Uref.sub.1) via a reference resistor. A second time measurement measures the time which is needed to charge the capacitor again to the first reference voltage (Uref.sub.1) but now via the parallel arrangement of the reference resistor and the unknown resistance. The value of the unknown resistance is determined from the ratio between the two time intervals thus measured. The time measurement is not started until the capacitor voltage (Uc) on the capacitor has passed a second reference voltage (Uref.sub.2), where the second reference voltage has a value between the first reference voltage and the capacitor voltage (Uc) appearing across the capacitor immediately after discharge of the capacitor.
    Type: Grant
    Filed: April 5, 1995
    Date of Patent: August 12, 1997
    Assignee: U.S. Philips Corporation
    Inventor: Wieger Lindeboom
  • Patent number: 5648727
    Abstract: A capacitive fluid level sensing pipette probe adapted to be used in an automated random access immunoassay analyzer is provided. The pipette probe comprises an elongated shaft having a conductive tip. An integrated circuit chip containing capacitive sensing circuitry is positioned on the pipette probe itself, or in very close proximity. With this arrangement, the sensing circuitry moves with the pipette probe as it is raised and lowered into and out of a vessel containing a liquid. Thus, errors associated with capacitance caused by flexing connector cables is eliminated. Flex tape wiring may be used to carry data from the capacitive sensing circuitry on the pipette probe to the processing board of the automated immunoassay analyzer.
    Type: Grant
    Filed: October 24, 1995
    Date of Patent: July 15, 1997
    Assignee: DPC Cirrus Inc.
    Inventors: William T. Tyberg, John W. Jones
  • Patent number: 5600254
    Abstract: In a process and a circuit arrangement for measuring the resistance of a resistance sensor, for instance a wetness sensor, via a rate of change of the charge of a capacitor, a measurement cycle consisting in each case of a charging of a capacitor, a discharging of the capacitor over the resistance sensor, and thereupon a measurement of the charge remaining in the capacitor, the direction of the discharge current through the resistor changes from measurement cycle to measurement cycle.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: February 4, 1997
    Assignee: VDO Adolf Schindling AG
    Inventor: Reinhold Berberich
  • Patent number: 5576628
    Abstract: A capacitance measuring device incorporates the integrating analog-digital converter circuit of a handheld meter. The capacitance measuring device charges an unknown capacitance with a constant current until the voltage across the unknown capacitor reaches a predetermined voltage. At the same time, a reference voltage is applied to the input lead of an integrating circuit of the integrating analog-digital converter such that a corresponding proportional charge is stored in the feedback capacitor of the integrating circuit. The negative of the reference voltage is then applied to the integrating circuit so that charge is removed from the feedback capacitor at the same rate as the feedback capacitor was charged. A counter is used to determine the number of clock pulses it took to completely discharge the feedback capacitor and hence a reading of the unknown capacitance can be determined from the equation C.sub.X =I.sub.CHARGE *T.sub.2 /V.sub.TRIP.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: November 19, 1996
    Assignee: Telcom Semiconductor, Inc.
    Inventors: Amado A. Caliboso, S. Fred Dabney, Jr.
  • Patent number: 5563519
    Abstract: A circuit and method is disclosed which determines the physical position of a selected resistance setting of a mechanical variable resistive component, such as a potentiometer, between its mechanical limits as a ratio of its selected resistance and its total resistance. The circuit includes a potentiometer, a capacitor and a microprocessor, which form a charging circuit. The microprocessor has three I/O pins, which are connected to the three terminals of the pot. The capacitor is connected in series to the pot, so that it can be charged by a voltage signal from the microprocessor either across the selected resistance of the pot's wiper or across the entire resistance of the pot. The microprocessor executes a program, which embodies the method of this invention.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: October 8, 1996
    Assignee: Environmental Technology, Inc.
    Inventor: Matthew J. Honkanen
  • Patent number: 5531097
    Abstract: An absolute humidity meter in which a humidity sensor changes an electrical impedance thereof-exponentially with respect to the relative humidity. A z-f converting circuit (impedance to frequency ) generates a pulse signal corresponding to the impedance. A time constant control differentiating circuit has an impedance of a voltage control variable impedance element changed exponentially by a control voltage, and outputs a differentiated signal obtained by differentiating the pulse signal. A waveform shaping circuit outputs a pulse signal train obtained by binary-valued the differentiated signal.
    Type: Grant
    Filed: February 9, 1995
    Date of Patent: July 2, 1996
    Assignee: TDK Corporation
    Inventors: Atsuko Tsuchida, Shiro Nakagawa
  • Patent number: 5519328
    Abstract: Apparatus is provided for continuously compensating for the dielectric absorption effect in a measuring capacitor in a circuit which employs means for charging the capacitor to develop an output signal thereacross and wherein the absorption effect causes an error in the output signal following a charging interval. The dielectric absorption effect is represented by at least one impedance branch connected in parallel with the capacitor and this branch includes a resistor and a capacitor connected together in series and having a RC time constant. Compensating means is provided having a correction means associated with the impedance branch and wherein the correction means continuously receives the output signal and provides therefrom a compensating signal. The correction means has a time constant that corresponds with that of the associated impedance branch. The compensating signal is combined with the output signal to provide a compensated output signal.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: May 21, 1996
    Assignee: Keithley Instruments, Inc.
    Inventor: Emeric S. Bennett
  • Patent number: 5514972
    Abstract: A circuit compares a difference between first and second voltages to a predetermined voltage. The circuit comprises an amplifier having first and second inputs. First and second capacitors are each coupled at one end to the first input of the amplifier. The first capacitor is charged with the first voltage and subsequently discharged. The second capacitor is charged with a first reference voltage and subsequently discharged. Third and fourth capacitors are each coupled at one end to the second input of the amplifier. The third capacitor is charged with the second voltage and subsequently discharged. The fourth capacitor is charged with a second reference voltage and subsequently discharged.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: May 7, 1996
    Assignee: International Business Machines Corporation
    Inventors: Mark K. DeMoor, Paul W. Graf, Jonathan J. Hurd
  • Patent number: 5479103
    Abstract: The value of an unknown voltage is measured by applying a time-varying current from a reference voltage source through a resistor to a capacitor thereby to increase the voltage across the capacitor as a function of time, measuring the time Tr required for the voltage across the capacitor to reach a selected reference voltage when current from the reference voltage source is applied to the capacitor, restoring the voltage across the capacitor to its initial state, applying a time varying current from an unknown voltage source through a resistor to the capacitor thereby to increase the voltage across the capacitor as a function of time, measuring the time Tb required for the voltage across the capacitor to reach a selected reference voltage when current from the unknown voltage source is applied to the capacitor and calculating the unknown voltage from the times Tr and Tb.
    Type: Grant
    Filed: January 18, 1994
    Date of Patent: December 26, 1995
    Assignee: Air Communications, Inc.
    Inventors: Kent Kernahan, Gavin Grant
  • Patent number: 5469364
    Abstract: A new and improved method for measuring the value of a capacitor and for detecting small variations in the value of a capacitor around a reference value is described. In accordance with the invention, the capacitance of capacitor may be determined by applying a voltage input having a known amplitude and wave form V to an RC circuit having a substantially known or constant load impedance R and sampling the voltage across the resistor or capacitor at a precisely controlled elapsed time interval T. The method now permits improved detector circuits to be created for measuring small variations in value with precision and accuracy. Solid state keypads incorporating sensor cells and software algorithms provide superior human to machine interface systems which are not subject to environmentally induced errors or errors due to component aging.
    Type: Grant
    Filed: March 15, 1993
    Date of Patent: November 21, 1995
    Inventors: Bradley W. Hughey, Lucretiu Pisau, Liviu Millea
  • Patent number: 5438272
    Abstract: A network-under-test of a device is tested relative to other networks of the device by probing the network-under-test with a probe; generating a voltage which is applied across the network-under-test via the probe for developing a transient voltage between the network-under-test and the other networks of the device for stressing leakage resistance between the network-under-test and the other networks; and determining if the stressed leakage resistance is acceptable for determining integrity of the network-under-test relative to the other networks of the device.
    Type: Grant
    Filed: May 9, 1994
    Date of Patent: August 1, 1995
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey A. Craig, Ka-Chiu Woo
  • Patent number: 5416423
    Abstract: A Contact Smart Card (3) is inserted in a contact card reader and its capacitance is measured by applying a square wave generated by an oscillator (1) to it via a resistor (4). The capacitance effect of the smart card (3) affects the amplitude of the output from the resistor (1) and the output is monitored in an amplitude detector (2) connected to receive the signal output from the resistor (4) and to compare it against a threshold level for the signal previously established and stored for an acceptable card.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: May 16, 1995
    Assignee: GPT Limited
    Inventor: Duncan O. De Borde
  • Patent number: 5399979
    Abstract: The assembly comprises an electrically insulated linear array of a plurality of active plates working in conjunction with common return plate means to provide a line of capacitors. The electrically insulated active plate array and common return plate means extend through a column of multi-phase fluid. A discrete oscillator circuit is positioned adjacent to and is permanently connected to each active plate for charging and discharging it. Means are provided for sequentially enabling the oscillator circuits to produce signals which are each indicative of the dielectric constant of the thin horizontal slice of fluid extending between the active plate and the return plate means. The signals are collected by a microprocessor which analyzes them to provide a dielectric constant profile of the fluid column. Interfaces of phases can be located from the profile and the composition of the fluid phases can be determined.
    Type: Grant
    Filed: April 23, 1993
    Date of Patent: March 21, 1995
    Assignee: 342975 Alberta Ltd.
    Inventors: Richard W. Henderson, Richard W. Thornton
  • Patent number: 5274334
    Abstract: A circuit for measuring a parameter value by measuring the time required to charge a capacitor in a sensor RC circuit from a first to a second voltage includes a reference RC circuit whose capacitor is also charged between two voltage levels. The circuit is calibrated so that the time interval required to charge the reference capacitor may be used to improve the accuracy with which the parameter value is measured.
    Type: Grant
    Filed: December 18, 1989
    Date of Patent: December 28, 1993
    Assignee: Honeywell Inc.
    Inventor: Frank S. Mills
  • Patent number: 5266901
    Abstract: A system and a method for testing the integrity of interconnection networks on a circuit board or substrate are disclosed. To test the continuity of a being tested network, two probes are used. To test the integrity of the being tested network, as it relates to other nets on the circuit board, a rectangular pulse is provided to the being tested network, and a signal in response to the stimulus pulse, provided across an external capacitor and resistor connected to the reference plane of the circuit board or substrate, is sampled by a transient analyzer. The leading edge of the thus sampled response signal provides an indication of whether the being tested net is acceptable, opened, shorted, or has a high leakage resistance to another net.
    Type: Grant
    Filed: May 29, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corp.
    Inventor: Ka-Chiu Woo
  • Patent number: 5245294
    Abstract: A method for measuring capacitance in a power conversion system by measuring the time rate of discharge of the capacitance means and computing the value of capacitance corresponding to the measured discharge rate and a method for verifying that a filter in the power conversion system is effective for suppressing preselected frequencies corresponding to signalling frequencies used in a transit system. In this latter form, the system periodically initiates a self-test function in which the preselected frequency is injected into the system for verifying that the system will detect signals at the preselected frequency.
    Type: Grant
    Filed: March 8, 1991
    Date of Patent: September 14, 1993
    Assignee: General Electric Company
    Inventor: Ajith K. Kumar
  • Patent number: 5204674
    Abstract: A position sensor which can be incorporated into a positional feedback-type servo mechanism includes a mechanical sensor element, an oscillator and first and second phase shifters, which in the disclosed embodiment are variable capacitors. The phase shifters are connected to the sensor element so as to increase and decrease, respectively, a phase shift of the signal generated by the oscillator as the sensor element moves in a given direction. A signal processing circuit converts the phase shifted signals into an output signal which is representative of the position of the sensor element.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: April 20, 1993
    Assignee: Conameter Corporation
    Inventor: Daniel E. Holben
  • Patent number: 5136251
    Abstract: The capacitance of an unknown capacitor is measured with multimeter instrumentation employing a dual slope analog-to-digital converter. The initial voltage across the capacitor is measured and the capacitor is cyclically charged until the capacitor reaches a predetermined proportion of possible charge. The final voltage is measured. The voltage across the charging resistance is integrated over successive charging cycles to provide a value proportional to the charge delivered to the capacitor and this value is divided by the difference between the initial and final voltages.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: August 4, 1992
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Richard E. George, Glade B. Bacon, Richard D. Beckert
  • Patent number: 5122754
    Abstract: A method and a device for automatic verification of genuineness of a banknote or a document comprising a watermark is described. A two-part, doubly active capacitive sensor device (4, 6, 7) is used. A symmetry property of the sensor output signal is changed in a predetermined manner when a correct watermark is present in a coinciding position with shape-adapted capacitor electrodes (4, 6).
    Type: Grant
    Filed: September 10, 1990
    Date of Patent: June 16, 1992
    Assignee: Inter Marketing OY
    Inventor: Einar Gotaas
  • Patent number: 5073757
    Abstract: An apparatus for and a method of measuring capacitance employs a charge measuring system. While a capacitive element, which may be an unknown capacitor, is charged completely to a predetermined voltage, a charge proportional to the capacitance of the capacitive element is accumulated on the feedback capacitor of an integrating operational amplifier. Thereafter, the charge is measured by measuring the time required to completely remove the charge from the feedback capacitor using the same predetermined voltage as a reference. In a preferred embodiment, the present invention is manifested as a capacitance measurement feature in a hand-held multimeter wherein a largely conventional dual-slope analog-to-digital converter is employed as the charge measuring system.
    Type: Grant
    Filed: September 23, 1988
    Date of Patent: December 17, 1991
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Richard E. George