Abstract: A duty cycle measurement (DCM) device includes a charge pump circuit and a clocked comparator circuit. The charge pump circuit is configured to receive a clock signal that has an unknown duty cycle and to generate a capacitor voltage based on the duty cycle of the clock signal. The clocked comparator circuit is configured to receive the capacitor voltage and a reference voltage and to generate a digital output code based on the capacitor voltage and the reference voltage. The digital output code is indicative of the duty cycle of the clock signal. The charge pump circuit is further configured to receive the digital output code. A method of determining a duty cycle of a clock signal is also disclosed.

Abstract: An apparatus for determining a response of a device under test to an electrical pulse generated by a pulse generator. The apparatus can include a conductor for coupling the electrical pulse generator to the device under test and at least two sensing probes connected to the conductor. Each of the at least two sensing probes can be positioned at one of at least two measurement points and can be configured to generate a signal in direct proportion to a current flowing in or a voltage applied to the conductor at the corresponding measurement point. A determination device can be configured to determine the response of the device under test to the electrical pulse based on the signals generated by the at least two sensing probes nd the transit times of the electrical pulse between these different measurement points.

Abstract: A capacitive proximity sensor including a detection circuit, including a detection capacitor, a storage capacitor and switches, a DC voltage generator and a microcontroller which is configured to control the switches and to: obtain a voltage value across the terminals of the storage capacitor and across the terminals of the detection capacitor; calculate a first average defined by the average of the voltage values which are obtained at the end of each iteration of a first acquisition phase and a second average defined by the average of the voltage values at the end of each iteration of a second acquisition phase; and detect a human presence when the difference between the first average and the second average is above a predefined detection threshold.

Abstract: A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.

Abstract: A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.

Abstract: The present invention is directed at improving charge transfer based measurement techniques. This may be done through the use of a sigma-delta like sensing circuit that continually removes a specific amount of charge from an accumulator to produce a binary bit output stream reflective of the state of a connected sensor. Further techniques include detection of a charge transfer measurement residual through a controlled, multi-step charge removal until a trip event is cleared, as well as the reuse of a voltage threshold with a plurality of charge transfers measurements of different resolution.

Abstract: Disclosed herein is a universal serial bus port controller on a source side. The universal serial bus port controller is compatible with universal serial bus Type-C. A source is equipped with the universal serial bus port controller including a power supply terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, and a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line. The universal serial bus port controller includes an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on the basis of a temporal change in the output voltage.

Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.

Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.

Abstract: Methods and apparatus for the in-situ measurement of metrology parameters are disclosed herein. Some embodiments of the disclosure further provide for the real-time adjustment of process parameters based on the measure metrology parameters. Some embodiments of the disclosure provide for a multi-stage processing chamber top plate with one or more sensors between process stations.

Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).

Abstract: A processing unit, including a first circuit, and a first circuit element connected to the first circuit. The first circuit element is at least charged by the first circuit.

Abstract: An electronic device includes a housing and a strain sensor group attached on a wall of the housing. The strain sensor group includes at least one strain sensor each configured to detect deformation of the wall in a single direction. When a user presses the housing, the strain sensor group detects deformation of the wall and generates a detection signal indicating direction and magnitude of deformation of the wall. At least one analog-to-digital converter converts the detection signal into a digital signal, and a controller triggers a first event in the electronic device based on the digital signal.

Abstract: In an embodiment, a method includes performing a calibration of a first touch cell of a touch screen, where performing the calibration includes: receiving a first code associated with the first touch cell; receiving a second code associated with the first touch cell; determining whether there is an indication of a touch of the touch screen based on the first and second codes; generating a raw code based on the first or second codes; receiving a third code associated with the first touch cell; determining whether the third code matches the raw code; and in response to determining that there is no indication of a touch of the touch screen based on the first and second codes, and that the third code matches the raw code, updating a calibration code associated with the first touch cell based on the raw code or the third code.

Abstract: A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.

Abstract: The present application relates to a sensor with a time-sharing regional shielding function and a robot. The sensor comprises a plurality of sensor units, each of which comprises regions contained in four multifunctional layers. Four parallel-plate capacitors are contained in the multifunctional layers. The multifunctional layers realize the regional shielding function through the time-sharing switching of analog switches and the control of a bus.

Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.

Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).

Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.

Abstract: Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG.

Abstract: An asynchronous capacitance-to-digital converter (CDC) is described that allows for very low-power operation when during inactive periods (when no conductive object is in contact or proximity to the sensing electrodes). Asynchronous operation of the CDC provides for capacitance-to-digital conversion without the use of system resources and more power intensive circuit elements.

Abstract: A sensor for a portable connected device. The sensor has a filter arranged to reduce a noise component on a sampled input signal. The is arranged to consider only input measurements that change systematically in a same direction, updating an output value when all the input samples in a predetermined time window are above or below a current output value and, repeating the current output value when the input samples in the time window are below and above the current output value.

Abstract: A method for determining a value representative of the remaining useful life, RUL, of a capacitor, the method comprising the following operations: repeating for several iterations 1 to k, k being an integer greater than 1: acquiring environment measurements that are representative of the environment of the capacitor at a current iteration; based on previous environment measurements acquired at previous iterations 1 to k?1 before the current iteration, and on the received environment measurements at iteration k, calculating at least one aging model; based on the at least one calculated aging model, determining the value representative of the RUL of the capacitor.

Abstract: A capacitance detection device includes: a capacitor array having parallel-connected capacitors having different capacitances, and whose combined capacitance is changed by selectively switching the capacitors; a detection capacitor connected in series to the capacitor array; a switching control unit selectively switching the capacitors; a detection unit detecting an intermediate potential that is a potential of a capacitive voltage division of a power supply; an acquisition unit acquiring, as a reference combined capacitance, any of the combined capacitances in a vicinity where a magnitude relationship between the intermediate potential and a predetermined reference potential is inverted; a determination unit determining whether or not a detection target is present; a capacitance change unit controlling the switching control unit to change the reference combined capacitance; and a setting unit setting the determination threshold based on a difference between the intermediate potentials in the reference combin

Abstract: A capacitance detection device includes: a variable capacitance capacitor; an electrode constituting a detection target whose capacitance is to be detected; and a control circuit, in which the control circuit executes: manipulation processing of manipulating a capacitance of the variable capacitance capacitor to control an intermediate potential, which is a potential at a connection point between the variable capacitance capacitor and the electrode, to a reference potential, when a voltage of a voltage application device is applied to the electrode via the variable capacitance capacitor; and detection processing of detecting the capacitance of the detection target, based on the capacitance of the variable capacitance capacitor when being controlled to the reference potential.

Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.

Abstract: An arithmetic circuit includes an auto-zero amplification circuit that compensates an offset of an entered differential signal, and a comparator circuit that converts an output signal from the auto-zero amplification circuit to a digital signal. The auto-zero amplification circuit and comparator circuit are provided in the same package.

Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).

Abstract: A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.

Abstract: An example embodiment includes a playback device comprising a wireless communications interface including a radio frequency (RF) antenna, a capacitive proximity sensor comprising a grounding plane that is coupled to the RF antenna, one or more processors, and a data storage having stored therein instructions executable by the one or more processors to cause the playback device to perform operations. The operations include operating the playback device in a first power state, detecting that an object is in proximity to the capacitive proximity sensor, and in response to detecting the object, adjusting operation of the playback device from the first power state to a second power state.

Abstract: An evaluation circuit, system, and method for evaluating a capacitive or inductive sensor includes first and second measurement connections to which sensors and/or reference elements are connected, first and second charging and discharging circuits that respectively output first and second charging and discharging signals to the first and second measurement connections. A comparator circuit compares the temporal behavior of the first and second charging and discharging signals. An integrator circuit produces an output voltage that changes as a function of the voltage at the output of the comparator circuit. The output voltage of the integrator circuit is connected to the first or second measurement connection to adjust the respective first or second charging and discharging signal. A measurement signal derived from the output voltage of the integrator circuit is a measure of impedance differences between the sensors or reference elements at the first and second measurement connections.

Abstract: A method for measuring a capacitance value of a capacitive sensor uses an integration process involving charge quantities being transferred in successive integration cycles from the capacitive sensor to an integration capacitor. The method includes performing the integration process until the number of integration cycles carried out has reached a number N of integration cycles to be carried out, wherein a starting value NStart is set to N and an end value NEnd is determined. An A/D converter measures a voltage value UCI(N) at the integration capacitor and the voltage value is added to a voltage sum value UTotal. The number N is increased by a value n, where n is at least one and is less than NDiff=NEnd?NStart. The steps are repeated until the number N exceeds the end value NEnd. The ending voltage sum value is indicative of the capacitance value of the capacitive sensor.

Abstract: A portable charger system provides two charger ports with different charging characteristics. Two devices having different charging characteristics may be coupled to the two charger ports to be charged simultaneously.

Abstract: Methods and devices to mitigate time varying impairments in sensors are described. The application of such methods and devices to pressure sensors facing time varying parasitic capacitances due to water droplets is detailed. Benefits of auto-zeroing technique as adopted in disclosed devices is also described.

Abstract: A measuring device includes a disc-shaped base substrate, sensor electrodes arranged circumferentially along a periphery of the base substrate, a high frequency oscillator configured to apply a high frequency signal to the sensor electrodes, C/V conversion circuits, each being configured to convert a voltage amplitude at a corresponding sensor electrode among the sensor electrodes to a voltage signal indicating an electrostatic capacitance, an A/D converter configured to convert the voltage signal outputted from each of the C/V conversion circuits to a digital value, and a switching mechanism configured to switch each sensor electrode of the sensor electrodes between a first state in which the sensor electrodes are electrically connected to the C/V conversion circuits and a second state in which electrode pairs are connected to different C/V conversion circuits among the C/V conversion circuits. Each electrode pair includes circumferentially adjacent two sensor electrodes among the sensor electrodes.

Abstract: A method and apparatus to drive a laser diode are disclosed comprising increasing a bias current to the laser diode to a threshold level, wherein the threshold level is below an actuation level of the laser diode and wherein a resistor is placed in parallel to the laser diode, charging a capacitance to a precharge capacitance of a circuit including the laser diode, wherein the precharge capacitance is below a capacitance actuation level of the laser diode; and actuating the laser diode.

Abstract: A system includes a host configured to communicate with a device under test. The host is configured to write test data to the device under test. An optimization engine is configured to optimize a plurality of parameters associated with a magnetic recording channel associated with the device under test. The optimization engine is configured to select a first set of parameters for the plurality of parameters and the host is configured to set the magnetic recording channel based on the first set of parameters. The host then measures the performance of the magnetic recording channel based on the first set of parameters. Based on the measured performance, the optimization engine then selects new parameter values for the plurality of parameters. Until the measured performance is within an acceptable threshold, the optimization engine will iteratively update the plurality of parameters based on the measured performance.

Abstract: A capacitance detecting circuit, includes a first front end circuit, a second front end circuit, a control circuit and a processing circuit, wherein the control circuit controls the first front end circuit and the second front end circuit such that the first front end circuit is configured to convert a capacitance signal of a detection capacitor into a first voltage signal through a first calibration capacitor, and the second front end circuit is configured to convert a capacitance signal of the detection capacitor into a second voltage signal through a second calibration capacitor; the processing circuit is calculates a differential signal of the first voltage signal and the second voltage signal to determine a capacitance variation of the detection capacitor according to the differential signal.

Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).

Abstract: Circuit configurations become complicate as a power circuit is expanded, and switching elements are necessarily controlled using invert circuits even when an inverter operates normally. A drive circuit 911 monitors soundness of a gate power circuit 10. When a voltage value P3 is less than a predetermined threshold, the drive circuit determines that a failure occurs in the gate power circuit 10, and outputs a signal P4 to a controller 6. After receiving the signal P4, the controller 6 outputs a signal to a signal line S1 to operate a photovoltaic coupler of a power supply circuit 92. Then, the MOS transistor T1 in the battery circuit 93 enters a conduction state. The charges accumulated in the capacitor C1 are immediately accumulated to the gate electrode of the switching element 81 to turn on the switching element 81. In addition, the charges discharged from the capacitor C1 are charged from the photovoltaic coupler.

Abstract: An input device includes a clocked comparator configured to actively drive a capacitive sensor electrode at a signal input of the clocked comparator with a first periodic reference voltage, and provide a digital representation of a sensing current resulting from driving the capacitive sensor electrode with the first periodic reference signal. The clocked comparator produces the digital representation of the sensing current based on a comparison of the signal input of the clocked generator with the first periodic reference signal. A feedback path provides negative feedback of the digital representation of the sensing current to the signal input of the clocked comparator. The input device further includes a demodulator configured to demodulate the digital representation of the sensing current using the first periodic reference signal to obtain a first digital measurement.

Abstract: A capacitive sensor that includes: a sensing electrode having a capacitance to be measured; an alternating voltage source, configured to apply an alternating voltage to the sensing electrode; a capacitive first transfer device; a measurement circuit configured to measure the capacitance of the sensing electrode; and a switching arrangement. The switching arrangement is configured to alternately, in a first switching state, connect the first transfer device to the sensing electrode to enable a charge transfer from the sensing electrode to the first transfer device and, in a second switching state, connect the first transfer device to the measurement circuit to enable a charge transfer from the first transfer device to the measurement circuit.

Abstract: An apparatus for detecting capacitance, an electronic device and an apparatus for detecting a force are disclosed. The apparatus for detecting capacitance includes: a signal driving circuit (110), configured to periodically charge and discharge at least one capacitor to be detected; a conversion circuit (120), configured to convert a capacitance signal of the at least one capacitor to be detected into a voltage signal; and a cancellation circuit (130), configured to cancel initial capacitance of the at least one capacitor to be detected, so that the voltage signal is associated with a capacitance change of the at least one capacitor to be detected. The apparatus for detecting capacitance could improve the anti-interference performance and improve the accuracy of capacitance detection.

Abstract: A touch sensing system includes: a touch sensor including a plurality of sensing electrodes; and a first comparator including a first input end, a second input end and an output end, the first comparator amplifying a difference between the first input end and the second input end. The first input end is electrically connected to at least two sensing electrodes of the plurality of sensing electrodes which are adjacent to each other, and the second input end is electrically connected to at least two sensing electrodes of the plurality of sensing electrodes which are not adjacent each other and adjacent to the at least two sensing electrodes connected to the first input end, respectively.

Abstract: A capacitance detecting device includes: first and second capacitors connected in series to each other between a power source and a detection electrode; first, second and third switches connected between terminals of the first capacitor, between the first and second capacitors, and between terminals of the second capacitor, respectively; a control circuit controlling to turn on/off the first, second and third switches, connected to a connection node between the first capacitor and the second switch, and detecting a change in a capacitance of the second capacitor; a filter circuit connected to the connection node, transmitting a potential of a frequency including switching frequencies of the second and third switches, and not transmitting a potential of another specific frequency; and a sample-and-hold circuit connected between the filter circuit and the control circuit.

Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.

Abstract: A change in an imaginary part of a complex dielectric constant of an inspection object containing moisture is detected as a change in an oscillation frequency. A sensor device includes an oscillation unit that is formed in a semiconductor integrated circuit and an oscillation frequency detection unit that detects an oscillation frequency of the oscillation unit. The oscillation unit has capacitors that are connected to an inspection object in series and changes the oscillation frequency in accordance with a complex dielectric constant of the inspection object.

Abstract: An integrated circuit measures a differential change between first and second mutual capacitances having receiver electrodes joined to form a common electrode of an MEMS circuit. The integrated circuit performs charge transfer measurements to transfer charge to a reference capacitor and a variable capacitor is used to change the amount of charge stored in the reference capacitor. First and second charge transfer measurements are performed, each having a number of charge transfer cycles used to transfer charge from the common electrode to the reference capacitor. In the first measurement, a transmit electrode of the first capacitance is driven high first, and in the second measurement, a transmit electrode of the second capacitance is driven high first. The circuit compensates for parasitic capacitances in the MEMS circuit with a sample-and-hold circuit selectively connected to the common electrode to maintain its voltage during a charge phase of a charge transfer cycle.

Abstract: A disclosed linearization circuit includes a reference component, a charging and discharging controller, and a comparator circuit. The reference component has a non-linear dependence on current or voltage. The charging and discharging controller is configured to control alternating charging and discharging of the reference component. A voltage associated with the reference component forms a reference signal. The charging and discharging are controlled such that the reference signal has a periodic time dependence. The reference signal and a measurement signal are received by the comparator circuit. The comparator circuit is configured to generate and output a square-wave signal based on a reference time point during a charge-discharge cycle, and based on a result of a comparison of the reference signal with the measurement signal, such that the square-wave signal represents a linearized output signal. This disclosure further relates to a corresponding method.

Abstract: Noncontact sensing components are provided herein, in an aspect, they can be for an electronic device. The noncontact sensing components can contain a semiconductor layer having a r-GO portion and a CNT portion. The noncontact sensing components can be used to detect the presence or movement of a humidity source in the vicinity of the noncontact sensing component. The resistance/humidity response of the component can be based on the combined contribution of carbon nanotube (positive resistance variation) and reduced-graphene oxide (negative resistance variation) behaviors.