Including Charge Or Discharge Cycle Circuit Patents (Class 324/678)
  • Patent number: 12235307
    Abstract: An apparatus for determining a response of a device under test to an electrical pulse generated by a pulse generator. The apparatus can include a conductor for coupling the electrical pulse generator to the device under test and at least two sensing probes connected to the conductor. Each of the at least two sensing probes can be positioned at one of at least two measurement points and can be configured to generate a signal in direct proportion to a current flowing in or a voltage applied to the conductor at the corresponding measurement point. A determination device can be configured to determine the response of the device under test to the electrical pulse based on the signals generated by the at least two sensing probes nd the transit times of the electrical pulse between these different measurement points.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: February 25, 2025
    Assignees: UNIVERSITAT DER BUNDESWEHR MÜNCHEN, TECHNISCHE UNIVERSITÄT MÜNCHEN
    Inventors: Dennis Helmut, Gerhard Groos
  • Patent number: 12095453
    Abstract: A capacitive proximity sensor including a detection circuit, including a detection capacitor, a storage capacitor and switches, a DC voltage generator and a microcontroller which is configured to control the switches and to: obtain a voltage value across the terminals of the storage capacitor and across the terminals of the detection capacitor; calculate a first average defined by the average of the voltage values which are obtained at the end of each iteration of a first acquisition phase and a second average defined by the average of the voltage values at the end of each iteration of a second acquisition phase; and detect a human presence when the difference between the first average and the second average is above a predefined detection threshold.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: September 17, 2024
    Assignee: Vitesco Technologies Gmbh
    Inventors: Xavier Hourne, Cédric Vergnieres
  • Patent number: 12092672
    Abstract: A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: September 17, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Yi-Chou Huang
  • Patent number: 12021541
    Abstract: A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: June 25, 2024
    Assignee: SIGMASENSE, LLC.
    Inventor: Phuong Huynh
  • Patent number: 12007418
    Abstract: The present invention is directed at improving charge transfer based measurement techniques. This may be done through the use of a sigma-delta like sensing circuit that continually removes a specific amount of charge from an accumulator to produce a binary bit output stream reflective of the state of a connected sensor. Further techniques include detection of a charge transfer measurement residual through a controlled, multi-step charge removal until a trip event is cleared, as well as the reuse of a voltage threshold with a plurality of charge transfers measurements of different resolution.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: June 11, 2024
    Assignee: AZOTEQ HOLDINGS LIMITED
    Inventors: Frederick Johannes Bruwer, Daniel Barend Rademeyer, Nico Johann Swanepoel
  • Patent number: 12001377
    Abstract: Disclosed herein is a universal serial bus port controller on a source side. The universal serial bus port controller is compatible with universal serial bus Type-C. A source is equipped with the universal serial bus port controller including a power supply terminal, a power supply circuit, a switch connected between an output of the power supply circuit and the power supply terminal, a capacitor connected to the power supply terminal, and a discharge resistance and a discharge switch connected in series with each other between the power supply terminal and a ground line. The universal serial bus port controller includes an abnormality detector which detects an output voltage of the power supply terminal a plurality of times after the discharge switch is turned on and detects an abnormality on the basis of a temporal change in the output voltage.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: June 4, 2024
    Assignee: ROHM Co., LTD.
    Inventor: Nobutaka Itakura
  • Patent number: 11979173
    Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: May 7, 2024
    Assignee: SIGMASENSE, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11942967
    Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: March 26, 2024
    Assignee: SIGMASENSE, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11908718
    Abstract: Methods and apparatus for the in-situ measurement of metrology parameters are disclosed herein. Some embodiments of the disclosure further provide for the real-time adjustment of process parameters based on the measure metrology parameters. Some embodiments of the disclosure provide for a multi-stage processing chamber top plate with one or more sensors between process stations.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: February 20, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Ramesh Krishnamurthy, Lakshmanan Karuppiah
  • Patent number: 11863197
    Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: January 2, 2024
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11842770
    Abstract: A processing unit, including a first circuit, and a first circuit element connected to the first circuit. The first circuit element is at least charged by the first circuit.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: December 12, 2023
    Assignee: International Business Machines Corporation
    Inventors: Tayfun Gokmen, Seyoung Kim, Hyung-Min Lee, Wooram Lee, Paul Michael Solomon
  • Patent number: 11836322
    Abstract: An electronic device includes a housing and a strain sensor group attached on a wall of the housing. The strain sensor group includes at least one strain sensor each configured to detect deformation of the wall in a single direction. When a user presses the housing, the strain sensor group detects deformation of the wall and generates a detection signal indicating direction and magnitude of deformation of the wall. At least one analog-to-digital converter converts the detection signal into a digital signal, and a controller triggers a first event in the electronic device based on the digital signal.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: December 5, 2023
    Assignee: GOERTEK TECHNOLOGY CO. LTD.
    Inventors: Hirotada Taniuchi, Katsunori Ishimiya, Kenichiro Kodama
  • Patent number: 11829558
    Abstract: In an embodiment, a method includes performing a calibration of a first touch cell of a touch screen, where performing the calibration includes: receiving a first code associated with the first touch cell; receiving a second code associated with the first touch cell; determining whether there is an indication of a touch of the touch screen based on the first and second codes; generating a raw code based on the first or second codes; receiving a third code associated with the first touch cell; determining whether the third code matches the raw code; and in response to determining that there is no indication of a touch of the touch screen based on the first and second codes, and that the third code matches the raw code, updating a calibration code associated with the first touch cell based on the raw code or the third code.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: November 28, 2023
    Assignee: STMicroelectronics Asia Pacific Pte Ltd.
    Inventors: Min Sang Kim, Chan Hyuck Yun, Sang Hoon Jeon, Jeonghee Son, Yun Sang On
  • Patent number: 11646744
    Abstract: A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: May 9, 2023
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11598681
    Abstract: The present application relates to a sensor with a time-sharing regional shielding function and a robot. The sensor comprises a plurality of sensor units, each of which comprises regions contained in four multifunctional layers. Four parallel-plate capacitors are contained in the multifunctional layers. The multifunctional layers realize the regional shielding function through the time-sharing switching of analog switches and the control of a bus.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: March 7, 2023
    Assignee: Beijing Tashan Technology Co., Ltd.
    Inventors: Tengchen Sun, Dahua Zhang, Wei Zhuang
  • Patent number: 11595054
    Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: February 28, 2023
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11569828
    Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: January 31, 2023
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11569840
    Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: January 31, 2023
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11561254
    Abstract: Methods of characterizing electrical properties of a semiconductor layer structure on a wafer with topside semiconductor layers on an insulating or semi-insulating substrate, the semiconductor layer structure including a high electron mobility transistor (HEMT) heterostructure with a two-dimensional electron gas (2DEG) at a heterointerface between the semiconductor layers of the heterostructure. The methods include: (a) physically contacting the topside of the wafer within a narrow border zone at an edge of the wafer with a flexible metal cantilever electrode of a contacting device, wherein the flexible metal cantilever electrode contacts one or more of the semiconductor layers exposed at the narrow border zone so that the flexible metal cantilever electrode is in electrical contact with the 2DEG; and (b) applying corona charge bias and measuring a surface voltage of the semiconductor layers using a non-contact probe while maintaining the electrical contact with the 2DEG.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: January 24, 2023
    Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.
    Inventors: Marshall Wilson, Bret Schrayer, Alexandre Savtchouk, Dmitriy Marinskiy, Jacek Lagowski
  • Patent number: 11531424
    Abstract: An asynchronous capacitance-to-digital converter (CDC) is described that allows for very low-power operation when during inactive periods (when no conductive object is in contact or proximity to the sensing electrodes). Asynchronous operation of the CDC provides for capacitance-to-digital conversion without the use of system resources and more power intensive circuit elements.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: December 20, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Paul M. Walsh, Dermot MacSweeney, Said Hussaini, Hui Jiang, Kofi Makinwa
  • Patent number: 11463088
    Abstract: A sensor for a portable connected device. The sensor has a filter arranged to reduce a noise component on a sampled input signal. The is arranged to consider only input measurements that change systematically in a same direction, updating an output value when all the input samples in a predetermined time window are above or below a current output value and, repeating the current output value when the input samples in the time window are below and above the current output value.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 4, 2022
    Assignee: Semtech Corporation
    Inventors: Chaouki Rouaissia, Remi Le Reverend, Jerald G. Ott, III
  • Patent number: 11408944
    Abstract: A method for determining a value representative of the remaining useful life, RUL, of a capacitor, the method comprising the following operations: repeating for several iterations 1 to k, k being an integer greater than 1: acquiring environment measurements that are representative of the environment of the capacitor at a current iteration; based on previous environment measurements acquired at previous iterations 1 to k?1 before the current iteration, and on the received environment measurements at iteration k, calculating at least one aging model; based on the at least one calculated aging model, determining the value representative of the RUL of the capacitor.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: August 9, 2022
    Assignee: Schneider Electric Industries SAS
    Inventors: Antoine El Hayek, Radoslava Mitova, Miao-xin Wang, Pascal Venet, Guy Clerc, Ali Sari
  • Patent number: 11346873
    Abstract: A capacitance detection device includes: a capacitor array having parallel-connected capacitors having different capacitances, and whose combined capacitance is changed by selectively switching the capacitors; a detection capacitor connected in series to the capacitor array; a switching control unit selectively switching the capacitors; a detection unit detecting an intermediate potential that is a potential of a capacitive voltage division of a power supply; an acquisition unit acquiring, as a reference combined capacitance, any of the combined capacitances in a vicinity where a magnitude relationship between the intermediate potential and a predetermined reference potential is inverted; a determination unit determining whether or not a detection target is present; a capacitance change unit controlling the switching control unit to change the reference combined capacitance; and a setting unit setting the determination threshold based on a difference between the intermediate potentials in the reference combin
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: May 31, 2022
    Assignee: AISIN CORPORATION
    Inventor: Hideya Kurachi
  • Patent number: 11293961
    Abstract: A capacitance detection device includes: a variable capacitance capacitor; an electrode constituting a detection target whose capacitance is to be detected; and a control circuit, in which the control circuit executes: manipulation processing of manipulating a capacitance of the variable capacitance capacitor to control an intermediate potential, which is a potential at a connection point between the variable capacitance capacitor and the electrode, to a reference potential, when a voltage of a voltage application device is applied to the electrode via the variable capacitance capacitor; and detection processing of detecting the capacitance of the detection target, based on the capacitance of the variable capacitance capacitor when being controlled to the reference potential.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: April 5, 2022
    Assignee: AISIN CORPORATION
    Inventors: Hideya Kurachi, Akira Takahashi
  • Patent number: 11190205
    Abstract: An analog to digital converter (ADC) that is configured to service a photo-diode includes a capacitor and a self-referenced latched comparator. The capacitor produces a photo-diode voltage based on charging by a photo-diode current associated with the photo-diode and a digital to analog converter (DAC) source current and/or a DAC sink current. The self-referenced latched comparator generates a first digital signal that is based on a difference between the photo-diode voltage and a threshold voltage associated with the self-referenced latched comparator. Also, one or more processing modules executes operational instructions to process the first digital signal to generate a second digital signal and/or a third digital signal. An N-bit DAC generates the DAC source current based on the second digital signal, and an M-bit DAC generates the DAC sink current based on the third digital signal. The DAC source current and/or the DAC sink current tracks the photo-diode current.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: November 30, 2021
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11183961
    Abstract: An arithmetic circuit includes an auto-zero amplification circuit that compensates an offset of an entered differential signal, and a comparator circuit that converts an output signal from the auto-zero amplification circuit to a digital signal. The auto-zero amplification circuit and comparator circuit are provided in the same package.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: November 23, 2021
    Assignee: NIDEC CORPORATION
    Inventors: Masaki Yoshinaga, Taro Amagai, Akiko Ikeda
  • Patent number: 11152948
    Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: October 19, 2021
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11133811
    Abstract: A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: September 28, 2021
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 11119540
    Abstract: An example embodiment includes a playback device comprising a wireless communications interface including a radio frequency (RF) antenna, a capacitive proximity sensor comprising a grounding plane that is coupled to the RF antenna, one or more processors, and a data storage having stored therein instructions executable by the one or more processors to cause the playback device to perform operations. The operations include operating the playback device in a first power state, detecting that an object is in proximity to the capacitive proximity sensor, and in response to detecting the object, adjusting operation of the playback device from the first power state to a second power state.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: September 14, 2021
    Assignee: Sonos, Inc.
    Inventors: Thomas Calatayud, Jonathon Reilly
  • Patent number: 11112439
    Abstract: An evaluation circuit, system, and method for evaluating a capacitive or inductive sensor includes first and second measurement connections to which sensors and/or reference elements are connected, first and second charging and discharging circuits that respectively output first and second charging and discharging signals to the first and second measurement connections. A comparator circuit compares the temporal behavior of the first and second charging and discharging signals. An integrator circuit produces an output voltage that changes as a function of the voltage at the output of the comparator circuit. The output voltage of the integrator circuit is connected to the first or second measurement connection to adjust the respective first or second charging and discharging signal. A measurement signal derived from the output voltage of the integrator circuit is a measure of impedance differences between the sensors or reference elements at the first and second measurement connections.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: September 7, 2021
    Inventors: Marius Czardybon, Peter Czardybon
  • Patent number: 11079880
    Abstract: A method for measuring a capacitance value of a capacitive sensor uses an integration process involving charge quantities being transferred in successive integration cycles from the capacitive sensor to an integration capacitor. The method includes performing the integration process until the number of integration cycles carried out has reached a number N of integration cycles to be carried out, wherein a starting value NStart is set to N and an end value NEnd is determined. An A/D converter measures a voltage value UCI(N) at the integration capacitor and the voltage value is added to a voltage sum value UTotal. The number N is increased by a value n, where n is at least one and is less than NDiff=NEnd?NStart. The steps are repeated until the number N exceeds the end value NEnd. The ending voltage sum value is indicative of the capacitance value of the capacitive sensor.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: August 3, 2021
    Assignee: KOSTAL Automobil Elektrik GmbH & Co. KG
    Inventor: Carl Christian Lexow
  • Patent number: 11075527
    Abstract: A portable charger system provides two charger ports with different charging characteristics. Two devices having different charging characteristics may be coupled to the two charger ports to be charged simultaneously.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: July 27, 2021
    Assignee: Google LLC
    Inventors: Philip Michael Isaacs, Kai Xu, David Vandervies
  • Patent number: 11054328
    Abstract: Methods and devices to mitigate time varying impairments in sensors are described. The application of such methods and devices to pressure sensors facing time varying parasitic capacitances due to water droplets is detailed. Benefits of auto-zeroing technique as adopted in disclosed devices is also described.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: July 6, 2021
    Assignee: pSemi Corporation
    Inventors: Vishnu Srinivasan, Ion Opris, Keith Bargroff
  • Patent number: 10948317
    Abstract: A measuring device includes a disc-shaped base substrate, sensor electrodes arranged circumferentially along a periphery of the base substrate, a high frequency oscillator configured to apply a high frequency signal to the sensor electrodes, C/V conversion circuits, each being configured to convert a voltage amplitude at a corresponding sensor electrode among the sensor electrodes to a voltage signal indicating an electrostatic capacitance, an A/D converter configured to convert the voltage signal outputted from each of the C/V conversion circuits to a digital value, and a switching mechanism configured to switch each sensor electrode of the sensor electrodes between a first state in which the sensor electrodes are electrically connected to the C/V conversion circuits and a second state in which electrode pairs are connected to different C/V conversion circuits among the C/V conversion circuits. Each electrode pair includes circumferentially adjacent two sensor electrodes among the sensor electrodes.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: March 16, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kippei Sugita, Daisuke Kawano
  • Patent number: 10944239
    Abstract: A method and apparatus to drive a laser diode are disclosed comprising increasing a bias current to the laser diode to a threshold level, wherein the threshold level is below an actuation level of the laser diode and wherein a resistor is placed in parallel to the laser diode, charging a capacitance to a precharge capacitance of a circuit including the laser diode, wherein the precharge capacitance is below a capacitance actuation level of the laser diode; and actuating the laser diode.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: March 9, 2021
    Assignee: Prysm Systems, Inc.
    Inventor: Robert N. Stark
  • Patent number: 10935603
    Abstract: A system includes a host configured to communicate with a device under test. The host is configured to write test data to the device under test. An optimization engine is configured to optimize a plurality of parameters associated with a magnetic recording channel associated with the device under test. The optimization engine is configured to select a first set of parameters for the plurality of parameters and the host is configured to set the magnetic recording channel based on the first set of parameters. The host then measures the performance of the magnetic recording channel based on the first set of parameters. Based on the measured performance, the optimization engine then selects new parameter values for the plurality of parameters. Until the measured performance is within an acceptable threshold, the optimization engine will iteratively update the plurality of parameters based on the measured performance.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: March 2, 2021
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Sayan Ghosal, John Tantzen
  • Patent number: 10921938
    Abstract: A capacitance detecting circuit, includes a first front end circuit, a second front end circuit, a control circuit and a processing circuit, wherein the control circuit controls the first front end circuit and the second front end circuit such that the first front end circuit is configured to convert a capacitance signal of a detection capacitor into a first voltage signal through a first calibration capacitor, and the second front end circuit is configured to convert a capacitance signal of the detection capacitor into a second voltage signal through a second calibration capacitor; the processing circuit is calculates a differential signal of the first voltage signal and the second voltage signal to determine a capacitance variation of the detection capacitor according to the differential signal.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: February 16, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Zhengfeng Wang, Shuo Fan
  • Patent number: 10862492
    Abstract: An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as is of pico-amps) and consume very little power (e.g., less than 2 ?W).
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: December 8, 2020
    Assignee: SigmaSense, LLC.
    Inventor: Phuong Huynh
  • Patent number: 10840800
    Abstract: Circuit configurations become complicate as a power circuit is expanded, and switching elements are necessarily controlled using invert circuits even when an inverter operates normally. A drive circuit 911 monitors soundness of a gate power circuit 10. When a voltage value P3 is less than a predetermined threshold, the drive circuit determines that a failure occurs in the gate power circuit 10, and outputs a signal P4 to a controller 6. After receiving the signal P4, the controller 6 outputs a signal to a signal line S1 to operate a photovoltaic coupler of a power supply circuit 92. Then, the MOS transistor T1 in the battery circuit 93 enters a conduction state. The charges accumulated in the capacitor C1 are immediately accumulated to the gate electrode of the switching element 81 to turn on the switching element 81. In addition, the charges discharged from the capacitor C1 are charged from the photovoltaic coupler.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: November 17, 2020
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Satoshi Hiranuma, Koichi Yahata
  • Patent number: 10816582
    Abstract: An input device includes a clocked comparator configured to actively drive a capacitive sensor electrode at a signal input of the clocked comparator with a first periodic reference voltage, and provide a digital representation of a sensing current resulting from driving the capacitive sensor electrode with the first periodic reference signal. The clocked comparator produces the digital representation of the sensing current based on a comparison of the signal input of the clocked generator with the first periodic reference signal. A feedback path provides negative feedback of the digital representation of the sensing current to the signal input of the clocked comparator. The input device further includes a demodulator configured to demodulate the digital representation of the sensing current using the first periodic reference signal to obtain a first digital measurement.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: October 27, 2020
    Assignee: Synaptics Incorporated
    Inventor: Kirk Hargreaves
  • Patent number: 10790822
    Abstract: A capacitive sensor that includes: a sensing electrode having a capacitance to be measured; an alternating voltage source, configured to apply an alternating voltage to the sensing electrode; a capacitive first transfer device; a measurement circuit configured to measure the capacitance of the sensing electrode; and a switching arrangement. The switching arrangement is configured to alternately, in a first switching state, connect the first transfer device to the sensing electrode to enable a charge transfer from the sensing electrode to the first transfer device and, in a second switching state, connect the first transfer device to the measurement circuit to enable a charge transfer from the first transfer device to the measurement circuit.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: September 29, 2020
    Assignee: IEE INTERNATIONAL ELECTRONICS & ENGINEERING S.A.
    Inventors: Christoph Wendt, Laurent Lamesch
  • Patent number: 10788380
    Abstract: An apparatus for detecting capacitance, an electronic device and an apparatus for detecting a force are disclosed. The apparatus for detecting capacitance includes: a signal driving circuit (110), configured to periodically charge and discharge at least one capacitor to be detected; a conversion circuit (120), configured to convert a capacitance signal of the at least one capacitor to be detected into a voltage signal; and a cancellation circuit (130), configured to cancel initial capacitance of the at least one capacitor to be detected, so that the voltage signal is associated with a capacitance change of the at least one capacitor to be detected. The apparatus for detecting capacitance could improve the anti-interference performance and improve the accuracy of capacitance detection.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: September 29, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Lin Feng, Hong Jiang
  • Patent number: 10782829
    Abstract: A touch sensing system includes: a touch sensor including a plurality of sensing electrodes; and a first comparator including a first input end, a second input end and an output end, the first comparator amplifying a difference between the first input end and the second input end. The first input end is electrically connected to at least two sensing electrodes of the plurality of sensing electrodes which are adjacent to each other, and the second input end is electrically connected to at least two sensing electrodes of the plurality of sensing electrodes which are not adjacent each other and adjacent to the at least two sensing electrodes connected to the first input end, respectively.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: September 22, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jeonkyoo Kim, Gilcho Ahn
  • Patent number: 10775526
    Abstract: A capacitance detecting device includes: first and second capacitors connected in series to each other between a power source and a detection electrode; first, second and third switches connected between terminals of the first capacitor, between the first and second capacitors, and between terminals of the second capacitor, respectively; a control circuit controlling to turn on/off the first, second and third switches, connected to a connection node between the first capacitor and the second switch, and detecting a change in a capacitance of the second capacitor; a filter circuit connected to the connection node, transmitting a potential of a frequency including switching frequencies of the second and third switches, and not transmitting a potential of another specific frequency; and a sample-and-hold circuit connected between the filter circuit and the control circuit.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: September 15, 2020
    Assignee: AISIN SAIKI KABUSHIKI KAISHA
    Inventor: Akira Takahashi
  • Patent number: 10725583
    Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: July 28, 2020
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Eric Scott Bohannon, Marshall J. Bell, Jr., Yihong Yang
  • Patent number: 10718730
    Abstract: A change in an imaginary part of a complex dielectric constant of an inspection object containing moisture is detected as a change in an oscillation frequency. A sensor device includes an oscillation unit that is formed in a semiconductor integrated circuit and an oscillation frequency detection unit that detects an oscillation frequency of the oscillation unit. The oscillation unit has capacitors that are connected to an inspection object in series and changes the oscillation frequency in accordance with a complex dielectric constant of the inspection object.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: July 21, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Nobuyuki Ashida, Kunihiko Iizuka, Akira Saito, Takeshi Mitsunaka
  • Patent number: 10712360
    Abstract: An integrated circuit measures a differential change between first and second mutual capacitances having receiver electrodes joined to form a common electrode of an MEMS circuit. The integrated circuit performs charge transfer measurements to transfer charge to a reference capacitor and a variable capacitor is used to change the amount of charge stored in the reference capacitor. First and second charge transfer measurements are performed, each having a number of charge transfer cycles used to transfer charge from the common electrode to the reference capacitor. In the first measurement, a transmit electrode of the first capacitance is driven high first, and in the second measurement, a transmit electrode of the second capacitance is driven high first. The circuit compensates for parasitic capacitances in the MEMS circuit with a sample-and-hold circuit selectively connected to the common electrode to maintain its voltage during a charge phase of a charge transfer cycle.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: July 14, 2020
    Assignee: AZOTEQ (PTY) LTD
    Inventor: Douw Gerbrandt Van Der Merwe
  • Patent number: 10700698
    Abstract: A disclosed linearization circuit includes a reference component, a charging and discharging controller, and a comparator circuit. The reference component has a non-linear dependence on current or voltage. The charging and discharging controller is configured to control alternating charging and discharging of the reference component. A voltage associated with the reference component forms a reference signal. The charging and discharging are controlled such that the reference signal has a periodic time dependence. The reference signal and a measurement signal are received by the comparator circuit. The comparator circuit is configured to generate and output a square-wave signal based on a reference time point during a charge-discharge cycle, and based on a result of a comparison of the reference signal with the measurement signal, such that the square-wave signal represents a linearized output signal. This disclosure further relates to a corresponding method.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: June 30, 2020
    Assignee: Micro-Epsilon Messtechnik GMBH & Co. KG
    Inventor: Harald Haas
  • Patent number: 10690610
    Abstract: Noncontact sensing components are provided herein, in an aspect, they can be for an electronic device. The noncontact sensing components can contain a semiconductor layer having a r-GO portion and a CNT portion. The noncontact sensing components can be used to detect the presence or movement of a humidity source in the vicinity of the noncontact sensing component. The resistance/humidity response of the component can be based on the combined contribution of carbon nanotube (positive resistance variation) and reduced-graphene oxide (negative resistance variation) behaviors.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: June 23, 2020
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Yanlong Tai, Gilles Lubineau
  • Patent number: 10572058
    Abstract: An integrator circuit device for integrating an input signal includes an integrator configured to perform integration on an input signal in a positive direction or a negative direction to generate an output voltage, and a switching controller configured to control a switch so that the integrator performs the integration on the input signal in the positive direction or the negative direction. The integrator circuit device further includes a counter configured to count a number of times an integration direction of the integrator is changed, and a controller configured to determine a final output voltage, based on the counted number of times the integration direction is changed and the output voltage.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: February 25, 2020
    Assignee: SAMSUNG ELECTORNICS CO., LTD.
    Inventors: Jinmyoung Kim, Seokwhan Chung