Digital Voltmeters Patents (Class 324/99D)
  • Patent number: 4733217
    Abstract: A subranging analog-to-digital converter is disclosed. A coarse analog-to-digital converter has an analog input terminal coupled to a source of analog signal, a digital output terminal, and a range indication output terminal. First and second fine analog-to-digital converters each have an analog input terminal coupled to the analog signal source, a range selection input terminal coupled to the range indication output terminal, and a digital output terminal. A combining circuit has input terminals coupled to the digital output terminals of the coarse and first and second fine analog-to-digital converters. The coarse analog-to-digital converter operates on every clock cycle, and the fine analog-to-digital converters operate alternately on every other clock cycle to produce a sequence of digital samples representing the analog signal, one for each clock cycle.
    Type: Grant
    Filed: May 8, 1986
    Date of Patent: March 22, 1988
    Assignee: RCA Corporation
    Inventor: Andrew G. F. Dingwall
  • Patent number: 4727310
    Abstract: A measuring instrument capable of providing its readouts of measurements of a physical quantity such as voltage, current or resistance includes voice synthesizer circuitry which may be realized by the use of a large scale integrated circuit (LSI) chip. A mode selector switch is provided for selection of an audible indication mode and a visual indication mode.
    Type: Grant
    Filed: August 4, 1982
    Date of Patent: February 23, 1988
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shintaro Hashimoto, Sigeaki Masuzawa, Hiroshi Miyazaki, Yutaka Ikemoto, Susumu Maetani, Akira Tanimoto
  • Patent number: 4707680
    Abstract: To eliminate crosstalk between successive measurements of an integrating analog-to-digital converter having MOS linear amplifiers (16) that as a result of ion distribution shift in its input devices gate oxide (24) tends to retain a conversion residue (R), at least one "dummy" conversion cycle (38) is executed prior to each input signal measurement. The "dummy" conversion cycle (38) reduces the residue (R) by moving input gate ions into stable positions corresponding to the magnitude of the input signal to be next measured.
    Type: Grant
    Filed: March 4, 1986
    Date of Patent: November 17, 1987
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Bryan L. Sparrowhawk
  • Patent number: 4694277
    Abstract: A dual slope A/D converter with a zero compensation circuit includes a single power source, an integrator, and a MOS switch constituting the zero compensation circuit and adapted to apply an output voltage to the noninverting input terminal of an operational amplifier constituting the integrator for a zero compensation duration. The A/D converter further includes an amplifier and a MOS transistor with the same characteristics as those of the MOS switch. The gate and source of the MOS transistor are connected to the noninverting input terminal of the operational amplifier. The amplifier doubles a voltage at the noninverting input terminal of the operational amplifier. A doubled voltage is applied to the drain of the MOS transistor.
    Type: Grant
    Filed: February 21, 1986
    Date of Patent: September 15, 1987
    Assignee: NEC Corporation
    Inventor: Akinori Takahashi
  • Patent number: 4670663
    Abstract: A test voltage is applied through an array of "guarded" switches (58) to selected ones of a plurality of components to be measured. Each switch (58) comprises first and second input terminals (69, 72), first and second output terminals (70, 74), and a wire (76) interconnecting the second input and second output terminals (72, 74). The switch (58) is operable selectively in a first state interconnecting its first input and output terminals (69, 70) and in a second state interconnecting the second input and output terminals (72, 74). A buffer amplifier (88) couples the input signal from the first input terminal (69) to the wire (76) interconnecting the second and output terminals (72, 74) of the switch (58) as a "guard voltage" to prevent loading of the input signal by leakage resistances within the switch.
    Type: Grant
    Filed: November 28, 1984
    Date of Patent: June 2, 1987
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: James E. Fancher
  • Patent number: 4656459
    Abstract: Conversion is achieved by subdividing the intergrate and deintegrate periods into a plurality of integrate and deintegrate phases. Power frequency rejection can be maintained by defining the combined integrate phases to integrate over at least one complete power line cycle. Sychronization of the integrate phases with the power line cycle is maintained by separating integrate phases with a combined deintegrate and rest phase of fixed duration.
    Type: Grant
    Filed: October 7, 1985
    Date of Patent: April 7, 1987
    Assignee: Intersil, Inc.
    Inventor: Charles R. Thurber, Jr.
  • Patent number: 4654635
    Abstract: By means of a controlled integrator, a noise component in the residual signal which is left after a conversion cycle of an analogue-to-digital converter can be eliminated for the major part. It is then possible to digitize this residual signal and thus to obtain additional bit information, as a result of which the range and the resolving power of the analogue-to-digital converter are increased.
    Type: Grant
    Filed: September 5, 1985
    Date of Patent: March 31, 1987
    Assignee: U.S. Philips Corporation
    Inventor: Rudy J. Van De Plassche
  • Patent number: 4652830
    Abstract: Circuit for measuring the relative change in conductivity between two cells which include a test biorigion and a control biorigion as the test cell biorigion conductivity changes as a result of analyte modecules binding to receptor sites in the test cell biorigion. The invention includes circuitry for driving a current through each of the cells and for measuring the voltage drops across the test and control cells as a function of time. A novel two-stage ac analog-to-digital convertion circuit in which the initial conductivities are measured via a successive approximation process, while the relative conductivities are monitored during a test interval via a tracking technique is included. The circuitry is controlled by a digital controller which can vary the parameters of the measurement processes so as to make the circuit adaptable to the measurement of a wide variety of substances using different cell configurations and/or electrolytes.
    Type: Grant
    Filed: April 18, 1985
    Date of Patent: March 24, 1987
    Assignee: EG&G Ocean Products, Inc.
    Inventor: Neil L. Brown
  • Patent number: 4649372
    Abstract: An analogue to digital converter comprises first and second switches (21:26) for sampling alternately first and second analogue signals, respectively, first and second integrators (22:27) which are supplied with the first and second analogue signals sampled alternately by the first and second switches (21:26), respectively, and produce output voltages varying in response to the first and second analogue signals supplied thereto, a constant current source section (32) operative to supply with a constant current to the first integrator (22) when the first switch (21) is in the OFF state and to the second integrator (27) when the second switch (26) is in the OFF state, and a digital signal generating section (34, 35) which is supplied alternately with comparison outputs obtained by comparing the output voltages of the first and second integrators derived therefrom when the constant current is supplied thereto with a predetermined voltage, respectively, and produces a digital signal corresponding to a duration de
    Type: Grant
    Filed: November 25, 1983
    Date of Patent: March 10, 1987
    Assignee: Sony Corporation
    Inventors: Miki Abe, Tadao Suzuki
  • Patent number: 4644323
    Abstract: A programmable timer controls the duration of integration with respect to time of an unknown analog signal in accordance with a programmable time period established by a microprocessor. A switching logic successively transfers an analog signal and a voltage reference signal to an integrator under logic control actuated by the programmable timer. A comparator monitors the value of the integration of the reference voltage in order to control the time-out results of an event counter initiated simultaneously with input to the integrator of the reference voltage, for providing a digital count output signal to the microprocessor.
    Type: Grant
    Filed: August 26, 1980
    Date of Patent: February 17, 1987
    Assignee: The Perkin-Elmer Corporation
    Inventors: Morteza M. Chamran, Larkin B. Scott, Paul B. Williams
  • Patent number: 4635043
    Abstract: A level indication has a ratio-measurement mechanism whose measurement coil can be connected to a source of current (6) via a switch element (12). This switch element (12) is controlled by the output of a comparator (10) to the input side of which a voltage signal from a transmitter (5) monitoring the level and the output of a frequency transmitter (11) are fed. Between the transmitter (5) and the comparator (10) there is arranged a damping device (8) so that the signal coming from the transmitter (5) is made stable before it arrives at the comparator (10).
    Type: Grant
    Filed: June 21, 1985
    Date of Patent: January 6, 1987
    Assignee: VDO Adolf Schindling AG
    Inventors: Harmut Kronenberg, Bernhard v. Pentz
  • Patent number: 4620148
    Abstract: A precision current meter of wide dynamic range and sensitivity to low currents is disclosed. The precision current meter is particularly useful as a component for spectrochemical computations in spectrometers for the simultaneous multielement analysis of unknown samples in solution. The precision current meter comprises a source of input current, preferably a photomultiplier tube, an integrator having an integrating capacity for detecting the input current from the source, a source of reference currents including an offset current, a switch with a drain current coupled to the integrator. A clock is provided for generating clock signals for the current meter, including a series of pulses to actuate the switch and thereby to admit drain current segments to the integrator.
    Type: Grant
    Filed: August 27, 1984
    Date of Patent: October 28, 1986
    Assignee: Baird Corporation
    Inventors: Arthur L. Davison, Martin D. Blackburn, Donald A. Sellek
  • Patent number: 4608553
    Abstract: The conversion is effected by adding equal and opposite reference voltages to the analog signal to provide two first output voltage levels. The voltage difference between these levels is converted into a first given number of pulses. The polarity of the analog signal is then reversed during the second half of the cycle so as to be subtracted from the reference voltages for providing two second output voltage levels. The voltage difference between these levels is converted into a second given number of pulses. A function of the first and second number of pulses provides a numerical count directly proportional to the analog signal with all zero drift eliminated. A second conversion can be made to provide a digital read-out which is free from both zero drift and span drift.
    Type: Grant
    Filed: March 1, 1983
    Date of Patent: August 26, 1986
    Inventor: A. Neuman Ormond
  • Patent number: 4598270
    Abstract: An analog-to-digital conversion system of the incremental pulse-width modulation type for generating a digital representation of the amplitude of an input analog current to be converted comprising a current integrator, a precision unipolar current source, means for switching current from that source in opposite directions to and from a current summing terminal at the input to the integrator, a timing source, and pulse-width control circuit which controls the means for switching current and which controls a clock signal gating circuit on and off to obtain the output digital representation.
    Type: Grant
    Filed: October 4, 1984
    Date of Patent: July 1, 1986
    Assignee: Rockwell International Corporation
    Inventors: Sidney G. Shutt, Adrian K. Dorsman
  • Patent number: 4595906
    Abstract: An analog to digital converter is provided in which the converter output is scaled in accordance with the ratio of the clocking frequencies.
    Type: Grant
    Filed: August 12, 1982
    Date of Patent: June 17, 1986
    Assignee: Intersil, Inc.
    Inventor: David Bingham
  • Patent number: 4588984
    Abstract: An analog-to-digital conversion system comprising: a precision floating current source for supplying a precision current to a current source terminal and for sinking an equivalent precision current at a current sink terminal, a summing terminal for receiving an analog signal current, enabling means for directing the flow of the precision current from the current source terminal to the summing terminal during a first mode of operation and for sinking the precision current from the summing terminal during a second mode of operation, an integrator for generating a voltage signal proportional to the integral of the sum of the precision and analog currents flowing through the summing terminal; and second means, coupled to the enabling means, being responsive to the voltage signal and to clock pulses for controlling the first and second modes of operation of the enabling means and for generating a digital representation of the amplitude of the analog current.
    Type: Grant
    Filed: December 12, 1983
    Date of Patent: May 13, 1986
    Assignee: Rockwell International Corporation
    Inventor: Adrian K. Dorsman
  • Patent number: 4588983
    Abstract: In a dual slope analog to digital converter, the input amplifier has an input selectively connectable to an unknown analog source or a known opposite polarity analog source. The output of the amplifier is directly or indirectly connectable to its other input to change the gain of the output. A microprocessor controls the converter to sequentially connect the unknown analog source, instantaneously change the output connection to change gain where appropriate, and connect the known analog source.
    Type: Grant
    Filed: June 17, 1985
    Date of Patent: May 13, 1986
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Norman H. Strong
  • Patent number: 4574271
    Abstract: A multi-slope analog-to-digital converter avoids the dielectric absorption problem by providing a predetermined number of risings and fallings of the output of an integrator integrating an input analog signal during a first predetermined period of time, each falling corresponding to the simultaneous integration of a first reference signal during the first integration period. Subsequently the first reference signal is integrated for a time period to assure that the output signal of the integrator has a predetermined polarity, prior to completing the measurement of the input analog signal during further integration periods. Variations in the number of switching delays, and variations depending upon the direction with which the output of the integrator approaches a reference level, may thus be avoided.
    Type: Grant
    Filed: November 9, 1982
    Date of Patent: March 4, 1986
    Assignee: Takeda Riken Co., Ltd.
    Inventor: Eiichi Yada
  • Patent number: 4573037
    Abstract: A system and method is provided for producing digital signals proportional to selected parameters of an input signal supplied to a modulator. The modulated output of the modulator is supplied to a delaying bistable circuit, and both the original output and the delayed output are then supplied to a gate, together with a clocking signal. The output of the gate includes pulses only when the modulated signal and the delayed modulated signal are simultaneously at the same level. As such, the digital output of the gate is a representation of the amount by which one level of the modulated signal exceeds the other, and is directly proportional to the magnitude of one polarity of the signal input to the modulator. Techniques are described for extracting digital signals proportional to the magnitudes of both the positive and negative half waves of the input signal, full waveform magnitude, and waveform offset and polarity.
    Type: Grant
    Filed: August 1, 1983
    Date of Patent: February 25, 1986
    Assignee: Robinton Products, Inc.
    Inventors: Michael A. Robinton, Alan H. Starkie
  • Patent number: 4568913
    Abstract: An integrating type analog-to-digital converter with improved time measurement capabilities and a very fast conversion cycle. The converter operates by integrating an analog input signal for a predetermined time period and then deintegrating the integrated signal until its output crosses zero. The time it takes for the integrator to cross zero is measured by a digital clock, and the zero crossing is detected as occurring on the first clock pulse after the integrator output has actually crossed zero. The residual output of the integrator at the point of detection is multiplied by a predetermined negative amount and fed back so that the integrator output assumes the multiplied value of the residual. The integrator is then deintegrated for a second time and the time it takes for the integrator output to pass zero is again measured by the clock. The measured time is proportional to the error in the measurement between the detected zero crossing and actual zero crossing in the initial deintegration cycle.
    Type: Grant
    Filed: November 22, 1982
    Date of Patent: February 4, 1986
    Assignee: Intersil, Inc.
    Inventor: Lee L. Evans
  • Patent number: 4567429
    Abstract: An improved digital servo indicator of the continuous null-balance potentiometric type is disclosed which includes a microcomputer to provide a digital readout of the measured results in the desired engineering unit, or to use the readout in further calculations as desired. The indicator includes a digital-to-analog conversion means using a cascading series of circuits each having a precision resistance element and a pair of MOSFETs for selectively connecting a constant reference voltage to the output through the resistance element to produce the desired analog output.
    Type: Grant
    Filed: February 2, 1982
    Date of Patent: January 28, 1986
    Assignee: Quest Corporation
    Inventor: Robert A. Livsey
  • Patent number: 4563770
    Abstract: An electrical measuring instrument, such as a multi-meter, for measuring such electrical variables as current, voltage, resistance, impedence, frequency and other variables. The results of such measurement are both displayed and are provided as sounds of words of speech indicating measurements as they are made. A memory temporarily records the results of measurement and provides signals, on demand, for repeating the generation of synthetic speech indicating the results of a measurement. In one form, signals representative of a plurality of different measurements are recorded in the memory and each may be selectively reproduced for display and/or generating synthetic speech indicative of the particular measurement represented thereby. A keyboard forming part of the measuring instrument may be employed for the selective reproduction of signals from the memory as well as for coding the recorded signals so that they may be selectively reproduced from the memory.
    Type: Grant
    Filed: October 3, 1979
    Date of Patent: January 7, 1986
    Inventors: Jerome H. Lemelson, Christian Grund
  • Patent number: 4559521
    Abstract: A method for compensating for errors in reference current ratios in a multi-slope A-D converter allows determining multiplying factors for correcting the measured digital values of input analog signals that are being measured. The multiplying factors are determined using the components of the A-D converter.
    Type: Grant
    Filed: December 3, 1982
    Date of Patent: December 17, 1985
    Assignee: Takeda Riken Co., Ltd.
    Inventor: Eiichi Yada
  • Patent number: 4556867
    Abstract: A dual slope analog to digital (A/D) converter starts by auto zeroing and making a number of high speed A/D samples before auto zeroing again. A microprocessor causes output of the high speed samples for a bar graph and applies predetermined correction factors to allow accumulation of the high speed samples to provide a high accuracy numerical output.
    Type: Grant
    Filed: November 1, 1982
    Date of Patent: December 3, 1985
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Richard E. George
  • Patent number: 4541065
    Abstract: A stable voltage reference is connected to a two channel digital to analog converter connected to a range setting amplifier which provides the calibrator output. A microprocessor zeroes the calibrator by shorting the inputs of a zero amplifier to provide a reference zero towards which the calibrator is adjusted. It establishes the relative weighing of the two channels by adjusting one channel one increment up from zero and measuring the number of increments required by the other channel to return to zero. The microprocessor determines the gain change in the converter by establishing a bridge with known components and relating changes in the bridge voltage to the shift in gain.
    Type: Grant
    Filed: September 14, 1982
    Date of Patent: September 10, 1985
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Neil P. Faulkner, Walter W. Prue, Jr.
  • Patent number: 4536744
    Abstract: An analog-to-digital converter for performing extremely accurate measurements of AC voltages. In the conversion process, the most significant bits are determined using a precision ratio transformer having multiple, binary-weighted windings which are selectively connected in series during a first interval to provide an approximation to the input voltage to be measured via a successive approximation conversion technique. The digital value so determined is clocked into a bi-directional counter. The transformer output signal at the end of the first interval is subtracted from the input signal to give an AC residue signal which represents the round-off error from the successive approximation conversion performed during the first interval. The residue signal is synchronously detected and applied to a dual slope type of converter during a second interval, the digital output thereof being accumulated in the counter.
    Type: Grant
    Filed: June 28, 1983
    Date of Patent: August 20, 1985
    Assignee: Neil Brown Instrument Systems, Inc.
    Inventor: Neil L. Brown
  • Patent number: 4532470
    Abstract: A measuring instrument provides a reading only when a desired measurement is taken by making successive measurements and waiting until two successive measurements are within a predetermined low range, the measurements are above a predetermined floor range, and the difference between a reading and successive measurements exceed a predetermined high range.
    Type: Grant
    Filed: November 22, 1982
    Date of Patent: July 30, 1985
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Thomas W. Wiesmann
  • Patent number: 4531089
    Abstract: In a gain control circuit, an electric power calculating circuit is connected to a variable gain amplifier and a gain setting circuit for generating a gain control signal applied to the variable gain amplifier to control the gain thereof.
    Type: Grant
    Filed: February 11, 1982
    Date of Patent: July 23, 1985
    Assignees: Hitachi, Ltd., Hitachi Denshi Kabushiki Kaisha
    Inventors: Kohei Ishizuka, Yasuhiro Kita, Narimichi Maeda, Masahiro Koya, Kazuhiko Takaoka, Yoshiro Kokuryo
  • Patent number: 4518948
    Abstract: An analog-to-digital converter incorporating a series arrangement (3, 4, 5, 6) of an integrating circuit (3), a comparison circuit (4), a flip-flop (5) and a gate (6), a clock pulse signal being applied to the two last-mentioned components. An output of the flip-flop (5) is fed back to the input (14) of the integrating circuit (3) to which also the signal to be converted is applied via a switchable current source circuit (15). For effecting an optimum (ideal) integration resulting in a linear conversion, the integrating circuit (3) has a construction as shown in the drawing, it being essential for the product of the value of the capacitor 9 and the resistor 10 to be substantially equal to the value of the capacitor 12 and the resistor 11. The capacitor values and the resistor values may, for example, be equal.
    Type: Grant
    Filed: November 1, 1982
    Date of Patent: May 21, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Frederik J. VanRoessel
  • Patent number: 4510444
    Abstract: Digital measuring device, including a trigger generator having an input for receiving an analog measuring input signal, a variable delay line being connected to the trigger generator and having an output, an analog/digital converter receiving the analog measuring input signal, a transient memory connected to the analog/digital converter, a picture refresh memory connected to the transient memory for storing the measuring input signal, a Walsh function generator connected to the picture refresh memory, a liquid-crystal picture screen being connected to and addressed by the Walsh function generator, the output of the variable delay line being connected to the analog/digital converter, the transient memory and the picture refresh memory, and a selectable time base being connected to the variable delay line, the analog/digital converter and the transient memory.
    Type: Grant
    Filed: June 4, 1982
    Date of Patent: April 9, 1985
    Assignee: Metrawatt GmbH
    Inventors: Werner Haussel, Gunter Roppelt, Robert Kindermann
  • Patent number: 4503395
    Abstract: In order to measure a magnetic field, an exciting current rising in small increments is applied to a measuring probe so that the coil of the probe traverses the entire range from the negative saturation up to the positive saturation. At the secondary side, respective voltage pulses which decay according to an e-function are measured at the coil. The time constant of the voltage pulses corresponds to the respective coil inductance. Since the coil inductance is shifted relative to the zero point of the exciting current due to an external magnitude field, more voltage pulses with a high time constant are produced on one side of the zero point than on the other side. By means of digital counting of all voltage pulses whose time constant exceeds a minimum value both given a negative exciting voltage as well as given a positive exciting voltage, one obtains two measured values whose difference directly produces a measured value for a strength of the external magnetic field.
    Type: Grant
    Filed: May 19, 1982
    Date of Patent: March 5, 1985
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfgang Kratzer, Peer Thilo
  • Patent number: 4490713
    Abstract: An analog-to-digital converter which is supervised by a microprocessor and includes means for digitally compensating for initial gain and offset errors and gain and offset drift errors due to temperature variations. An analog input voltage is applied to a first analog-to-digital converter, the output of which is both stored in the microprocessor and applied to a linear digital-to-analog converter. The output of the linear converter is summed with the original analog input voltage and the difference applied to the conversion apparatus as an unknown input signal. This process is continued to achieve a desired resolution. The output of a differential temperature sensor is similarly processed to determine the proper amount of compensation for gain and offset drift. The microprocessor provides both control and computation capabilities.
    Type: Grant
    Filed: June 8, 1982
    Date of Patent: December 25, 1984
    Assignee: Burr-Brown Inc.
    Inventors: Andrij Mrozowski, Paul R. Prazak
  • Patent number: 4485372
    Abstract: A two-stage analog-to-digital converter wherein the first stage is a resistor-string d-to-a converter controlled by a successive-approximation register, functioning in a first phase of the conversion operation to determine a set of higher order bits of the digital output signal. The second stage is a dual-slope integrating-type a-to-d converter functioning in a second phase of the conversion operation to determine the remaining lower-order bits of the digital output signal. The dual-slope converter receives a reference signal derived from two adjacent junction points of the first-stage resistor-string d-to-a converter corresponding to the higher order bits determined in the first phase of operation, thereby to assure high resolution performance.
    Type: Grant
    Filed: October 9, 1981
    Date of Patent: November 27, 1984
    Assignee: Analog Devices, Incorporated
    Inventor: Peter R. Holloway
  • Patent number: 4475398
    Abstract: The attenuation of RF pulses passing through a mineral slurry is determined by measuring the amplitude of the envelope produced by a series of successively occurring attenuated electrical pulses. The pulses are applied to the input of a variable gain amplifier, the gain of which is under control of a digital processor. The peak amplitude of each pulse is compared with a fixed reference voltage. The contents of a storage register associated with the processor is modified dependent upon whether the pulse amplitude is geater or less than the reference voltage. The contents of the register is used to control the gain of the variable gain amplifier in such a way that the amplitude of the next successive pulse will approach the value of the reference voltage. After the last pulse has been measured, the gain of the amplifier is inversely proportional to the amplitude of the pulse envelope, and the contents of the successive approximation register will also be proportional to the amplitude of the pulse envelope.
    Type: Grant
    Filed: October 8, 1982
    Date of Patent: October 9, 1984
    Assignee: Armco Inc.
    Inventors: David J. Tjornehoj, Donald E. Dick, Richard E. Kiefer, Fred L. Smith, III
  • Patent number: 4465370
    Abstract: A light measuring device includes one or more photodiodes, which generate current in relation to the received light, and at least one capacitor for integrating the generated current. The amount of charge stored in the at least one capacitor at the completion of the integration is roughly detected by the number of capacitors used and/or the voltage across the capacitor. A current source capable of producing different levels of current in accordance with the detected amount of charge is provided for changing the amount of charge stored in the at least one capacitor. The time needed to change the amount of charge stored in the at least one capacitor is measured so as to obtain the value of total amount of the change in the charge stored in the at least one capacitor and to thus obtain the value of the received amount of light intensity.
    Type: Grant
    Filed: June 30, 1981
    Date of Patent: August 14, 1984
    Assignee: Minolta Camera Kabushiki Kaisha
    Inventors: Yoshio Yuasa, Nobukazu Kawagoe
  • Patent number: 4450924
    Abstract: It is known in high-resolution electronic weighing scales based on the principle of electromagnetic force compensation that the load-dependent development of heat in a coil and a precision resistor can be compensated by sending an additional alternating current through the coil and the precision resistor which is complementarily regulated in its amplitude. In order to regulate the amplitude of this alternating current, the invention proposes a simplified circuit which comprises a highly temperature-dependent resistor, the resistance value of which is set at a fixed theoretical value.
    Type: Grant
    Filed: December 17, 1982
    Date of Patent: May 29, 1984
    Assignee: Sartorius GmbH
    Inventors: Lothar Behrend, Eric Knothe, Franz-Josef Melcher, Jurgen Ober
  • Patent number: 4431966
    Abstract: A modular backlighted analog/digital display for use in a cylindrical aircraft instrument housing. The analog indicator dial is backlighted by an illumination source diffused by a translucent light collecting plate having a configuration corresponding to that of the analog dial. A polarizing filter is mounted in an opening formed in a portion of the light collecting plate to enhance image contrast of the digits of a digital display of the self-illuminated type, e.g. an incandescent or LED digital readout, that is exposed through a cutout portion formed in the analog dial. In addition, the interior of the opening in which the display is received can be coated with a light opaque material to prevent light scattered from the light collecting plate from reaching the face of the digital display and washing out the digits. The analog pointer is formed from a translucent material and is connected to an analog meter mechanism.
    Type: Grant
    Filed: May 12, 1981
    Date of Patent: February 14, 1984
    Assignee: Sangamo Weston, Inc.
    Inventor: Frank Pucciarello
  • Patent number: 4423408
    Abstract: A data gathering panel is disclosed for converting analog values into digital values having input terminals for connection to analog sensors, a memory for storing a base value and a range value associated with the sensor, a base circuit connected to the memory for applying the base value to the analog value, and an analog-to-digital converter using the analog value, the base value and the range value for converting the analog value into a digital value. The data gathering panel may also permit connection to a plurality of input sensors having different characteristics by providing a memory for storing the different characteristics of the input sensors to be used by a processor in processing the information derived from the sensors. This memory may be a programmable read-only memory and the data gathering panel may have a facility thereon for allowing the altering of information stored in the programmable read-only memory.
    Type: Grant
    Filed: February 9, 1981
    Date of Patent: December 27, 1983
    Assignee: Honeywell Inc.
    Inventor: William C. Place
  • Patent number: 4404545
    Abstract: Errors in determining a measured voltage are mathematically canceled in an analog-to-digital converter circuit useful for dual slope type using positive and negative values of a reference voltage. The errors are due to the off-set voltages inherent to operational amplifiers employed for an integrator and a comparator included within the analog-to-digital converter circuit. A counter circuit is provided for storing time information related to first and second dual slopes. A mathematical calculation is conducted with the aid of all the time information of the first and second dual slopes, whereby the measured voltage can be determined with eliminating the influence by the off-set voltage.
    Type: Grant
    Filed: April 28, 1981
    Date of Patent: September 13, 1983
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tousaku Nakanishi, Hiroshi Tsuda
  • Patent number: 4395701
    Abstract: An integrating type analog-to-digital converter with improved time measurement capabilities and a very fast conversion cycle. The converter operates by integrating an analog input signal for a predetermined time period and then deintegrating the integrated signal until its output crosses zero. The time it takes for the integrator to cross zero is measured by a digital clock, and the zero crossing is detected as occurring on the first clock pulse after the integrator output has actually crossed zero. The residual output of the integrator at the point of detection is multiplied by a predetermined negative amount and fed back so that the integrator output assumes the multiplied value of the residual. The integrator is then deintegrated for a second time and the time it takes for the integrator output to pass zero is again measured by the clock. The measured time is proportional to the error in the measurement between the detected zero crossing and actual zero crossing in the initial deintegration cycle.
    Type: Grant
    Filed: March 25, 1980
    Date of Patent: July 26, 1983
    Assignee: Intersil, Inc.
    Inventor: Lee L. Evans
  • Patent number: 4390864
    Abstract: The conversion is effected by adding equal and opposite reference voltages to the analog signal to provide two first output voltage levels. The voltage difference between these levels is converted into a first given number of pulses. The polarity of the analog signal is then reversed during the second half of the cycle so as to be subtracted from the reference voltages for providing two second output voltage levels. The voltage difference between these levels is converted into a second given number of pulses. A function of the first and second number of pulses provides a numerical count directly proportional to the analog signal and because of the bipolar operation; that is, the switching of the polarity of the analog input signal, all zero drift is eliminated.
    Type: Grant
    Filed: May 11, 1981
    Date of Patent: June 28, 1983
    Inventor: A. Newman Ormond
  • Patent number: 4381498
    Abstract: Microprocessor controlled analog-to-digital converting apparatus. For each analog signal input line there is a comparator having one input connected to the associated analog signal input line. A ramp generator is connected in common to the other input of all of the comparators. A multiplexing arrangement is operated by the microprocessor to couple a selected one of the comparators to a storage register in the microprocessor. The selected comparator compares the voltage of the analog input signal to the ramp voltage. If the analog voltage is higher, the comparator output remains inactive and the microprocessor causes a count to be stored in the storage register. The ramp generator is toggled to increase the ramp voltage by a predetermined step. The comparison of the analog voltage and ramp voltage is repeated. If the comparator output remains inactive, another count is accumulated in the storage register and the ramp generator is toggled to increase its voltage by another step.
    Type: Grant
    Filed: July 6, 1981
    Date of Patent: April 26, 1983
    Assignee: GTE Laboratories Incorporated
    Inventor: Thomas C. Goodale
  • Patent number: 4379260
    Abstract: A dual-slope integrator is provided in the usual manner with input switches for a measured voltage and reference voltage and with a first counter having a count capacitor N.sub.1, in addition to the usual integrating resistor and integrator condenser in circuit with an integrating amplifier. The output of the latter is applied to a comparator and a clock-pulse generator produces the counting pulses. According to the invention, a second counter is provided with a capacitor N.sub.2 so that the two counters together have a capacity N.sub.1 .times.N.sub.2, the input switching circuit is keyed by the clock pulses, and a further amplifier of amplification N*.sub.2 is provided, the amplification factor N*.sub.2 being approximately equal to N.sub.2.
    Type: Grant
    Filed: December 20, 1979
    Date of Patent: April 5, 1983
    Assignee: Kernforschungsanlage Julich GmbH
    Inventor: Herwig Labus
  • Patent number: 4375616
    Abstract: A substantially non-loading circuit for measuring voltages in a range with relatively high upper limit uses a resistive voltage divider for scaling down these voltages for application to a digital voltmeter capable of measuring voltages in a range with relatively low upper limit. The loading that the input circuit of the resistive potential divider would place on the circuit being measured is reduced by placing the loading of the potential divider input circuit on an electrically adjustable voltage supply, rather than the circuit being measured. The current loading on the circuit being measured is sensed; and the output voltage of this supply is automatically adjusted by feedback to reduce the sensed circuit. In this way, loading of the circuit being measured is reduced, thus avoiding undesirable reduction of the voltage across the circuit owing to its being loaded.
    Type: Grant
    Filed: September 11, 1980
    Date of Patent: March 1, 1983
    Assignee: RCA Corporation
    Inventors: Scott C. Keller, Linus C. Ruth
  • Patent number: 4364028
    Abstract: An integrating analog to digital converter having a switching circuit for selecting any one of an analog input voltage, a first reference voltage, or an analog ground voltage; an intermediate voltage selected by the switching circuit and the intermediate voltage generated by the intermediate voltage generating circuit; and a comparator for producing a signal to control the operation of the switching circuit and the voltage level produced by the intermediate voltage generating circuit according to the results of a comparison between the output signal from the integration circuit and a second reference voltage.
    Type: Grant
    Filed: April 20, 1981
    Date of Patent: December 14, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Eiji Masuda, Yasoji Suzuki
  • Patent number: 4361831
    Abstract: An analog current I.sub.1, to be digitized is fed continuously to the input of an integrator. Two pulse counters, serially connected, algebraically count pulses from a pulse generator, the first pulse counter of the two setting, upon overflow, a bistable element to one of its states. The bistable element will remain in the state until the first pulse of the pulse generator, after the next change-over of the threshold switch occurs. In accordance with the state of the threshold switch, the bistable flip-flop circuit permits either a current I.sub.2, or a current I.sub.3 (the two currents being of opposite polarity) to be applied, simultaneously with the current I.sub.1, to the integrator by suitable switches during predetermined time intervals W. The time interval W is defined as the sum of the timing intervals occurring between two successive overflow pulses of the second counter during which I.sub.2 is simultaneously integrated with current I.sub.
    Type: Grant
    Filed: May 10, 1979
    Date of Patent: November 30, 1982
    Inventors: Hartmut Grutzediek, Joachim Scheerer
  • Patent number: 4353028
    Abstract: A measuring circuit for integrating electrical signals. The measuring circuit comprises a delay line which is connected between the output of an integration stage and the input of a discharge stage in order to render the value of the discharge current dependent on a voltage which remains during said discharging. The circuit may also comprise a timing circuit which ensures that said constant voltage is maintained for a sufficiently long period of time. The measuring circuit may also comprise a circuit for advancing the opening a discharge switch in order to take into account the time required for transmitting the control signals for opening the discharge switch to this switch.
    Type: Grant
    Filed: December 12, 1979
    Date of Patent: October 5, 1982
    Assignee: U.S. Philips Corporation
    Inventor: Hans Faddegon
  • Patent number: 4339958
    Abstract: An analog-to-digital converter for an electromagnetic flowmeter in which the fluid being metered passes through a flow tube to intersect a magnetic field, the voltage induced in the fluid being transferred to a pair of electrodes. The magnetic field is established by an electromagnet supplied with excitation current that is alternately turned "on" and "off" at a low frequency rate. The resultant flow-induced electrode signal is sampled for a predetermined interval in each "on" and "off" field state, successive differences therebetween serving to develop an analog signal representing the flow rate. Conversion is effected by integrating each sample to produce a sloped voltage whose polarity corresponds to that of the sample and whose peak level relative to a base level is determined by the amplitude of the sample, the sloped voltage being then de-integrated back to base level in a time slot whose duration is directly proportional to the average level of the sample.
    Type: Grant
    Filed: February 21, 1980
    Date of Patent: July 20, 1982
    Assignee: Fischer & Porter Co.
    Inventor: Herbert A. Shauger
  • Patent number: 4340883
    Abstract: In a bipolar mark-space analogue-to-digital converter, two opposed-polarity reference voltages are applied to an integrator during a first conversion interval to balance a square-wave forcing-function signal and an input signal whose magnitude is to be measured, and a counter receives clock pulses at up and down inputs during application of the positive and negative reference voltages respectively. Subsequently, zero input signal is applied during a second conversion interval, and the inputs to the counter are interchanged, so that up- and down-counted pulses correspond to the negative and positive reference voltages respectively. At the end of the second conversion interval, the counter contains a digital representation of the input signal, corrected for zero drift.
    Type: Grant
    Filed: June 14, 1978
    Date of Patent: July 20, 1982
    Assignee: The Solartron Electronic Group Limited
    Inventor: John G. Cook
  • Patent number: RE31606
    Abstract: In a digital test instrument such as a digital ohmmeter for measuring and digitally displaying the resistance of an unknown circuit element, there is included an electrical continuity tester coupled to the input of the digital ohmmeter for instantaneously and digitally indicating electrical continuity. Connection of the electrical continuity tester to the input of the digital ohmmeter is achieved in a manner such as to not overload or otherwise affect the accuracy of the resistance measurement.
    Type: Grant
    Filed: July 6, 1981
    Date of Patent: June 19, 1984
    Assignee: Beckman Instruments, Inc.
    Inventor: John B. Crosby