Abstract: A new microprocessor controlled digital multimeter offers significant advantages to the user. Automatic calibration allows a new reference IC board to be inserted and because of such calibration the multimeter is instantly ready for use.

Abstract: An analog-to-digital tester having at least two distinct ranges of full scale sensitivity is provided. The tester includes signal conditioning means for receiving an analog measurand and digital display for displaying a value representative of the measurand. The signal conditioning means includes first and second attenuation levels differing by a multiple of at least 100 and circuit means for selecting the attenuation level corresponding to the magnitude of the measurand. The analog-to-digital converter circuit has full scale sensitivity over a first range and additionally full scale sensitivity over a second range ten times greater than the first range and includes range detecting means for detecting the magnitude of the measurand applied to the signal conditioning means and in response thereto selects the first or second full scale sensitivity range to thereby apply a digital value representative of the measurand to the digital display.

Abstract: An incoming a-c signal, whose amplitude is to be measured, successively passes through several decadic attenuator stages settable by respective cascaded decadic stages of a reversible counter. The attenuated signal is rectified and its voltage, or the RMS value thereof obtained from a squarer, gives rise to a calibration current, opposed by a constant reference current, for charging a capacitor of a current/frequency converter with a resulting current corresponding to their difference. Two threshold detectors in that converter, responding to a capacitor charge of either polarity beyond a predetermined limit, trigger a monoflop which fully or partly discharges the capacitor and steps the counter forward or backward as determined by a polarity sensor connected across the capacitor. A retriggerable second monoflop, responsive to the trailing edge of each stepping pulse, enables the second-lowest counter stage to be stepped out of turn when these pulses follow one another at high rate.

Abstract: The disclosed high resolution analog to digital converter circuit has an integrator circuit responsive to the unknown analog input. The integrator circuit is operated for a fixed period of time during which, on a periodic basis, a predetermined charge is dumped from the integrator circuit capacitor. A counter is incremented each time a dump occurs and the counter value at the end of the fixed period is related to the high order digits of the digital value for the unknown analog signal. A digital number corresponding to the output level of the integrator is determined by a successive approximation circuit both before and just after the fixed period. The difference between the two values determined by the successive approximation circuit is related to the low order digits of the digital value for the unknown analog signal.

Abstract: A high voltage monitor and display for electrostatic precipitators producing a digital output code representing the magnitude of the high voltage associated with the ionizer and collecting cells which is applied to a series of display elements arranged in a spaced linear relationship such that the number of adjacent display elements illuminated corresponds to the magnitude of the high voltage to provide a visible indication of ionizer cell and collector cell performance. A predetermined minimum cell voltage is established digitally, and the high voltage power supply inhibited when the high voltage falls below the predetermined value. Alarm means are also provided for indicating when the collector cell or ionizer cell voltage is below the predetermined operating minimum.

Abstract: An integrating analog-to-digital converter for producing a digital output signal representing the value of an analog input signal which may have either a positive or negative polarity. The converter uses a switching circuit to reverse an integrator capacitor between charge and discharge periods so that the same input-signal-controlled current source can be used to both charge and discharge the capacitor. This results in inherent zero calibration because any offset errors during the charge cycle are cancelled out by equal and opposite offsets during the discharge cycle.

Abstract: An offset circuit for use in providing an offset signal to an analog-to-digital converter. The analog-to-digital converter has an integrator for performing signal integrate operations and is connected to a digital display. The offset circuit is gated to provide a variable offset current directly to the integrator of the analog-to-digital converter, thereby eliminating adverse loading effects on the high input impedance of the analog-to-digital converter.

Abstract: There is disclosed a hand held testing device for measuring different electrical quantities. Two handles equipped with test prongs are interconnected by a cable. A battery and means for charging the same are built into one handle. The other handle is provided with a function selecting switch and a range selecting switch having finger grip elements. Movable switch elements are constructed of contact rollers. The stationary switch elements are commonly formed of a printed circuit board bearing respective contact areas. A second printed circuit board assembly arranged aside the first board carries the main electrical units on one side and a display device with a visible display area on the opposite side. Selector areas assigned to each one of the switches for marking selector positions are arranged on the same side of the handle body as the display area. Test prongs, selector areas and the display area may therefore be viewed together.

Abstract: For equalizing the signal delay times of semiconductor chips a digital control circuit is provided on each chip. By altering the supply voltage, the digital control circuit influences the signal delay times.The digital control circuit comprises a comparator circuit where the signal delay of a clock pulse is compared in a chain of inverters with the very precisely defined clock interval. Depending on the result of the comparison, the count of an up-down counter is incremented or decremented by one. The resulting count is decoded and converted into a corresponding voltage for operating the circuits of the semiconductor chip. Subsequently, the above described steps are repeated until the difference .DELTA.t between the arrival of a clock pulse delayed by the chain, and the following undelayed clock pulse approaches zero.

Abstract: A voltage dividing and reference circuit for creating a pseudoground from a unipolar power supply such that when used in combination with a digital voltmeter circuit a bipolar input signal can be measured for both polarities with respect to ground.

Abstract: The variable attenuator and variable current shunt of a battery-powered auto-ranging digital multimeter uses latching relays, each of which, since it is stable in each of its two switching states, requires only a current pulse to change its state. The circuit which operates the relays provides a drive pulse only when the desired relay state differs from the actual state, thus minimizing the power required, and includes a tank circuit for minimizing disturbance to the multimeter power supply. To ensure that the tank circuit can recharge, each relay is driven by a tri-state output.

Abstract: In an A-D converter of a dual slope system, a digital value set by setting means is provided to switch drive signal generating means to derive therefrom a switch drive signal of a time width corresponding to the digital value, and by the switch drive signal a switch is turned ON, through which a constant voltage is superimposed on an analog input voltage.

Abstract: An analog-to-digital converter of the integrating type is disclosed in which, while an analog input signal is integrated over a first period, a reference signal is selectively superposed on the analog input signal during the first period when the integrated value exceeds a predetermined value, so as to reduce the absolute value of the integrated value of the analog input signal, and then at the termination of the first period the integrated value is inversely integrated by a reference signal (a separate reference signal or the same reference signal as above-mentioned), a period within the first period during which the reference signal is superposed and the second period, i.e., from the beginning of the inverse integration after the first period to the time point that the integrated value reaches the predetermined value being used to produce an output in a digital form.

Abstract: An integrating analog-to-digital converter particularly adapted to measure inertial instrument outputs for strap-down navigation. In the converter, an input signal is summed with a number of precisely quantized voltage pulses and is integrated. An error signal at the output of the integrator controls the rebalance duty cycle of the converter. Counting the net rebalance quanta over an interval results in an output count which is proportional to the input signal voltage.

Abstract: A method and an apparatus are disclosed for converting an analog input signal having either a positive or negative polarity into a digital output signal indicating the magnitude and polarity of the input signal. Amplifier offset voltages and dynamic hysteresis in the comparator are compensated automatically and a zero reference is established automatically to provide a corrected output. A compensation capacitor and an integrating capacitor are selectively charged. A reference signal is integrated to measure the magnitude of the difference between the integrator offset voltage and the comparator threshold. A digital representation of the time required to measure the difference between the integrator offset voltage and the comparator threshold is stored. The compensation capacitor and the integrating capacitor are again selectively charged. The analog input signal is then integrated for a fixed time. The reference signal is integrated for a time equivalent to the digitally stored time.

Abstract: In a digital test instrument such as a digital ohmmeter for measuring and digitally displaying the resistance of an unknown circuit element, there is included an electrical continuity tester coupled to the input of the digital ohmmeter for instantaneously and digitally indicating electrical continuity. Connection of the electrical continuity tester to the input of the digital ohmmeter is achieved in a manner such as to not overload or otherwise affect the accuracy of the resistance measurement.

Abstract: A novel analog-to-digital converter is integrated on a semiconductor substrate utilizing I.sup.2 L techniques. The resulting converter, which utilizes dual slope integration to generate a digital signal, operates from a single low-voltage power supply and has few external components. The converter is suitable for integration with I.sup.2 L digital circuitry to provide a complete digital system, which operates in accordance with an analog input signal, on a single semiconductor chip.

Abstract: A timing circuit useful in measurement and control applications includes a comparator for generating an output pulse having a duration dependent on when the magnitude of a ramp-like input signal exceeds the magnitude of a DC input signal. The output pulse is coupled to a low pass filter for generating a correction signal having a magnitude proportional to the time duration of the output pulse. The correction signal is coupled to offset circuitry to shift one of the input signals relative to the other to compensate for jitter or short term variations in the duration of the output signal.

Abstract: Analog to digital converter of the type in which an analog input signal is integrated and charge is applied to the integrating capacitor in predetermined measured quantities to offset or balance the effect of the input signal. A counter is incremented and decremented in accordance with the balancing charge to provide a count corresponding to the input signal. Means is included for eliminating errors due to offset voltages and imperfections in the virtual ground of the integrator, and the operating level of the integrator during a conversion is set independently of the sources which supply the balancing charge.

Abstract: Apparatus for selectively measuring voltage, resistance, and time duration f an event, each of which is associated with an electrical network, includes a device for providing a first train of digital pulses, the frequency of the pulse train being related to an analog voltage coupled thereto. The measuring apparatus also includes a clock for generating a second train of digital pulses of fixed frequency, and a constant current source to be coupled to a resistive element being measured by the apparatus. The apparatus further includes counters selectively receiving one of the digital pulse trains for counting the number of pulses received during a selected time period, and for providing a digital output in which the value of a quantity measured by the apparatus is encoded.

Abstract: An improved method and a circuit arrangement for converting an analog quantity into a digital quantity of the type where the analog quantity is fed to an integrating circuit, to which a reference quantity is temporarily connected during a conversion period and in which the pulses delivered by a pulse generator are also fed to a counter during the time when the reference quantity is connected to the integrating circuit in which during the first phase of a conversion period the analog quantity is fed to a first integrator and, during a second phase immediately following the first phase the analog quantity is fed to a second integrator, with pulses counted in a counter common to both integrators while the reference quantity is connected. Using two integrators permits connecting the analog quantity alternately to each of the integrators and connecting the reference quantity to the respective integrator in the time between, when the analog quantity is not connected.

Abstract: An accurate, low cost and stable digital decibel indicating level meter having a wide amplitude and frequency range in decibels is described having a dynamic range of greater than 80 decibels with high decibel linearity over an extended decibel range. A dual slope integration technique minimizes drift and simplifies calibration, and uses a voltage reference which is compared to an exponentially decaying integration voltage such that when a time duration elapses from the beginning of the discharge to the time when the reference and discharge voltages are equal, the time duration is logarithmically proportional to the voltage being measured. A counter is enabled to provide a digital indication of the signal level measured in decibels, which indication is stored in a latch circuit displayed or coupled out.

Abstract: Method and apparatus for measuring the magnitude of a varying analog signal and for displaying a close approximation of a final stabilized value before the signal reaches stabilization. An analog-to-digital converter converts the analog signal to corresponding digital pulse signals and the digital pulse signals are displayed to an operator. Automatic display-hold circuitry determines the pulse count difference between successive pulse count signals separated by a predetermined time interval, compares the difference to predetermined value, and, when the predetermined value is reached, generates a control signal which locks the displayed value and prevents the display from updating as the analog signal continues to vary. The difference between pulse signals is taken by storing the first signal in an up/down counter and decrementing the counter in response to the second signal.

Abstract: A tape recorder with display function comprises a tape recorder unit, a power source terminal connected to a power source for supplying power to the tape recorder unit, a voltage detector for detecting the voltage of the power source via the power source terminal, and a light emission semiconductor display device for digitally displaying the output of the voltge detector as the voltage of the power source.

Abstract: A voltmeter having multiple voltage ranges comprises substantially linear elements such that the transfer functions of the elements can be independently measured and logically combined to derive the transfer function of a given combination of elements configured to obtain a given voltage range.

Abstract: An analog to digital converter for use in a digital voltmeter includes a periodic source of reference signal in ramp form starting at a negative potential and increasing to a given positive potential. The ramp signal and an analog signal to be measured form the inputs for a first comparator which provides a given output level as long as the ramp signal is less than the analog signal. A source of clock signals and the output of the first comparator are connected to a first logic circuit which provides an output of clock signals during the period that the first comparator is at the given level. A second comparator is connected to the ramp signal and ground potential and provides a given output level until the ramp signal reaches ground potential. A second logic circuit is connected to the output of the second comparator and the first logic circuit and provides clock signals during the period that the ramp signal is above ground potential and less than the analog signal.

Abstract: A readout device connected to a parent metering system contains a digital display for circumventing the non-linearity of analog meter movement in the parent system. The readout device displays both numerical and dimensional information in a clear, legible form with both probe and range scale factors accounted for in the display itself. A "probe" switch on the front panel of the module encodes the logarithm of the scale factor associated with the probe in use to a two's complement binary number, and the full scale range information from the "range" switch is encoded in the same manner. This information, along with function information from the "function" switch, is processed by a scale computation circuit which positions the decimal point and causes the units of measurement to be indicated accordingly.

Abstract: A digital voltmeter for measuring an input voltage which can lie in any one of M successive ranges comprises an input scaling device which scales the input voltage to produce a voltage lying in a single predetermined range, and which also produces a range signal indicative of the range in which the input voltage lies. An analogue-to-digital conversion circuit then converts the scaled voltage to a corresponding digital signal which has up to N significant decade figures of resolution, where N<M. The voltmeter has a display unit with M decades, each of which represents a fixed order of magnitude of the input voltage, and control means responsive to the range signal to direct the digital signal to the group of N adjacent decades of the display means appropriate to the magnitude of the input voltage.

Abstract: An analog to digital converter wherein an incremental pulse width modulator controls first and second modes of operation of a bridge network of switches such that the bridge network of switches passes a precision current from a current source into a summing input of an integrator during the first mode of operation and away from the summing point of the integrator during the second mode of operation. The bipolar precision current from the bridge network of switches is summed with an analog current at the summing input of the integrator to cause the integrator to develop a voltage signal proportional to the integral of the sum of these currents. In response to the voltage signal and to clock pulses, the incremental pulse width modulator precisely controls the first and second modes of operation of the bridge network of switches and enables an output circuit to generate a digital representation of the amplitude of the analog current.

Abstract: Disclosed is an A-D converter in which a voltage to be measured is subjected to first integration for a certain period of time; a reference voltage of the opposite polarity from the voltage to be measured is subjected to second integration until the integrated value obtained by the first integration returns to a predetermined value; measuring clock pulses are counted by a counter circuit in the period of the second integration; and the voltage to be measured is converted by the count value of the counter circuit into a digital value. In the A-D converter, there are provided a variable frequency divider and a memory having stored therein frequency dividing ratio determining signals for changing the frequency dividing ratio of the variable frequency divider.

Abstract: A current-to-frequency converter in which a succession of small charge feedback pulses is selectively generated to null the input current. The feedback pulses are generated by applying voltage pulses of precisely controlled magnitude to a precision capacitor to produce pulses of precisely-determined charge content. These pulses are then applied to a charge-dividing circuit including a matched pair of bipolar transistors. The charge dividing circuit bypasses the bulk of the charge in each pulse, while applying only a minute fraction of each pulse as the feedback current. The charge division ratio is maintained constant by the circuit in spite of temperature fluctuations.

Abstract: A circuit for adjusting the amplitude of a reference signal to a predetermined level so as to permit subsequent data signals to be interpreted correctly. The circuit includes an operational amplifier having a feedback circuit connected between an output terminal and an input terminal; a bank of relays operably connected to a plurality of resistors; and a comparator comparing an output voltage of the amplifier with a reference voltage and generating a compared signal responsive thereto. Means is provided for selectively energizing the relays according to the compared signal from the comparator until the output signal from the amplifier equals to the reference signal. A second comparator is provided for comparing the output of the amplifier with a second voltage source so as to illuminate a lamp when the output signal from the amplifier exceeds the second voltage.

Abstract: In a dual slope analog-to-digital converter, the conversion cycle is divided into three states; a first state in which the system is initialized by discharging an integration capacitor, a second state in which integration is performed with an analog voltage representing the measured parameter and a third state in which integration is performed with an analog reference voltage representing the full scale of the measured parameter. The duration of each state, derived from a counter, is selected according to the particular application in which the analog-to-digital converter is utilized. In one embodiment, each count is representative of a unit of the parameter being measured or a fraction thereof. The count or value which represents the commencement of the third state has a selected relationship to the minimum value of the measured parameter best suited for the particular application.

Abstract: A digital exposure meter display circuit for a camera includes a first oscillator 1 whose output controls the charging of an integrating capacitor 28 from a constant current source 3. When the capacitor charge reaches the level of a reference voltage from source 7, as detected by a first comparator 6, a counter 10 is enabled and begins to register clock pulses from a second oscillator 8 through an AND gate 31. When the capacitor charge subsequently reaches the output level of a light measuring circuit 4, which is proportional to the apex value of the sensed object brightness, a second comparator 5 disables the AND gate and enables an LED display 12 supplied with the decoded counter value.

Abstract: An analog-to-digital converter utilizing a pulse density concept wherein a pulse generator is used and the rate of generation of pulses is a function of the difference between the analog input and the indicated digital output. The pulses are utilized in an adding/accumulation circuit for adjusting the output value upwardly or downwardly to minimize the error input. A digital-to-analog converter is used between the output of the accumulator and an algebraic summing network in a feedback manner to compare with the analog input and produce the error signal.

Abstract: A circuit for performing dual slope integration to provide a digital measurement of an input voltage of either positive or negative polarity employs a single source of reference potential in combination with a switchable resistive network as a source of reference current.

Abstract: A trace locator for identifying in a visual display the position on a recording medium of a recorded trace representing an input signal in a multi-trace recorder. The trace position may be displayed without a movement of the recording medium to enable the possible trace to be located and positioned by observing the visual display. The visual display is sequentially advanced by successive clock signals until a predetermined amplitude of an input signal to be displayed is reached. The trace location is displayed for a preset period of time after which the display is cleared prior to a subsequent display of the trace location for either the same input signal or another input signal.

Abstract: An unknown voltage to be measured is applied to the input of an automatic servo-actuated potentiometer which when unbalanced by an unknown voltage is servo-actuated to restore a balanced condition with the extent of the displacement necessary for such restoration being indicated on a scale as an analog measure of the input voltage. The absolute value of the voltage across the potentiometer is measured and is supplied to a balance detecting circuit which upon a change in said absolute value actuates a control gate to transmit pulses from a pulse generator to a set of binary counters which have their output signals applied through a binary-decimal converter to a digital display. The counter output signals are also converted to an analog voltage which is fed to the balance detecting circuit and when the converted analog voltage equals the absolute detected voltage, the pulse count is terminated.

Abstract: An acoustical testing system is described wherein a stabilized and calibrated audio sound generator is used to drive a device to be tested with the output of the device being processed by circuit means that are automatically self-adjusting thereby resulting in digital readouts of the device's output amplitude and purity.

Abstract: The output voltage of a power source is converted into a time signal by a circuit comprising a capacitor to which the voltage is applied, an MOS-FET connected across the capacitor and controlling its discharge rate in accordance with the voltage of the power source and a switching circuit which controls the MOS-FET. The time period representing the voltage of the power source is displayed digitally by counting the number of standard pulses occurring during the time period and digitally displaying the pulse count.

Abstract: An analog to digital converter suitable for fabrication according to integrated circuitry technology. The voltage to be converted is applied to a storage capacitor which is pulse discharged in discrete equal amounts determined by a voltage controlled constant current source. The pulses are counted and the total represents the input voltage. The current of the constant current source, and concomitantly the discrete pulsed discharge amounts, is varied during a calibrate mode depending upon any detected error. A known reference voltage is applied to the storage capacitor which is then pulsed down by the voltage controlled current source. Any deviation in the time of discharge, as compared to the known time (number of pulses) to discharge the capacitor, varies the voltage which controls the current magnitude of the constant current source.

Abstract: A device for measuring the power of analog signals on telephone lines in a data communications network. A selection circuit couples a selected analog signal from one of the telephone lines to a measuring circuit. A full-wave rectifier and a low pass filter process and convey the selected signal to a plurality of open-loop comparators. Each comparator produces a binary signal that indicates whether the selected signal is greater or less than a reference power that corresponds to a predetermined power level. Each comparator energizes an inverter and driver that in turn energizes a light-emitting diode thereby to indicate the line signal power visually. However, the drivers are interconnected so only one light-emitting diode is energized at any given time. A blanking circuit disables the light-emitting diodes when rapid signal level changes occur. A self-testing circuit includes a damped oscillator for testing all the circuitry in the measuring device.

Abstract: Feedback circuitry for a charge digitizer is disclosed. The feedback circuitry includes a photo-diode coupled between the input of the integrator and the biasing voltage of the photo-diode and a pulsed light source connected to the output of the multivibrator of the digitizer. The pulsed light source is operative responsive to the output pulses of the multivibrator and will actuate the photo-diode upon each pulse to discharge the integrating capacitor. Preferably, the photo-diode is specially constructed to have a grounded guard ring separating the anode and the cathode portions of the envelope to thereby prevent unintended current flow on or through the envelope. This provides a normally open feedback circuit with current flow only during the pulsed intervals.

Abstract: An analog-to-digital converter employing a sample-hold, ramp generator and comparator in the conversion process combines the sample-hold and integrate functions in one operational amplifier. Provision may be made to derive the reference voltage, for the ramp generator, from the analog signal whereby automatic gain control is also obtained.

Abstract: An integrator consisting of a high gain D.C. amplifier, a voltage-current converter such as a resistor, and a feed-back capacitor. An unknown analog input voltage to be converted and two known reference analog voltages which have the same polarity as that of the input voltage to be converted are supplied to the voltage-current converter in the integrator through a first switching circuit having three switches. The output voltage of the integrator is supplied to a comparator. The comparator compares the integrated voltage with a fixed reference voltage and produces an output signal when both voltages are equal. A second switching circuit including one switch, a third switching circuit including two switches, and two capacitors respectively connected to the switches in the third switching circuit are provided between an output terminal of the integrator and ground. A voltage-current converter such as a resistor or a transistor circuit is connected between the input terminal of the D.C.

Abstract: In order to obtain a very close fit to the characteristic curve of a non-linear sensor, such as a thermocouple, a linearized clock is developed and used to increment a counter during a time period representative of the sensor output. The linearized clock is obtained by passing a precision clock signal through a first synchronous binary rate multiplier which receives rate information from an up/down counter. The up/down counter is incremented or decremented by the output from a second synchronous binary rate multiplier which receives rate information from a programmable read only memory in accordance with the segments of the sensor's characteristic curve through which the time scan may be deemed to be passing.

Abstract: In the d-c transformer of the present invention a current changing between two maximum values of opposite polarity is impressed on the secondary winding of the transformer. One input of a multiplier is coupled in parallel across the secondary winding and the other input coupled to a current value measuring device in the circuit of the secondary winding with the multiplier providing output signals which are proportional to the d-c signals at the input of the primary side of the transformer.

Abstract: An analog-to-digital converter of the single slope detection type comprising a first input terminal for receiving a first input signal formed by the superposition of a common mode noise voltage on a first DC voltage, a second input terminal for receiving a second input signal formed by the superposition of the common mode noise voltage on a second DC voltage, a ramp generator responsive to the second input signal and operative to separate the common mode noise voltage from the second input signal and to develop a ramp reference signal that is modulated by the common mode noise voltage, a first comparator for comparing the signals at the first terminal and at the output of the ramp generator and for developing a first output signal which changes state when the level of the modulated ramp reference signal exceeds the level of the first input signal, a second comparator for comparing the signals at the second terminal and at the output of the ramp generator and for developing a second output signal which changes

Abstract: An electrical circuit for digitally displaying an input electrical signal to minimize fluctuations in the output and maximize the speed of response to changes in the input signal whereby the input signal is applied to a first low pass filter and a second low pass filter having both a lower threshold frequency and a slower response time to changes in the input signal than the first filter. The outputs of the two filters are applied to a differential amplifier to produce a differential signal which is applied via a pair of serially and oppositely connected Zener diodes to the output of the second filter, which is also connected to the digital display, to cause rapid response to signal changes. The frequency of a unijunction oscillator is also controlled by the differential signal to increase the measuring rate of the digital display whenever the input signal charges by more than a predetermined value.

Abstract: An analog-to-digital converter of the ramp-integrator type utilizing a special technique to reduce errors due to offset voltages. The integrator first is ramped up and then back to a reference level, by sequential application of opposite-polarity reference signals. A digital determination of net offset error then is made by comparing the total time of ramp-up-and-back with a fixed time period set by a clock generator. During the subsequent conversion operation, integration of the analog signal is controlled in accordance with the amount of net offset error so as to provide a feed-forward error correction. Integration is always in the same direction away from zero for analog signals of either polarity, thus avoiding the effects of discontinuity around zero input.