With Semiconductor Diode Or Negative Resistance Device Patents (Class 326/123)
  • Patent number: 7352213
    Abstract: The use of an alternating current (ac) source to power logic circuitry can support satisfactory device performance for a variety of applications, while enhancing long-term stability of the circuitry. For example, when organic thin film transistor (OTFT)-based logic circuitry is powered by an ac power source, the logic circuitry exhibits stable performance characteristics over an extended period of operation. Enhanced stability may permit the use of OTFT logic circuitry to form a variety of circuit devices, including inverters, oscillators, logic gates, registers and the like. Such circuit devices may find application in a variety of applications, including integrated circuits, printed circuit boards, flat panel displays, smart cards, cell phones, and RFID tags. In some applications, the ac-powered logic circuitry may eliminate the need for ac-dc rectification components, thereby reducing the manufacturing time, expense, cost, complexity, and size of the component carrying the circuitry.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: April 1, 2008
    Assignee: 3M Innovative Properties Company
    Inventors: Paul F. Baude, Michael A. Haase
  • Patent number: 7106093
    Abstract: A semiconductor device having a plurality of cascaded IC's (14, 15, 16), wherein the matching impedance between a signal transmission path (12) connected to an external signal transmission path and an input-side or output-side IC (14, 16) is set at 50 ohms which is equal to the characteristics impedance of the external signal transmission path. The matching impedance between a internal signal transmission path (13) and an input-side or output-side IC or intermediate IC is set at 200 ohms which is higher than the 50 ohms. The semiconductor device reduces the current dissipation and can operate at a higher speed.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: September 12, 2006
    Assignee: NEC Corporation
    Inventor: Yasuyuki Suzuki
  • Publication number: 20020039034
    Abstract: An OR circuit allowing one stable output voltage from a plurality of input voltages is disclosed. A first FET is connected between a corresponding input terminal and an output terminal in such a manner that an inherent diode of the FET is connected in a forward direction. A second FET is connected between a corresponding input terminal and the output terminal in the same manner as the first FET. Each of the input voltages is compared with the output voltage. The conduction/non-conduction states of each of the first and second FETs are independently controlled depending on the comparison result.
    Type: Application
    Filed: March 22, 2001
    Publication date: April 4, 2002
    Inventor: Yoshimi Kohda
  • Patent number: 5773996
    Abstract: A multiple-valued logic circuit includes a first device, a second device, a signal source, and a signal output terminal. The second device is connected in series with the first device. The signal source supplies an oscillating voltage across a series circuit consisting of the first device and the second device. The first device is constituted by at least one unit device having first and second main terminals and exhibiting voltage-current characteristics including negative differential resistance characteristics for obtaining a peak current between the first and second main terminals. The second device is constituted by at least two series-connected unit devices each having first and second main terminals and exhibiting voltage-current characteristics including variable negative differential resistance characteristics for obtaining a peak current changing between the first and second main terminals.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: June 30, 1998
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventor: Waho Takao
  • Patent number: 5473270
    Abstract: Power dissipation in precharge paths used in adiabatic dynamic logic circuitry is reduced by a precharge boost circuit which decreases the impedance between a clock node and an output node in such logic circuitry and thereby increases the charging current from a clock signal generator. In one example, a diode used to precharge an output node in adiabatic dynamic logic circuitry is selectively shorted by a controllable switch selectively connected in parallel with the diode when the output node is to be precharged.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: December 5, 1995
    Assignee: AT&T Corp.
    Inventor: John S. Denker