Abstract: A switching network includes a switch, a driver for the switch, and a floating-regulator that powers the driver. The floating-regulator includes a shunt that is used only when testing the network. The shunt diverts biasing current so that it does not interfere with a measurement of an electrical property of a switch.

Abstract: According to one embodiment, electronic circuitry includes a semiconductor switching element; and a driving circuit configured to supply a current to a control terminal of the semiconductor switching element and to adjust a magnitude of the current supplied to the control terminal based on a voltage at the control terminal.

Abstract: A solid-state fuse device includes a switch a gate driver connected to the switch and configured to transition the switch from a closed state to an open state when at least one of an overcurrent measurement exceeds a predetermined overcurrent threshold or a voltage drop across the switch exceeds a predetermined saturation voltage threshold.

Abstract: A low drop-out (LDO) regulator includes a power transistor, an error amplifier and a droop adjusting circuit. The power transistor regulates a driving voltage based on a gate voltage of a gate node to provide an output voltage at an output node. The error amplifier outputs the gate voltage by amplifying a voltage difference between a reference voltage and a feedback voltage proportional to the output voltage. The droop adjusting circuit is connected between the gate node and the output node, is coupled to the output voltage, and adjusts the gate voltage to compensate for a change of the output voltage based on a change of a load current which is provided to a load from the output node.

Abstract: A resonant switching power converter includes: a power stage circuit and a driving circuit. The power stage circuit includes: a resonant capacitor, a resonant inductor and switches. The driving circuit includes: drivers for driving the switches; and a power supply circuit for providing driving powers to the drivers. The power supply circuit includes: a voltage booster circuit generating a booster power supply according to a clock signal, a DC voltage and an output related signal; driving capacitors, wherein a voltage across each driving capacitor corresponds to one driving power; and supply diodes, which are coupled in series from the booster power supply along a forward direction of the supply diodes. A backward end of each supply diode is coupled to a positive end of one corresponding driving power, to charge one corresponding driving capacitor, thus generating the corresponding driving power.

Abstract: According to one embodiment, a current detection circuit includes a current detection part including an operational amplifier configured to compare a first voltage proportional to a load current with a second voltage proportional to a detection current. The current detection part is configured to output the detection current. The current detection circuit includes an adjustment part configured to generate data in accordance with a result of comparing a monitor voltage proportional to the detection current with a reference voltage, and to adjust an input offset of the operational amplifier.

Abstract: A semiconductor switch device includes a switchable power semiconductor and a control circuit. The semiconductor switch device has a current sink and a current amplifier designed to amplify during a switching process a partial current of the total current flowing across the control capacitor that is not discharged by the current sink up to an adjustable maximum current and to apply the amplified partial current to the control electrode of the power semiconductor so as to counteract the change in the voltage across the collector-emitter path or the drain-source path of the power semiconductor during the switching process. An additional circuit provides an adapted switch-on transition by smoothing the collector voltage and/or the drain voltage of the switchable power semiconductor when switching over the collector-emitter path or the drain-source path of the power semiconductor from a blocked state into a conductive state.

Abstract: A selection circuit generates a voltage VS of a switching terminal VS or a power supply voltage VCC, whichever is higher, in a common line. A regulator stabilizes a voltage VCOML of a reference line at a level lower than a voltage VCOM of the common line by a predetermined voltage difference ?V. A charge pump circuit is provided between the common line and the reference line and steps up a voltage difference ?V between the common line and the reference line. A rectifying element charges a bootstrap capacitor between a bootstrap terminal and the switching terminal, with an output voltage of the charge pump circuit.

Abstract: An H-bridge circuit includes a supply voltage node, a first pair of transistors and a second pair of transistors. First transistors in each pair have the current paths therethrough included in current flow lines between the supply node and, respectively, a first output node and a second output node. Second transistors in each pair have the current paths therethrough coupled to a third output node and a fourth output node, respectively. The first and third output nodes are mutually isolated from each other and the second and fourth output nodes are mutually isolated from each other. The H-bridge circuit is operable in a selected one of a first, second and third mode.

Abstract: A gate driver circuit for driving a gate-controlled switching device comprises a voltage monitor circuit portion arranged to produce a first value that is dependent on a time derivative (dv/dt) of a voltage applied across the gate-controlled switching device. A current monitor circuit portion is arranged to produce a second value that is dependent on a time derivative (di/dt) of a current through the gate-controlled switching device. A compensator is arranged to receive an alternating input signal (PWMref), the first value, and the second value, wherein the compensator modulates a magnitude and transition profile of the alternating input signal (PWMref) in response to the respective time derivatives of the voltage and the current, thereby generating a modulated control signal (PWMN). The gate driver circuit supplies the modulated control signal (PWMN) to the gate terminal of the gate-controlled switching device.

Abstract: An integrated circuit for demagnetizing an inductive load includes a first switch to control current supplied by a voltage supply to the inductive load. A Zener diode includes an anode connected to a control terminal of the first switch and a cathode connected to the voltage supply. A second switch includes a control terminal and first and second terminals. A temperature sensing circuit is configured to sense a temperature of the first switch and to generate a sensed temperature. A comparing circuit includes inputs that receive a reference temperature and the sensed temperature and an output connected to the control terminal of the second switch.

Abstract: Embodiments described herein provides a low-complexity solution and current protection for a current driver that provide current pulses to pyrotechnic initiators. The current drivers include current limiters that prevent high current transients during a current pulse. Further, a duration of the current pulse is controlled based on a thermal limit of the current driver to prevent thermal damage to the current driver. One embodiment comprises an apparatus that includes a control circuit and a current driver. The current driver is electrically couplable to a pyrotechnic initiator. The current driver includes a power switch circuit electrically coupled to a supply rail that supplies a current to a high side of the pyrotechnic initiator in response to receiving a drive signal from the control circuit.

Abstract: A low delay time power converter circuit includes a driver circuit and a load. The driver circuit generates a switching driving signal to control the load. The driver circuit includes a switching control circuit and an output stage circuit which includes a first power switch, a second power switch and an impedance adjusting circuit. When the switching control circuit controls the switching driving signal to a first voltage level at a first time point, the first power switch is turned ON and then is turned OFF after a predetermined period. When the switching control circuit controls the switching driving signal to a second voltage level at a second time point, the second power switch is turned ON. The time point when the first power switch is turned OFF is earlier than the second time point. A resistance of the impedance adjusting circuit is larger than a conductive resistance of the first power switch.

Abstract: A gate-drive controller for a power semiconductor device includes a master control unit (MCU) and one or more comparators that compare the output signal of the power semiconductor device to a reference value generated by the MCU. The MCU, in response to a turn-off trigger signal, generates a first intermediate drive signal for the power semiconductor device and generates a second intermediate drive signal, different from the first drive signal, when a DSAT signal indicates that the power semiconductor device is experiencing de-saturation. The MCU generates a final drive signal for the power semiconductor when the output signal of the one or more comparators indicates that the output signal of the power semiconductor device has changed relative to the reference value. The controller may also include a timer that causes the drive signals to change in predetermined intervals when the one or more comparators do not indicate a change.

Abstract: A power device driving apparatus drives a plurality of power devices including first and second power devices. In the apparatus, a plurality of drive circuits are separately provided for at least the first power device and the second power device and output drive signals to the respective power devices. The isolated power supply includes a first isolated power supply unit that supplies a first supply voltage, and a second isolated power supply unit that supplies a second supply voltage that is different from the first supply voltage. The plurality of drive circuits includes a first drive circuit that uses the first supply voltage supplied from the first isolated power supply unit to output the drive signal to the first power device, and a second drive circuit that uses the second supply voltage supplied from the second isolated power supply unit to output the drive signal to the second power device.

Abstract: A switching apparatus for switching a first actuator and a second actuator between a power supply and a ground, including: a first switch for switching a first current path between the first actuator and the ground; a second switch for switching a second current path between the second actuator and the ground; and a third switch for switching a current path between the power supply and the first actuator and a current path between the power supply and the second actuator; in which, as a result of the switching, the third switch simultaneously closes or opens the current path to the first actuator and to the second actuator. Also described are a related brake system and method.

Abstract: This invention relates to cybersecurity enforcement in vehicle control systems, more specifically, to the protection of electrical interfaces as components of such control systems. The method of detecting unauthorized devices installed on electrical interfaces of vehicles comprises measuring the impedances (the reactive and the active resistances) of the electrical interface at the initial moment of time and subsequently. The measurement of the active component of the electrical interface resistance comprises the measurement of the current and voltage of the devices connected to the electrical interface followed by the calculation of the total resistance of all the devices. The measurement of the reactive component of the electrical interface resistance comprises the measurement of the capacitance component of the electrical interface resistance by the impedance spectroscopy method.

Abstract: A driver circuit includes a power terminal, a reference terminal, and a bridge circuit. The bridge circuit comprises a first switch coupled to the power terminal, a second switch coupled in series between the first switch and the reference terminal to form a first output terminal between the first and second switches, a third switch coupled to the power terminal, and a fourth switch coupled in series between the third switch and the reference terminal to form a second output terminal between the third and fourth switches. The second and fourth switches are PNP BJT devices.

Abstract: A power switching device includes a buffer circuit, a filter circuit, a transformer, a restoration circuit, a conditioning circuit and a power switch. The buffer circuit provides a unipolar buffer output voltage dependent on an input voltage and a control voltage. The filter circuit blocks a direct component of the buffer output voltage which is added on the secondary side of the transformer by the restoration circuit. The power switch is controlled by a unipolar conditioning voltage provided by the restoration circuit to the conditioning circuit. The power switching device acts as a plug and play module and can be used and operated in a flexible and easy manner.

Abstract: A diving circuit drives an output transistor according to a control signal SCTRL. The gate of the first transistor is biased. The source of the first transistor is coupled to an internal line. In the on period of the output transistor, the voltage of the internal line is applied to a control electrode of the output transistor. A voltage correction circuit controls the internal line so as to gradually lower the voltage VREGB of the internal line with time.

Abstract: Various electronics systems may benefit from appropriate limitation of short-to-ground current. For example, sensor systems may benefit from a voltage sensing mechanism to minimize short-to-ground current for low drop-out and bypass mode regulators. A system can include a first power transistor configured to operate in a low drop-out mode. The system can also include a short to ground sensor configured to control current to the first power transistor. The short to ground sensor can be configured to limit a maximum short-circuit current below a predefined load current capability.

Abstract: A method for identifying correct operation of an electrical switching unit, having a full bridge circuit and inductive load operated by the full bridge circuit. The full bridge circuit includes a first semiconductor switching element supplying the inductive load with a first supply voltage potential and a second semiconductor switching element supplying the inductive load with a second supply voltage potential, having a smaller value than the first supply voltage potential. The first and second semiconductor switching element each have a diode.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to improve switching conditions in a closed loop system. An example device includes a first switch adapted to be coupled to a first node, a second switch adapted to be coupled to a second node, a capacitor including a first terminal and a second terminal, wherein the first terminal is coupled the first switch, and wherein the second terminal is coupled to the second switch, a first multiplier coupled to the first terminal and to the second terminal, wherein the first multiplier is adapted to be coupled to at least a third node and a fourth node, and a second multiplier coupled to the first terminal and to the second terminal.

Abstract: This semiconductor device comprises: an n-type semiconductor substrate which is connected to an output terminal; a first p-type well which is formed in the n-type semiconductor substrate; a first n-type semiconductor region which is formed in the first p-type well and is connected to a control terminal; and a potential separation part which is connected between the first p-type well and a ground terminal. The potential separation part sets the first p-type well and the ground terminal to a same potential when the output terminal is held at a higher potential than the ground terminal, and sets the first p-type well and the output terminal to a same potential when the output terminal is held at a lower potential than the ground terminal.

Abstract: An input circuit includes an input line for providing input regarding state of a supply at a first node. An impedance is connected to the input line at a second node for connecting the input line to ground. A Zener diode can be connected in the input line in series between the first and second nodes to impede current flowing through the Zener diode below the Zener voltage thereof in a direction from the first node to the second node, and to allow current above the Zener voltage thereof in the direction from the first node to the second node, wherein the input line is free of any node connecting a power voltage source to the input line between the first and second nodes.

Abstract: A power converter is provided. The power converter includes a first phase including a first upper diode and a first lower diode, a second phase including a second upper diode and a second lower diode, a third phase including a third upper diode and a third lower diode, a plurality of MOSFETs, each of the first upper diode, the first lower diode, the second upper diode, the second lower diode, the third upper diode, and the third lower diode electrically connected in parallel with a respective one of the plurality of MOSFETs, and a control system configured to selectively activate each MOSFET when current flows through a diode electrically coupled in parallel with that MOSFET.

Abstract: A system includes a voltage converter and a controller for controlling the operation of the voltage converter. The voltage converter includes a plurality of legs, wherein each leg includes a first and a second set of silicon (Si)-based power devices. The first set of Si-based power devices includes a first and second Si-based power devices connected to each other at a first interconnection node and the second set of Si-based power devices includes a third and fourth Si-based power devices connected to each other at a second interconnection node. The first and second set of Si-based power devices are coupled across a first and second DC voltage sources respectively. A first set of Silicon-Carbide (SiC) based power devices is coupled across the first and second interconnection nodes. The system also includes a snubber capacitor connected across the first and the second interconnection nodes.

Abstract: Bridge circuits provide a reduced amplitude of gate-source voltage oscillation when the switches switch states during short circuit triggered turnoff for protection. Bridge circuits reduce an amplitude of an oscillation voltage between a gate and a source of a transistor that is utilized as a switch in the bridge circuit. This is beneficial because the reduced amplitude reduces the likelihood of damage to the transistor. A bridge circuit includes a first power rail and a second power rail. The bridge circuit further includes a first circuit having a first switch and a second switch connected in parallel between the first power rail and the second power rail. The bridge circuit further includes at least one passive circuit element connected in parallel with a primary energy flow path of the first circuit to damp oscillation voltage of the first circuit.

Abstract: An n-type transistor and a p-type transistor are connected in series such that, when the two transistors are turned on, current flows from the collector of the n-type transistor to the collector of the p-type transistor. A positive-feedback capacitor is connected between the collector of one transistor and the base of the other transistor. The two transistors turn on together when the base voltage of the n-type transistor exceeds the base voltage of the p-type transistor by at least the sum of the turn-on threshold voltages of the two transistors and (i) the two transistors turn off together when the base voltage of the n-type transistor fails to exceed the base voltage of the p-type transistor by at least that sum. The positive-feedback capacitor ensures that the two transistors turn fully on and off together. In certain embodiments, the circuitry can be controlled to operate as a current pulse generator.

Abstract: A gate-drive controller for a power semiconductor device includes a master control unit (MCU) and one or more comparators that compare the output signal of the power semiconductor device to a reference value generated by the MCU. The MCU, in response to a turn-off trigger signal, generates a first intermediate drive signal for the power semiconductor device and generates a second intermediate drive signal, different from the first drive signal, when a DSAT signal indicates that the power semiconductor device is experiencing de-saturation. The MCU generates a final drive signal for the power semiconductor when the output signal of the one or more comparators indicates that the output signal of the power semiconductor device has changed relative to the reference value. The controller may also include a timer that causes the drive signals to change in predetermined intervals when the one or more comparators do not indicate a change.

Abstract: A drive device wherein a main switching element is connected to a main current path, an input terminal of the switching element on the higher potential side and an output terminal of the switching element on the lower potential side are electrically connected to a control terminal of the main switching element, a first resistance is connected between an input terminal of the switching element on the lower potential side and a control terminal of the main switching element, a first capacitor is parallelly connected to the first resistance, and a second capacitor is connected between a connection point of the first resistance and a control terminal of the main switching element and a terminal on the higher potential side of the main switching element.

Abstract: A method and apparatus for a battery protection circuit. One embodiment provides a method for protecting a battery including detecting, with a voltage divider having a first resistor and a second resistor connected in series, a voltage across a first current limiting switch and a second current limiting switch provided on a current path of a battery. The method also includes providing, with a control output provided between the first resistor and the second resistor of the voltage divider, a control signal to the first current limiting switch, wherein the control signal opens and closes the first current limiting switch. The method further includes controlling, with the voltage divider, the first current limiting switch to open when the voltage across the first current limiting switch and the second current limiting switch exceeds a predetermined threshold.

Abstract: A pulse current application circuit for applying a pulse current to a current application target. The pulse current application circuit includes a first switching element and an inductive load connected in series between a power supply and a reference potential, a second switching element connected in series with the current application target, the second switching element and the current application target being connected between the reference potential and a connection point of the first switching element and the inductive load, and a commutation circuit connected in parallel to the inductive load, the commutation circuit having a current flowing therethrough and having no current flowing therethrough respectively when the second switching element is in a cut-off state and a conductive state.

Abstract: An electronic current mirror circuit particularly suitable for use in radio frequency (RF) and microwave power amplifiers. The electronic circuit includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit includes a first input circuit path and a first output circuit path, the first input circuit path is operated at a first supply voltage and the first output circuit path is operated at a second supply voltage. The second current mirror circuit includes a second input circuit path and a second output circuit path, the second input circuit path is operated at the second supply voltage, and the second output circuit path is connected to the first input circuit path so that variations in a current through the first output circuit path are compensated by a current in the second output circuit path.

Abstract: Reverse recovery current flowing through a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having been turned off can become reverse recovery loss. Reverse recovery loss of the MOSFET is desirably reduced. A semiconductor apparatus including: a MOSFET portion; and a diode portion connected in anti-parallel with the MOSFET portion, wherein reverse recovery current flows through the diode portion after reverse recovery current of the MOSFET portion becomes zero is provided.

Abstract: A half bridge resonant converter comprises a half bridge inverter having a high side switch and a low side switch with an output defined from a node between the high side switch and the low side switch. The output connects to a resonant circuit. There are separate control circuits for generating the gate drive signals for controlling the switching of the high side switch and low side switch, in dependence on an electrical feedback parameter, each with different reference voltage supplies.

Abstract: A drive apparatus providing a heat source and driving a switching element, along with a corresponding method of using the drive apparatus. The switching element includes a transistor having a high-heat resistant semiconductor including silicon carbide. The drive apparatus is provided with a voltage adjusting unit that varies a drive voltage to be applied to a conduction control terminal of the switching element in order to put the switching element in an ON state, and the voltage adjusting unit applies, as the drive voltage, a voltage in an active region of the transistor to the conduction control terminal.

Abstract: A system and apparatus relating to a differential charge pump circuit for use in a phase-locked loop (PLL) circuit. A differential charge pump circuit can include a reference current, two sense amplifiers, a common mode control amplifier, and an h-bridge circuit. The h-bridge circuit is coupled to the reference current and the common mode control amplifier. The reference current drives a first portion of the h-bridge circuit and the common mode control amplifier controls a second portion of the h-bridge circuit. The h-bridge circuit also includes first and second nodes. The nodes are inputs to one of the sense amplifiers. The differential charge pump circuit is configured to control a voltage at the first node so that it is substantially equal to a voltage at the second node for a plurality of voltages at the second node. The differential charge pump circuit can also include a transistor with a gate coupled to an output of a sense amplifier.

Abstract: A circuit for regenerative gate charging includes an inductor coupled to a gate of a FET. An output control circuit is coupled to a timing control circuit and a bridged inductor driver, which is coupled to the inductor. A sense circuit is coupled to the gate and to the timing control circuit, which receives a control signal, generates output control signals in accordance with a first switch timing profile, and transmits the output control signals to the output control circuit. In accordance with the first switch timing profile, the output control circuit holds switches of the bridged inductor driver in an ON state for a first period and holds all of the switches in an OFF state for a second period. Gate voltages are sampled during the second period and after the first period. The timing control circuit generates a second switch timing profile using the sampled voltages.

Abstract: Split cascode circuits include multiple cascode paths coupled between voltage supply rails. Each cascode path includes a pair of controllable switches. A feedback path is provided for at least one of the cascode circuit paths. An active load circuit may also have a split cascode structure. Multiple-stage circuits, for implementation in Trans-Impedance Amplifiers (TIAs) or analog Receive Front-End modules (RXFEs), for example, include multiple stages of split cascode circuits.

Abstract: A synchronous converter that includes a power source, an inductor, an output terminal, and a control circuit. The control circuit may include: an electronic energizing switch that, when activated, delivers energy from the power source to the inductor; an electronic de-energizing switch that, when activated, delivers energy from the inductor to the output terminal, the electronic de-energizing switch including a body diode; and an electronic pull-down switch that, when activated, turns off the electronic de-energizing switch, redirects current flowing though the body diode of the electronic de-energizing switch, and removes charge from the body diode of the electronic de-energizing switch. The electronic energizing switch and the electronic de-energizing switch may never both be activated at the same time.

Abstract: A relay control circuit for use with a relay having a coil voltage input. The relay control circuit includes a first input to receive a first voltage capable of energizing the relay from a de-energized state, a second input to receive a second voltage, less than the first voltage, that is capable of maintaining the relay in an energized state, and means, responsive to a relay control signal having one of a first state and a second state, for switchably coupling the coil voltage input to the first input for a period of time sufficient to energize the relay in response to the relay control signal having the first state, and for switchably coupling the coil voltage input to the second input in response to expiration of the period of time.

Abstract: A method of manufacturing an Active Noise Reduction (ANR) device includes providing at a stage during manufacture a pre-completion ANR device in a non-final configuration, the pre-completion ANR device including a plurality of inputs, a plurality of signal processing resources, an output for driving an earphone driver, and a programmable switch arrangement capable of assigning any of the plurality of inputs to any of the plurality of signal processing resources, selecting from the plurality of signal processing resources a subset of signal processing resources to contribute to the output, whereby the remaining signal processing resources of the plurality do not contribute to the output in any mode of operation of the ANR device, and in a configuration step during manufacture, programming the programmable switch arrangement to assign each of at least a subset of the plurality of inputs to a different one of the selected subset of signal processing resources.

Abstract: A low side driver includes a first transistor coupled in series with a second transistor at a low side voltage node for a load. A capacitance is configured to store a voltage and a voltage buffer circuit has an input coupled to receive the voltage stored by the capacitance and an output coupled to drive a control node of the second transistor with the stored voltage. A current source supplies current through a switch to the capacitance and the input of the voltage buffer circuit. The switch is configured to be actuated by an oscillating enable signal so as to cyclically source current from the current source to the capacitance and cause a stepped increase in the stored voltage which is applied by the buffer circuit to the control node of the second transistor.

Abstract: In a general aspect, an apparatus can include a low-side drive circuit configured to control a low-side device of a power semiconductor device pair and a high-side drive circuit configured to control a high-side device of the power semiconductor device pair. The high-side drive circuit can include an input circuit configured to receive an input signal and produce, based on the input signal, a first control signal, from which a latch set signal is produced to turn on the high-side device, and a second control signal, from which a latch reset signal is produced to turn off the high-side device. The high-side drive circuit can further include an overlap-prevention circuit configured to prevent timing overlap between the second control signal and a voltage-recovery period of the high-voltage circuit, where the voltage-recovery period occurs after turning off the high-side device of the power semiconductor device pair.

Abstract: Driver circuit in which a capacitor (4), in a manner controlled by a switch control device (9) which is connected downstream of a current measuring device (8), is charged to a reference voltage (Ur) by means of a charging current (Ic2), and the charged capacitor is discharged in an oscillating manner via an inductor coil (1), wherein the discharging operation is terminated when the current (Ia) through the inductor coil has passed through an entire oscillation period or several oscillation periods, wherein a first controllable switch (5) is connected in series between a first non-reactive resistor (6) and the first capacitor (4) in one of two input paths. Furthermore, a second controllable switch (7) and a fourth controllable switch (14) are connected into two output paths, and a second non-reactive resistor (13) is connected between a second connection (X2) of the inductor coil (1) and a connection for a reference potential (Um).

Abstract: A relay control circuit for use with a relay having a coil voltage input. The relay control circuit includes a first input to receive a first voltage capable of energizing the relay, a second input to receive a second voltage, less than the first voltage, that is capable of maintaining the relay in an energized state, and means, responsive to a relay control signal having one of a first state and a second state, for switchably coupling the coil voltage input to the first input in response to the relay control signal having the first state, and for switchably coupling the coil voltage input to the second input in response to the relay control signal having the second state.

Abstract: In summary, a switching circuit comprising a high side (HS) switch coupled to the output, a low side (LS) switch comprising a MOSFET coupled to the output, and a slope regulator core coupled to the gate of said low side (LS) switch configured to provide control signals to said slope regulator core. In addition, a method of providing a method of a switch circuit comprising the steps the first step, (a) providing a circuit comprising a low side (LS) switch, a high side (HS) switch, and a slope regulator wherein said slope regulator comprises a fast mode, a slope regulator mode, and a hold mode, the second step (b) activating said slope regulator, the third step (c) choosing a fast mode or a slope regulation mode, the fourth step (d) applying either a fast mode or slope regulation mode; the fifth step (e) evaluating the polarity of the signal, the sixth step (f) toggle signal hold_on if the gate is low or toggle signal hold_off if the gate is high.

Abstract: A sequential driving method for driving a switch circuit of a power converter is presented. The method has the steps of driving a switch circuit which contains a power switch, defining a driving sequence; and applying sequentially an electrical parameter to the power switch, based on the driving sequence. Defining a driving sequence includes defining a plurality of different driving levels associated with the electrical parameter and defining a plurality of time windows within a switching time period. Each time window is associated with a driving level among the plurality of driving levels.

Abstract: An electronic current mirror circuit particularly suitable for use in radio frequency (RF) and microwave power amplifiers. The electronic circuit includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit includes a first input circuit path and a first output circuit path, the first input circuit path is operated at a first supply voltage and the first output circuit path is operated at a second supply voltage. The second current mirror circuit includes a second input circuit path and a second output circuit path, the second input circuit path is operated at the second supply voltage, and the second output circuit path is connected to the first input circuit path so that variations in a current through the first output circuit path are compensated by a current in the second output circuit path.