With Current Source Or Current Mirror Patents (Class 327/132)
  • Patent number: 10763832
    Abstract: Trimming components within an oscillator comprising: a trim-capable current source, wherein the trim-capable current source comprises a trimmable resistor and a trimmable current component, a comparator comprising a first input terminal that couples to the trim-capable current source and the second input terminal that couples to a reference voltage source, a switch coupled to the first input terminal and the trim-capable current source, and a trim-capable capacitor coupled to the switch, wherein the switch is coupled between the trim-capable capacitor and the trim-capable current source.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 1, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Aniruddha Roy, Nitin Agarwal, Rajavelu Thinakaran
  • Patent number: 10616965
    Abstract: A passive illumination ramping circuit for a light-emitting diode (LED) is disclosed. In one or more embodiments, the illumination ramping circuit includes a first control path configured to control an on time of the LED and a second control path configured to control an off time of the LED. In embodiments, the first control path includes a first resistor in series with a first diode, and the second control path includes a second resistor in series with a second diode. The first and second control paths are in parallel with one another, in between a first node and a second node. The illumination ramping circuit further includes a capacitor coupled between the second node and an electrical ground. The illumination ramping circuit further includes a transistor for switching the LED on and off, the transistor including a gate terminal coupled to the second node.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: April 7, 2020
    Assignee: B/E Aerospace, Inc.
    Inventor: James Goddard
  • Patent number: 10483985
    Abstract: An oscillator using a supply regulation loop and a method of operating the oscillator are provided.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: November 19, 2019
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Chisung Bae, Sangjoon Kim, Yoonmyung Lee, Jaehong Jung, Jung-Hoon Chun
  • Patent number: 10120399
    Abstract: An example method of trimming a voltage reference in an integrated circuit (IC) includes at a first temperature, sequencing through a first plurality of trim codes for a reference circuit of the voltage reference configured to generate a proportional-to-temperature current and a corresponding first control voltage, and a complementary-to-temperature current and a corresponding second control voltage. The method further includes measuring a voltage output of the voltage reference for each of the first plurality of trim codes to obtain first voltage output values. The method further includes at a second temperature, sequencing through a second plurality of trim codes for the reference circuit. The method further includes measuring the voltage output of the voltage reference for each of the second plurality of trim codes to obtain second voltage output values. The method further includes selecting a trim code for the reference circuit based on the first voltage output values and the second voltage output values.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: November 6, 2018
    Assignee: XILINX, INC.
    Inventors: Umanath R. Kamath, Edward Cullen, John K. Jennings
  • Patent number: 9236067
    Abstract: The back EMF (BEMF) of a motor is sensed and compared to a target back EMF (BEMF) to generate an error control signal. The circuit supply voltage is also sensed. A PWM motor control signal is generated in response to a comparison of the error control signal to a ramp signal having a variable slope. The variable slope is selected in response to the sensed circuit supply voltage. The motor is then driven in response to the PWM control signal. The sign of the error control signal is used to selectively short one of motor terminals to a reference voltage supply node while the other motor terminal is driven in response to the PWM control signal.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: January 12, 2016
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Lorenzo Ferrario, Kaufik Linggajaya
  • Patent number: 9030239
    Abstract: A potentiostat includes a voltage regulator, a current mirror, a capacitor, a comparator, a current source, and a counter. The voltage regulator maintains a voltage on a working electrode of an electrochemical sensor. The current mirror develops a mirror current that mirrors an input current from the working electrode. The capacitor is alternately charged by the mirror current, causing the capacitor voltage to increase at a rate related to the current's magnitude, and discharged by a control current, causing the capacitor voltage to decrease. The comparator outputs a waveform that includes upward and downward transitions based on the variations of the capacitor voltage. The current source produces the control current based on the waveform. The counter counts the number of upward or downward transitions in the waveform during a predetermined sampling period to produce a digital output. The digital output is representative of the magnitude of the input current.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: May 12, 2015
    Assignee: Google Inc.
    Inventors: Alireza Dastgheib, Brian Otis
  • Patent number: 8922289
    Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: December 30, 2014
    Assignee: Spansion LLC
    Inventors: Kazuhiro Mitsuda, Kogi Okada, Suguru Tachibana
  • Patent number: 8907705
    Abstract: A fully integrated ramp generator circuit includes a first current generator that sources current to first capacitor through a first transistor that is gate controlled by the complement of a periodic signal. The ramping voltage stored on the first capacitor is buffered to an output node as a ramp output signal. A second transistor couples the output node to the first current generator and is gate controlled by the periodic signal. The periodic signal is generated at the output of a flip-flop that receives an input clock signal and reset signal. The reset signal is generated by a comparator circuit operable to compare the voltage on a second capacitor to a reference. The second capacitor is charged by a second current source and discharged by a third transistor that is gate controlled by the periodic signal.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: December 9, 2014
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Tao Tao Huang, Meng Wang
  • Patent number: 8890587
    Abstract: An adaptive slope generator can include a current mirror configured to receive a multiplied current that varies as a function of an output voltage and a switching frequency of a switching current. The output voltage can characterize the switching current provided to a load coupled to an inductor. The current mirror can also be configured to receive an oscillation current. The oscillation current can have an amplitude that corresponds to the switching frequency of the switching current. The current mirror can be further configured to generate an output current substantially equivalent to the product of the oscillation current and the output voltage. The adaptive slope generator can also include a ramp generator configured to generate a compensation signal based on the output current. The compensation signal can have a sawtooth shape and a slope that varies as a function of the output voltage.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: November 18, 2014
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Ferdinand Stettner
  • Publication number: 20140218075
    Abstract: An adaptive slope generator can include a current mirror configured to receive a multiplied current that varies as a function of an output voltage and a switching frequency of a switching current. The output voltage can characterize the switching current provided to a load coupled to an inductor. The current mirror can also be configured to receive an oscillation current. The oscillation current can have an amplitude that corresponds to the switching frequency of the switching current. The current mirror can be further configured to generate an output current substantially equivalent to the product of the oscillation current and the output voltage. The adaptive slope generator can also include a ramp generator configured to generate a compensation signal based on the output current. The compensation signal can have a sawtooth shape and a slope that varies as a function of the output voltage.
    Type: Application
    Filed: February 7, 2013
    Publication date: August 7, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: FERDINAND STETTNER
  • Publication number: 20140126249
    Abstract: A signal averaging circuit includes a plurality of switched weighted current sources to generate a total amount of charge. The total amount of charge is representative of a weighted sum of a plurality of input signal samples during an active period of a read enable signal. A timing control signal generator is coupled to receive an input signal and the read enable signal and sequentially switch the plurality of switched weighted current sources to adjust the total amount of charge in response to the input signal during the active period of the read enable signal. A storage circuit is coupled to the plurality of switched weighted current sources to convert the total amount of charge into a voltage representative of an output signal.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 8, 2014
    Applicant: Power Integrations, Inc.
    Inventor: William M. Polivka
  • Patent number: 8704558
    Abstract: A triangular waveform generator includes a square waveform clock circuit and an integrating circuit. The integration circuit receives input from the square waveform clock circuit and generates a triangular waveform output. A feedback circuit is operatively connected to the integrating circuit to reduce the audio band noise content in the triangular waveform output. The feedback circuit acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: April 22, 2014
    Assignee: RGB Systems, Inc.
    Inventor: Eric Mendenhall
  • Patent number: 8653863
    Abstract: The sawtooth wave generation circuit includes: a switch circuit configured to switch a connection state thereof between a first connection state, in which a current from a current source is flowed from a first terminal of the output capacitor to a second terminal of the output capacitor, and a second connection state, in which a current from the current source is flowed from the second terminal of the output capacitor to the first terminal of the output capacitor; a switch control circuit configured such that, in each connection state of the switch circuit, if an output voltage has reached a predetermined threshold which is set in relation to an intermediate voltage, the switch control circuit controls the switch circuit to switch the connection state to the other connection state at least during a part of a predetermined period thereafter.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: February 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Tadata Hatanaka, Takuya Ishii
  • Publication number: 20130335143
    Abstract: A class-D power amplifier capable of reducing electromagnetic interference includes an integrator, a triangular wave generator, a comparator, a gate driver, a feedback circuit, and an output stage circuit. The integrator is used for receiving an input signal and potential of ground, and outputting a first voltage. The comparator is used for comparing the first voltage with a triangular wave generated by the triangular wave generator to output a pulse-width modulation signal. The gate driver is used for driving the output stage circuit to output an output voltage according to the pulse-width modulation signal. Therefore, the class-D power amplifier reduces the electromagnetic interference by the triangular wave.
    Type: Application
    Filed: February 4, 2013
    Publication date: December 19, 2013
    Applicant: PRINCETON TECHNOLOGY CORPORATION
    Inventors: Yung-Ming Lee, Ming-Chung Li
  • Publication number: 20130307594
    Abstract: The sawtooth wave generation circuit includes: a switch circuit configured to switch a connection state thereof between a first connection state, in which a current from a current source is flowed from a first terminal of the output capacitor to a second terminal of the output capacitor, and a second connection state, in which a current from the current source is flowed from the second terminal of the output capacitor to the first terminal of the output capacitor; a switch control circuit configured such that, in each connection state of the switch circuit, if an output voltage has reached a predetermined threshold which is set in relation to an intermediate voltage, the switch control circuit controls the switch circuit to switch the connection state to the other connection state at least during a part of a predetermined period thereafter.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 21, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Tadata HATANAKA, Takuya ISHII
  • Patent number: 8508307
    Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: August 13, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kazuhiro Mitsuda, Koji Okada, Suguru Tachibana
  • Patent number: 8476942
    Abstract: An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: July 2, 2013
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Jun Liu, Haibo Zhang
  • Publication number: 20130154692
    Abstract: A circuit for generating a signal comprising a first transistor having a drain, a gate and a source. A second transistor having a drain, a source and a gate coupled to the gate of the first transistor to form a current mirror. A current source coupled to the source of the first transistor. A diode-connected transistor having a drain coupled to the source of the second transistor, a source and a gate that forms an output. A variable resistor having a first terminal coupled to the source of diode-connected transistor and a second terminal. A capacitor coupled to the second terminal of the variable resistor.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 20, 2013
    Applicant: CONEXANT SYSTEMS, INC.
    Inventor: CONEXANT SYSTEMS, INC.
  • Patent number: 8450676
    Abstract: An optical receiver suitable for connecting to a photodiode generating a photocurrent with a sensing resistor and a diode circuit in parallel with the sensing resistor to limit the voltage across the sensing resistor. The diode circuit allows for a larger resistor providing greater sensitivity without risking violating the necessary headroom available to the photodiode.
    Type: Grant
    Filed: December 12, 2009
    Date of Patent: May 28, 2013
    Assignee: Iptronics A/S
    Inventor: Kenn Christensen
  • Publication number: 20130087688
    Abstract: A circuit configured to output a ramp signal having a potential varying depending on time includes a voltage supply unit configured to supply a plurality of voltages having different amplitudes, a current supply unit, an integration circuit configured to output the ramp signal, and a capacitive element. The voltage supply unit is connected to one terminal of the capacitive element. The integration circuit and the current supply unit are connected to another terminal of the capacitive element.
    Type: Application
    Filed: September 27, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: CANON KABUSHIKI KAISHA
  • Patent number: 8410832
    Abstract: A triangular waveform generator includes a square waveform clock circuit and an integrating circuit. The integration circuit receives input from the square waveform clock circuit and generates a triangular waveform output. A feedback circuit is operatively connected to the integrating circuit to reduce the audio band noise content in the triangular waveform output. The feedback circuit acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: April 2, 2013
    Assignee: RGB Systems, Inc.
    Inventor: Eric Mendenhall
  • Patent number: 8395425
    Abstract: System and method for generating one or more ramp signals. The method includes an oscillator configured to generate at least a clock signal, and a ramp signal generator configured to receive at least the clock signal and generate a first ramp signal. Additionally, the ramp signal generator is coupled to a first resistor including a first terminal and a second terminal. The first resistor is configured to receive an input voltage at the first terminal and is coupled to the ramp signal generator at the second terminal. Moreover, the first resistor is associated with a first resistance value. Also, the clock signal is associated with at least a predetermined frequency. The predetermined frequency does not change if the input voltage changes from a first magnitude to a second magnitude. The first magnitude is different from the second magnitude.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: March 12, 2013
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Liqiang Zhu, Miao Li, Lieyi Fang
  • Publication number: 20120274146
    Abstract: In a switch mode power supply, a circuit and method for switching between an internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the power supply using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing. In one embodiment, a power system comprises a plurality of power supplies connected in parallel to a common load and where each power supply is synchronized to the external clock when a stable external clock has been detected by each.
    Type: Application
    Filed: August 4, 2011
    Publication date: November 1, 2012
    Inventors: Steven Patrick Laur, Zbigniew Jan Lata, Jinyu Yang
  • Patent number: 8294495
    Abstract: A circuit includes a level-crossing detector to generate a level-crossing detection signal when an input signal crosses a predetermined voltage level. A first stage set of capacitors is operatively coupled to the level-crossing detector. A ramp circuit is operatively coupled to the set of series-connected capacitors. A second stage set of capacitors is operatively coupled to the first stage set of capacitors and the ramp circuit. The ramp circuit includes a feedback capacitor and a preset switch to provide a linear ramp output.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: October 23, 2012
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Hae-Seung Lee
  • Patent number: 8258828
    Abstract: An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: September 4, 2012
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Jun Liu, Haibo Zhang
  • Publication number: 20120212263
    Abstract: Waveform generation circuits are provided. A waveform generation circuit includes a waveform generation block configured to generate a waveform signal corresponding to a driving control signal, and a control signal generation block configured to generate the driving control signal to compensate the waveform signal for an environmental factor affecting the waveform generation circuit.
    Type: Application
    Filed: April 30, 2012
    Publication date: August 23, 2012
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventor: Kyu-Young Chung
  • Patent number: 8198924
    Abstract: A triangular waveform generator includes a square waveform clock circuit and an active integrator. The active integrator receives input from the square waveform clock circuit and generates a triangular waveform output. An active feedback network is operatively added to the active integrator to reduce the audio band noise content in the triangular waveform output. The feedback network acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: June 12, 2012
    Assignee: RGB Systems, Inc.
    Inventor: Eric Mendenhall
  • Patent number: 8184139
    Abstract: A driving apparatus having driving circuits formed to correspond to driven circuits arranged on a circuit board. Each driving circuit includes a driving control unit for driving the corresponding driven circuit, a reference voltage generation unit for generating a reference voltage according to a temperature of the corresponding driven circuit, a control voltage generation unit for generating, based on the reference voltage supplied from the reference voltage generation unit, a control voltage for driving the corresponding driven circuit, the control voltage generation unit supplying the generated control voltage to the driving control unit, a switch device formed between the control voltage generation unit and the reference voltage generation unit, and a switch control unit for driving the switch device based on an inputted control signal. The control voltage generation unit is connected to the reference voltage generation unit of another of the driving circuits via the switch device.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: May 22, 2012
    Assignee: Oki Data Corporation
    Inventor: Akira Nagumo
  • Publication number: 20120081091
    Abstract: A current generator circuit included in a triangle-wave generator circuit in a control circuit includes plural stages of current mirrors connected in parallel with each other. The plural stages of current mirrors are placed so that the sum of output currents output therefrom becomes an output current of the current generator circuit. A switching element that controls the on/off state of a current in accordance with the amount of load current of a DCDC converter is connected to each of the current mirrors.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 5, 2012
    Inventor: Yoshiaki Ito
  • Patent number: 8138686
    Abstract: For efficiency improvement of a LED display system including a charge pump and a LED connected to either the voltage input terminal or the voltage output terminal of the charge pump, either one or both of two current regulators are enabled according to a voltage detected from the LED, for establishing a driving current for the LED. When the detected voltage is higher than a threshold, the first one of the current sources is enabled sole. When the detected voltage is lower than the threshold, the second one of the current sources is enabled sole, or both the current sources are enabled, or the current sources are alternatively enabled.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: March 20, 2012
    Assignee: Richtek Technology Corp.
    Inventors: Shui-Mu Lin, Tsung-Wei Huang, Jien-Sheng Chen
  • Patent number: 8130307
    Abstract: A drive circuit applying two or more drive voltages to a charge transfer unit includes at least one current mirror circuit that receives a reference current and outputs a predetermined current; at least one switch circuit that switches the current output from the at least one current mirror circuit to apply the multiple drive voltages to the charge transfer unit; and at least one time constant circuit that gives a predetermined time constant to the reference current in the switching by the switch circuit.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: March 6, 2012
    Assignee: Sony Corporation
    Inventors: Azuma Kawabe, Hidenobu Kakioka, Fumiaki Fukuoka, Isao Hirota, Masahiro Segami, Yukihisa Kinugasa
  • Publication number: 20110285428
    Abstract: A sawtooth generator circuit comprises a first triangular waveform generator with equal ramp up and ramp down rates and a second triangular waveform generator with equal ramp up and ramp down rates and which are equal to the ramp up and ramp down rates of the first triangular waveform generator. The first and second triangular waveform generators are controlled to be 180 degrees out of phase. A switching arrangement alternately switches the increasing or decreasing ramps of the first and second triangular waveform generators to an output of the sawtooth generator circuit. The invention provides a sawtooth generator circuit which is suitable for high frequency applications, with low current consumption and low ground bounce. A very fast falling edge can be obtained.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 24, 2011
    Applicant: NXP B.V.
    Inventors: Michael Gattung, Gerhard Osterloh, Ralf Beier
  • Patent number: 8058939
    Abstract: A slope compensation circuit includes an oscillator for generating a first clock signal having a reference frequency, a ramp signal generator for generating a ramp signal having a duty ratio of about 50% or higher based on the first clock signal, and a slope compensation signal generator for outputting a slope compensation current based on the ramp signal.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: November 15, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Sung-Hoon Bea, Hwan Cho
  • Patent number: 8044651
    Abstract: This patent discloses an efficient PWM controller for generating a pulse signal in response to a feedback signal, capable of operating in a normal mode or a green mode, comprising: a capacitor for building a saw-tooth signal by current integration, the saw-tooth signal having a ramp-up period and a ramp-down period; a first composite current source for the ramp-up period, detachable into a first constant current source and a first variable current source; and a second composite current source for the ramp-down period, detachable into a second constant current source and a second variable current source; wherein, the first variable current source is attached to the first constant current source and the second variable current source is attached to the second constant current source respectively in the green mode.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: October 25, 2011
    Assignee: Grenergy Opto., Inc.
    Inventors: Yen-Hui Wang, Chin-Yen Lin, Chia-Chieh Hung, Yu-Min Shih
  • Publication number: 20110254596
    Abstract: A spread-spectrum circuit including an inverter, a current source, a control unit and a shaping circuit is provided. An input terminal of the inverter receives an original clock signal. The current source is coupled to a current transmission terminal of the inverter. The control unit includes a control circuit, and changes the current magnitude of the current source according to the original clock signal to control the charging/discharging speed of an output terminal of the inverter, so that the output terminal outputs a voltage signal. The shaping circuit shapes the voltage signal into a spread-spectrum clock signal.
    Type: Application
    Filed: September 28, 2010
    Publication date: October 20, 2011
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Ching-Ho HUNG, Yung-Cheng Lin, Po-Yu Tseng
  • Patent number: 8030976
    Abstract: A triangle wave generating circuit comprising: a pulse generating circuit configured to generate a plurality of pulse signals with the same period and with phases different from one another; and a plurality of charge/discharge circuits configured to be supplied with the plurality of pulse signals, respectively, the plurality of charge/discharge circuits each including: a current supply circuit configured to supply to a capacitor a first current for charging at a predetermined current value or a second current for discharging at a predetermined current value; and a charge/discharge control circuit configured to switch between the first current and the second current when the pulse signals are supplied thereto and when a voltage across the capacitor reaches a predetermined reference voltage, the first current and the second current supplied from the current supply circuit to the capacitor.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: October 4, 2011
    Assignees: Sanyo Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Mitsuru Ooyagi, Tomoaki Nishi
  • Patent number: 7948281
    Abstract: A triangular waveform generator includes a square waveform clock circuit and an active integrator. The active integrator receives input from the square waveform clock circuit and generates a triangular waveform output. An active feedback network is operatively added to the active integrator to reduce the audio band noise content in the triangular waveform output. The feedback network acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: May 24, 2011
    Assignee: RGB Systems, Inc.
    Inventor: Eric Mendenhall
  • Patent number: 7948280
    Abstract: A sawtooth generator adapted to produce a sawtooth voltage, a method of operating the same, and a power converter employing the sawtooth generator and method. In one embodiment, the sawtooth generator includes a current source, coupled to a clock with a clock frequency, configured to produce a reference current proportional to the clock frequency. The sawtooth generator also includes an active network including a switch and a capacitor coupled to the current source and configured to provide a sawtooth voltage with a waveform slope produced across the capacitor substantially proportional to the reference current.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: May 24, 2011
    Assignee: Enpirion, Inc.
    Inventors: Mirmira Ramarao Dwarakanath, Jue Wang
  • Patent number: 7919998
    Abstract: A triangle waveform generator is set forth that comprises a capacitive element, a regulator, and a control circuit. The regulator is configured to charge the capacitive element in responsive to a first control signal and to discharge the capacitive element in response to a second control signal. The control circuit is responsive to a reference waveform to generate the first and second control signals. In one example, the control circuit generates the first and second control signals in response to the amplitude, frequency, phase, and symmetry of the reference waveform.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: April 5, 2011
    Assignee: Harman International Industries, Incorporated
    Inventor: Gerald R. Stanley
  • Patent number: 7800418
    Abstract: A first switched capacitor circuit is connected to the source of one MOS transistor of a current mirror pair configured by a pair of MOS transistors and a second switched capacitor circuit is connected to the source of the other MOS transistor. Each of the first and second switched capacitor circuits includes a capacitor and a switch connected in parallel with the capacitor and the switch is on/off-controlled based on a clock signal of a preset cycle. Each of the first and second switched capacitor circuits equivalently functions as a resistor with large resistance and a variation in the output current of the current mirror circuit based on a variation in the threshold voltages of the pair of MOS transistors can be reduced even if the power source voltage is reduced.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: September 21, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigeo Imai
  • Patent number: 7777474
    Abstract: A DC-DC converter for converting an input voltage and generating an output voltage. The DC-DC converter includes an adjustment resistor. A control circuit generates a control signal and includes an external terminal to which the adjustment resistor is externally connected. A switching transistor is connected to the control circuit and turned on or off in accordance with the control signal. The control circuit includes an oscillator that generates an oscillation signal. The control circuit generates the control signal based on the oscillation signal and a signal that is in accordance with an output voltage or output current of the DC-DC converter. The oscillator monitors a first amount of current flowing through the external terminal of the control circuit and generates the oscillation signal in a cycle that is accordance with the monitoring result.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: August 17, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yukinori Maekawa, Yoshihiro Nagaya, Keita Sekine, Takashi Matsumoto, Takehito Doi
  • Publication number: 20100164563
    Abstract: A slope compensation circuit includes apparatus includes an oscillator for generating a first clock signal having a reference frequency, a ramp signal generator for generating a ramp signal having a duty ratio of about 50% or higher based on the first clock signal, and a slope compensation signal generator for outputting a slope compensation current based on the ramp signal.
    Type: Application
    Filed: December 18, 2009
    Publication date: July 1, 2010
    Inventors: Sung-Hoon Bea, Hwan Cho
  • Patent number: 7746129
    Abstract: A low power servo-controlled single clock ramp generator (100) includes a fast switched comparator (102), charge pump (110) and voltage-to-current converter (120) connected to provide a feedback control mechanism under control of a pulse comparison clock signal (pulse_comp) and a reset pulse clock signal (rst_pulse) that are generated from a single input clock signal (clkin) so that there are well defined time intervals between pulses in the pulse comparison clock signal and the reset pulse clock signal, thereby providing a ramp signal (Vramp_out) having a stable, frequency-independent amplitude that is not limited by the reference voltage.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: June 29, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jung Hyun Choi, Fernando Chavez Porras
  • Patent number: 7741827
    Abstract: In one embodiment, a single input terminal of a parameter control circuit is utilized to form two different parameters of the parameter control circuit. In another embodiment, the parameter control circuit can include charging and discharging current mirrors.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: June 22, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Terry Allinder, George H. Barbehenn
  • Publication number: 20100128552
    Abstract: A high-voltage sawtooth current driving circuit and a memory device including the same are described. In the high-voltage sawtooth current driving circuit includes a charge pump circuit configured to output a first voltage, a regulating circuit configured to regulate a second voltage using the first voltage output from the charge pump circuit, and a sawtooth current driver configured to generate a sawtooth current in response to the second voltage regulated by the regulating circuit.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 27, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Yong Hoon KANG
  • Publication number: 20100045256
    Abstract: A slope compensation circuit includes a first differential pair circuit, a current mirror unit, a first operating current generation circuit, and a transconductance compensation circuit. The first differential pair circuit is connected to a first current source and receives a pair of differential oscillation signals to generate a pair of differential currents corresponding to the differential oscillation signals. The current mirror unit is connected to the first differential pair circuit and mirrors the differential currents. The first operating current generation circuit is connected to the current mirror unit and generates a first operating current including the differential currents. The transconductance compensation circuit stabilizes a quiescent operating point of the first operating current generation circuit and receives the differential oscillation signals to generate an output current multiple times the value of the first operating current.
    Type: Application
    Filed: August 21, 2008
    Publication date: February 25, 2010
    Applicant: HIMAX ANALOGIC, INC.
    Inventor: Kuo-Hung Wu
  • Publication number: 20100045350
    Abstract: A semiconductor device includes a current control circuit for outputting and sinking a current in synchronization with a received clock signal; and a current/voltage conversion circuit having a first capacitor charged and discharged by the current control circuit outputting and sinking the current, respectively, and outputting a triangular wave based on the charge stored in the first capacitor.
    Type: Application
    Filed: August 20, 2009
    Publication date: February 25, 2010
    Applicant: Rohm Co., Ltd.
    Inventors: Koji Saito, Kuniyuki Kubo
  • Patent number: 7626430
    Abstract: In a triangular-wave generating apparatus including an output terminal adapted to output an output voltage, an incorporated capacitor connected to the output terminal, a first variable current source adapted to charge the incorporated capacitor and a second variable current source adapted to discharge the incorporated capacitor, a charging/discharging current setting circuit sets a charging current in the first variable current source and sets a discharging current in the second variable current source. A level determining circuit determines whether or not the output voltage reaches one of predetermined voltages, to generate timing signals. A reference clock signal generating circuit generates a reference clock signal for defining a frequency of the output voltage. A charging/discharging current adjusting circuit adjusts the charging current and the discharging current in accordance with the timing signals and the reference clock signal.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: December 1, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Toshiaki Motoyui
  • Patent number: 7579918
    Abstract: A clock generator includes a current source for generating a constant current; a current mirror coupled between a supply voltage and the current source for generating a mirror current equal to the constant current multiplied by a predetermined value; and a charge control module coupled with the current source and the current mirror for charging a capacitor when a voltage thereof is lower than a predetermined threshold voltage and for discharging the capacitor when the voltage thereof is higher than the predetermined threshold voltage, thereby generating a clock signal at a predetermined frequency, wherein the charge control module adjusts the predetermined frequency by changing the predetermined threshold voltage.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: August 25, 2009
    Assignees: Taiwan Semiconductor Manufacturing Co., Ltd., Global Unichip Corp.
    Inventor: Kuo-Chun Hsu
  • Patent number: 7576574
    Abstract: A constant current generator which includes a first transistor to supply current in accordance with a control signal, a second transistor that is a MOS transistor having an equal impurity type to the first transistor. To supply current to a load in accordance with the control signal, a gate and source of the second transistor are connected to a gate and source of the first transistor, respectively. Also, there is a voltage adjustor to adjust drain voltage of the first transistor in accordance with drain voltage of the second transistor, a constant current generation circuit including a first current source to supply first current to the first transistor through the voltage adjustor, and a level shifter to shift a voltage at a connection node of the voltage adjustor and the constant current generation circuit, output a shifted voltage to each gate of the first and second transistors.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: August 18, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Ippei Noda