Abstract: A slope compensation circuit includes a first differential pair circuit, a current mirror unit, a first operating current generation circuit, and a transconductance compensation circuit. The first differential pair circuit is connected to a first current source and receives a pair of differential oscillation signals to generate a pair of differential currents corresponding to the differential oscillation signals. The current mirror unit is connected to the first differential pair circuit and mirrors the differential currents. The first operating current generation circuit is connected to the current mirror unit and generates a first operating current including the differential currents. The transconductance compensation circuit stabilizes a quiescent operating point of the first operating current generation circuit and receives the differential oscillation signals to generate an output current multiple times the value of the first operating current.

Abstract: In a triangular-wave generating apparatus including an output terminal adapted to output an output voltage, an incorporated capacitor connected to the output terminal, a first variable current source adapted to charge the incorporated capacitor and a second variable current source adapted to discharge the incorporated capacitor, a charging/discharging current setting circuit sets a charging current in the first variable current source and sets a discharging current in the second variable current source. A level determining circuit determines whether or not the output voltage reaches one of predetermined voltages, to generate timing signals. A reference clock signal generating circuit generates a reference clock signal for defining a frequency of the output voltage. A charging/discharging current adjusting circuit adjusts the charging current and the discharging current in accordance with the timing signals and the reference clock signal.

Abstract: A clock generator includes a current source for generating a constant current; a current mirror coupled between a supply voltage and the current source for generating a mirror current equal to the constant current multiplied by a predetermined value; and a charge control module coupled with the current source and the current mirror for charging a capacitor when a voltage thereof is lower than a predetermined threshold voltage and for discharging the capacitor when the voltage thereof is higher than the predetermined threshold voltage, thereby generating a clock signal at a predetermined frequency, wherein the charge control module adjusts the predetermined frequency by changing the predetermined threshold voltage.

Abstract: A constant current generator which includes a first transistor to supply current in accordance with a control signal, a second transistor that is a MOS transistor having an equal impurity type to the first transistor. To supply current to a load in accordance with the control signal, a gate and source of the second transistor are connected to a gate and source of the first transistor, respectively. Also, there is a voltage adjustor to adjust drain voltage of the first transistor in accordance with drain voltage of the second transistor, a constant current generation circuit including a first current source to supply first current to the first transistor through the voltage adjustor, and a level shifter to shift a voltage at a connection node of the voltage adjustor and the constant current generation circuit, output a shifted voltage to each gate of the first and second transistors.

Abstract: A circuit for calibrating an oscillating ramp signal to a variable DC reference signal in accordance with an embodiment of the present application includes a circuit for setting a predetermined time period during which a charging capacitor can charge and thus determining a ramp oscillator frequency; a variable current source for providing a charging current to the charging capacitor; a circuit for selecting the charging current fed by the variable current source to said charging capacitor; and a circuit for comparing the oscillating ramp signal to the variable DC reference signal and for supplying a signal to the selecting circuit for controlling the amount of current supplied to said charging capacitor thereby determining the charging voltage across said capacitor at the end of said predetermined time period.

Abstract: A triangle waveform generator is set forth that comprises a capacitive element, a regulator, and a control circuit. The regulator is configured to charge the capacitive element in responsive to a first control signal and to discharge the capacitive element in response to a second control signal. The control circuit is responsive to a reference waveform to generate the first and second control signals. In one example, the control circuit generates the first and second control signals in response to the amplitude, frequency, phase, and symmetry of the reference waveform.

Abstract: A triangle wave generator with function of spreading frequency spectrum is provided. The triangle wave generator includes a switch control circuit, a current generator, an integrator, and a spread spectrum control circuit. The switch control circuit provides an internal clock and a switch control signal. The current generator is coupled to the switch control circuit and provides charge current according to the switch control signal. The integrator is coupled to the current generator and provides a triangle wave signal. The spread spectrum control circuit is coupled to the switch control circuit and the current generator for providing a current control signal according to the internal clock.

Abstract: This disclosure relates to an electronic driver device for an external load to which an input signal is applied at its input and that produces an output signal to the external load from its output. Such an electronic driver device includes elements that reduce dependence of the slew rate of the output signal on the external load capacitance.

Abstract: An RC oscillator circuit is disclosed. The RC oscillator circuit includes a current generator configured to generate a charge current. The RC oscillator circuit also includes an integrator having an input and an output, the input being connected to the current generator. The RC oscillator circuit also includes a comparator having a first input, a second input, and an output, the first input being connected to the output of the integrator and the second input being configured to supply a reference threshold. The RC oscillator circuit also includes a clock pulse generator connected to the output of the comparator and a reference generator configured to generate the reference threshold based on a supply voltage of the RC oscillator circuit.

Abstract: A regulated mirror current source circuit has an output transistor, a regulator for controlling the output circuit, and a current mirror having two or more current paths. The first path of the mirror is coupled in series with a current path of the output circuit, and the second path is coupled to the regulator, to provide feedback. The feedback can provide better precision, or reduced component area. The circuit can include cascode transistors, and the regulator can have integral control. The output transistor gate-source voltage is overdriven to reduce “on” resistance of the output transistor. When the output transistor is a high voltage transistor, its area can be reduced without sacrificing compliance.

Abstract: A clock generator includes a current source for generating a constant current; a current mirror coupled between a supply voltage and the current source for generating a mirror current equal to the constant current multiplied by a predetermined value; and a charge control module coupled with the current source and the current mirror for charging a capacitor when a voltage thereof is lower than a predetermined threshold voltage and for discharging the capacitor when the voltage thereof is higher than the predetermined threshold voltage, thereby generating a clock signal at a predetermined frequency, wherein the charge control module adjusts the predetermined frequency by changing the predetermined threshold voltage.

Abstract: Zero crossings for a non-symmetrical VIN may be determined by first amplifying and clipping VIN to create a non-symmetrical square wave whose zero crossings are those of VIN. A selected polarity edge of the non-symmetrical square wave may be taken as a 0° indicator and is used to create a fundamental sawtooth ramp of the same frequency and in phase with VIN. The fundamental sawtooth ramp starts at zero volts, linearly ramps to some peak and is AC coupled to a comparator whose other input is zero volts. That creates a square wave that is symmetrical as to its half-cycles, and whose every other edge is synchronous with the start of the fundamental sawtooth ramp, and whose intervening edges occur in the middle of the ramp. The intervening edge is detected and taken as a 180° indicator.

Abstract: A high speed ramp generator is presented. The high speed ramp generator is advantageous over the prior art because it provides a ramp response without the delay incident with a simple integrator approach. A closed loop system generates a continuous ramp and, in an open loop manner, subtracts a mirror of the current ramp from itself. A switch is provided which when open, triggers an immediate current ramp output that is not dependent on the amplifier or any other component of prior art feedback circuits. Two such ramp generators may be used in tandem to provide alternating portions of a precision ramp signal, such as may be used to cancel the magnetization current induced in the primary of an isolation transformer.

Abstract: To oscillate and output multiphased triangular waves with a designed waveform shape, wave crest value, and phase relationship. This multiphased triangular wave oscillating circuit has two triangular wave generating circuits 10A and 10B for generating two phased triangular waves A and B with phases opposite each other, a middle point potential fixing element 20 that always fixes the middle point potential of the output voltage A and B of the two triangular wave generating circuits 10A and 10B at a fixed value, and a mode switching element 30 that instantly switches the output voltage generation mode (up-slope waveform mode/down-slope waveform mode) in the two triangular wave generating circuits 10A and 10B at a preset reference wave crest value level.

Abstract: A display driver comprises second and third MOSFETs for supplying reference currents equal to each other, a first current-input MOSET connected to the second MOSFET, a second current-input MOSFET connected to the third MOSFET, a plurality of mirroring devices which are placed between the first current-input MOSFET and the second current-input MOSFET and to which a current fed to each of the first and second current-input MOSFETs is distributed, and current adding means for changing the output current value by adding currents produced in the plurality of mirroring devices.

Abstract: A frequency programmable feed forward oscillator and triangular wave generator is disclosed having a first input for receiving an input voltage and a second input for receiving an input current. Circuitry within the device responsive to the input voltage scales the amplitude of a triangle wave form according to the provided input voltage and provides the scaled output voltage at a first output. In conjunction, the circuitry also generates a scaled PWM frequency responsive to the provided input current and provides this at a second output.

Abstract: A pre-charge apparatus and method for controlling startup transients in a capacitively-coupled switching power stage provide lower cost and improved startup transient performance in Class D amplifiers, as well as in other AC power converter applications. A charging source is activated at startup to control the charging of an external capacitor from a single power supply rail to an operating point voltage equal to the average DC output of the switching circuit, while a control circuit disables the output power stage of the switching converter. The current source may be a constant-current source and/or may be controlled via feedback from the voltage or current at the output terminal of the converter to taper the current level to more accurately control the charging. A discharge circuit can also be provided to discharge the output terminal to an opposite power supply rail before commencing the controlled charging.

Abstract: A triangular wave generating circuit adapted to a class-D amplifier is designed not to use a PLL circuit and to secure robustness regarding an amplification gain irrespective of variations of voltages, thus producing a high-quality triangular wave with a simple circuit constitution. First and second constant currents, which are generated in proportion to positive and negative voltages, are alternately and periodically selected using high impedance elements without causing noise. A first integrator produces a triangular wave in response to charged electricity realized by the first and second constant currents, wherein the triangular wave is supplied to a second integrator performing servo-amplification operation so as to suppress phase shifts thereof. Hence, it is possible to maintain a constant gain for the class-D amplifier irrespective of variations of voltages since the maximal and minimal voltages values of the triangular wave are made proportional to the positive and negative voltages.

Abstract: A low-noise output buffer for a digital signal is based on an analog amplifier having bandwidth greater than the switching rate of the digital logic signal. A converter circuit converts the digital logic signal to a ramp signal provided as an input to the analog amplifier. The ramp signal has a slope determined by a bias current and an input capacitance of the analog amplifier. The bias current is generated by a bias circuit such that the bias current varies as the input capacitance of the analog amplifier varies due to variations in the manufacturing process. Therefore, the slope of the ramp signal remains substantially constant despite the variations in the manufacturing process. In particular, the slope of the ramp signal is not undesirably steep even when the buffer is made by a worst-case “strong” process.

Abstract: A circuit to provide a differential signal output in response to a single-ended signal input, the circuit allowing for a wide common-mode input signal by providing complementary amplifier structures.

Abstract: A write driver circuit for driving a magnetic head applicable to a variety of magnetic heads or magnetic storage media is disclosed. The circuit includes a write current generating section for generating plural types of write current for magnetizing a predetermined area of a magnetic storage medium in a predetermined direction; a switching signal generating section for generating a switching signal for switching among the write currents; a switching section for changing the direction of magnetization through the magnetic head by switching among the write currents based on the switching signal; and an overshoot current generating section for generating an overshoot current for instantaneously increasing the write current when the direction of magnetization is changed by the switching section; wherein the circuit further includes an overshoot current generation signal producing section, and is designed so that the overshoot current is generated based on an overshoot current generation signal produced thereby.

Abstract: A pulse width modulation (PWM) amplifier which is capable of reducing unwanted radiation from a PWM output thereof, which can cause EMI, while reducing manufacturing costs thereof. A triangular wave-generating circuit (3) of the PWM amplifier outputs a triangular wave. The triangular wave has a waveform steep or gentle in pulse rising and falling slopes dependent on a value of current flowing through an FET (116) or an FET (117). The value of current is changed by a current flowing through a FET (112). A switching element (32) changes voltage applied to the gate of an FET (110), for control of increase and decrease in the current flowing through the FET (112). This enables the triangular wave to be generated such that it is formed by pulses having different periods. An input signal is subjected to PWM amplification based on the triangular wave generated.

Abstract: A T-RAM memory cell includes a temperature compensation device to adjust the gate-to-source voltage of an access transistor for the memory cell as a function of temperature so that the sub-threshold current of the transistor is insensitive to temperature variations. As a result, the sub-threshold current can be maintained slightly above the holding current of a thyristor used in the memory cell despite substantial temperature variations. In one embodiment, the temperature compensation device includes a current source directing a fixed current through a diode-connected transistor of the type used as the memory cell access transistor. Temperature induced changes in a reference voltage generated at the junction between the current source and the transistor therefore match the temperature induced changed in the sub-threshold current of the access transistor.

Abstract: Methods and structures for ensuring the highly linear discharge of a capacitor used for slew rate control of a power driving stage from a maximum voltage to a minimum supply voltage, such as ground. A voltage ramp generator uses a single cascoded current source to achieve the linear ramp-down.

Abstract: An oscillator has timing characteristics that are determined by resistor and capacitor values. The circuit comprises an astable multivibrator and a current reference. The multivibrator comprises a first and a second timing capacitor. The multivibrator is configured to produce an oscillating output signal in response to charging and discharging the first and the second timing capacitors. The current reference is configured to control the rate of change of charge of the first and second timing capacitors. The current reference is determined in part by the resistor values.

Abstract: Methods and structures for ensuring the highly linear discharge of a capacitor used for slew rate control of a power driving stage from a maximum voltage to a minimum supply voltage, such as ground. A voltage ramp generator uses a single cascoded current source to achieve the linear ramp-down.

Abstract: A differential charge pump includes common mode circuitry for supplying a common mode voltage to a charging capacitor in the charge pump. The gate voltage of a reference transistor in a biasing branch of the differential charge pump is adjusted until the drain voltage of the reference transistor is equal to the common mode voltage when a specified bias current is flowing through the biasing branch. The same gate voltage and bias current are provided to a first transistor in a first common mode branch and a second transistor in a second common mode branch. The drains of the first transistor and the second transistor are connected to a first plate and a second plate, respectively, of the charging capacitor. In this manner, a desired common mode voltage is supplied to the charging capacitor.

Abstract: A ramp capacitor CAP1 has a first terminal connected to a power supply voltage VBAT. A generator circuit is connected to a second terminal of the ramp capacitor and adapted to generate a voltage ramp at the terminals of the ramp capacitor. The generator circuit includes a constant current source SCC connected to the second terminal B12 of the ramp capacitor CAP1 and auxiliary circuit MAX adapted in the presence of a transient variation of the power supply voltage to determine the transient current flowing in the ramp capacitor and generated by the transient variation. Responsive thereto, delivery is made to the second terminal B12 of the ramp capacitor CAP1 of a charging current equal to the algebraic sum of the constant current delivered by the constant current source and an auxiliary current equal and opposite to the transient current.

Abstract: The integrating circuit of the triangular wave generating circuit includes an operational amplifier and a capacitor. Switch elements are alternatively turned ON and capacitors are alternatively recharged by the currents flowing in constant-current circuits thus obtaining a triangular wave on an output terminal. In this practice, when the voltage on the output terminal reaches ±1 V, comparator circuits (41, 42) and a flip-flop including NAND gates change over the switch elements. The currents flowing in the constant-current circuits are controlled depending on the current flowing in a load circuit. The current flowing in the load circuit is controlled by a PLL circuit including a phase comparator circuit, a loop filter, an LPF, an operational amplifier and an FET. This provides an output triangular wave having the same frequency as a clock pulse (CK).

Abstract: Methods and structures for ensuring the highly linear discharge of a capacitor used for slew rate control of a power driving stage from a maximum voltage to a minimum supply voltage, such as ground. A voltage ramp generator uses a single cascoded current source to achieve the linear ramp-down.

Abstract: A method of control of the current and voltage switching trajectories of insulated gate power semiconductor switches, more specifically MOSFETs and insulated gate bipolar transistor devices (IGBTs), is disclosed. MOSFETs and IGBTs are used in switch mode power supplies because of their easy driving ability and their ability to handle high currents and voltages at high-switching frequencies. However, the switching trajectories for both types of devices are responsible for both common-mode electromagnetic emissions generated by the drain current waveform and power losses in the commutation cell. These two characteristics represent opposing design objectives for power converters. The current invention uses a hybrid voltage/current gate signal source with feedback of the gate charge (or discharge) current to dynamically and independently control the drain current and drain voltage of an insulated semiconductor device.

Abstract: A control circuit for a ring oscillator uses an integrator and a comparator. The integrator receives a square wave signal as an input and provides a triangular wave signal as an output. The comparator generates a second square wave signal by comparing the triangular wave signal and a reference voltage. Duty cycle for the ring oscillator can be modulated by varying the reference voltage. For one embodiment of the control circuit, signal frequency of the ring oscillator can be modulated by varying biasing current for the comparator to set slew rate of the comparator. For one embodiment of the control circuit, a resistor and a capacitor form a simple RC circuit for the integrator. For an alternative embodiment of the control circuit, a resistor and an amplifier with a capacitor in a negative feedback loop form an active RC circuit for the integrator. For one embodiment of the control circuit, the comparator is an inverting comparator.

Abstract: A slope generator generates, in response to an input signal, a slope between a first and a second voltage level of an output voltage at an output node. The slope generator comprises a capacitor coupled to the output node, a first current source for providing a first current to the output node, and a second current source for providing a second current to the output node controlled by a first current switch. A control electrode of a first current path of the first current switch is coupled to and controlled by the input signal, a second current path is coupled to the output node, and the first current switch provides the first and the second voltage levels, or corresponding voltage levels derived therefrom, to the output node.

Abstract: An improved waveform generator (10) permits digital spectrum spreading by employing circuitry for controlling the charging and discharging of a load capacitor (24) to alter the generator's base frequency. A charge/discharge circuit (22) modulates the currents into the capacitor (24) to effect the slope of the triangle signal waveform (202). A threshold detector (26) determines the amplitude of the base frequency. Switch logic (28) controls an array of 1/N current switches (18) that provide incremental values of a reference source (12) to a summing function (16) which, in turn, feeds a charge/discharge circuit (22). The energy of the triangle waveform (202) remains approximately the same only it is now spread over a range of frequencies with the amplitude of the signal at a given point less than the amplitude of the base.

Abstract: A linear ramp generating and control circuit finding particular applicability in a time interval measurement system. The linear ramp circuit includes a hold capacitor which may be linearly discharged during one operating mode of the circuit by coupling a constant current source to the capacitor. The voltage on the hold capacitor is linearly discharged away from a baseline voltage level to a data voltage level which is subsequently passed to an analog-to-digital converter of the time interval measurement system for further processing. The hold capacitor voltage is returned to the baseline voltage level during a recovery mode of circuit operation by a recovery or recharge network. The recharge network may include an active-feedback circuit which implements an approximately second-order voltage response to the hold capacitor during the recovery mode of operation.

Abstract: A circuit and a method generate first and second triangular waveforms opposite in phase to each other. The circuit includes a capacitor having a first plate coupled to a first output at which the first triangular waveform is produced and a second plate coupled to a second output at which the second triangular waveform is produced. First and second switches are coupled between a first voltage reference and the first and second plates, respectively, of the capacitor. The circuit also includes a controller having a first output coupled to the control terminal of the first switch and a second output coupled to a controlled terminal of a second switch. The controller is structured to produce at the first and second outputs respective first and second control signals in opposition to each other and thereby control the first and second switches in opposition to each other.

Abstract: A dynamically controlled timing signal generator includes a source of a controlled current, a timing signal generating circuit coupled to the controlled current source for generating the timing signal, and a feedback circuit coupled to the controlled current source for controlling the controlled current source to produce a desired controlled current.

Abstract: In a signal input circuit, an input signal integrating circuit integrates an input signal in only a predetermined integration period. A reference voltage integrating circuit integrates a reference voltage in only the predetermined integration period. A differential amplifier circuit amplifies a difference between an output signal of the input signal integrating circuit and an output signal of the reference voltage integrating circuit. The input signal integrating circuit may be a charge/discharge type integrating circuit which stores charges corresponding to the input signal in only the predetermined integration period and thereafter releases the stored charges before the next integration period. The reference voltage integrating circuit may be a charge/discharge type integrating circuit which stores charges corresponding to the reference voltage in only the predetermined integration period and thereafter releases the stored charges before the next integration period.

Abstract: An adjustable timer circuit capable of producing accurate pulse outputs having a wide range of periods. The timer circuit includes a timing capacitor and an associated current source for producing a reference current having a magnitude which is derived from a reference voltage. A current divider is used to divide the reference current down to a smaller current used for charging the timing capacitor. A comparator circuit is provided for comparing the voltage produced across the timing capacitor with a comparison voltage also derived from the reference voltage. The timing capacitor is discharged in response to the comparator output so that subsequent output pulses can be produced. The current divider is adjustable in response to a mode control signal so that different magnitude charging currents can be produced which results in different magnitude pulse width outputs.

Abstract: A ramp circuit discharges an output capacitor to generate a substantially linear ramp signal, current injection is used to stabilize the ramp's output, reducing overshooting and ringing. With faster output stabilization, the ramp exhibits significantly faster repetition rates suitable testing high speed components such as RAM, microprocessors, high speed logic, and the like. The ramp includes an output transistor, with its output defining an output node coupled to a current source and a charge storage device such as a capacitor. The charge storage device charges when the transistor is "on". Namely, when the transistor is turned on, the output charge storage device is coupled to a reference voltage, which charges the device in a fixed time. When the transistor is turned "off", the charge storage device discharges, aided by the flow of current through the current source, resulting in the linear ramp signal.

Abstract: A circuit arrangement having at least two signal paths which can be alternately enabled by feeding respective controllable current sources and by logic signals selecting one of these controllable current sources, while, at a transition from one signal path to the other, the controllable current sources of the relevant two signal paths are controllable by a time-continuously changing control signal during a transition interval, such that currents which can be supplied by these two controllable current sources change continuously and in opposite directions.

Abstract: A frequency-to-current converter includes several capacitances with capacitive values that are effectively multiplied. After each of a series of periodic pulses, the voltage on a "ramp" capacitance is charged to a starting voltage. Then, during the period preceding the subsequent pulse, the ramp capacitance is allowed to discharge at a discharge rate that is a function of a voltage on a discharge-current bias capacitance. At the end of the period, the voltage on the ramp capacitance is sampled and compared to a reference. If the voltage on the ramp capacitance is too low or too high, indicating a discharge current that is too high or too low, respectively, the bias voltage on the bias capacitance is adjusted to compensate for the error. In another embodiment, a small ramp capacitance is repetitively charged and discharged between two reference voltage levels using alternating charge and discharge current levels.

Abstract: A novel waveform generating for generating a waveform having symmetrical rise and fall times. The waveform generator of the present invention includes a first current source, a second current source, a MOS capacitor and a clamping circuit. The first current source and the second current source are coupled to a node such that current generated by the first current source flows into the capacitor and current generated by the second current source flows out of the capacitor. The clamping circuit is also coupled to the node such that the output voltage generated by the waveform generator is limited to a minimum and a maximum value. Therefore, by controlling the current flowing into the node, and the capacitance at the node, the rate at which the output voltage changes over time is controlled. As such, a waveform having very precise rise and fall times is generated.

Abstract: A clock frequency detector is provided having a precise trip frequency which is insensitive to power supply variations. In one embodiment, the clock frequency detector employs a current source to discharge a capacitor at a constant rate and a gated current source to charge the capacitor at a frequency-dependent rate. If the charge rate exceeds the discharge rate, the capacitor will charge and an output signal is asserted. The gated current source is controlled by an edge-triggered pulse generator which generates pulses of a precise width in response to edges in the input clock signal. To create these pulses, the pulse generator produces an inverted clock signal with delayed transitions and combined this signal with the clock signal. The delayed transitions are created using a capacitor which is charged by a current source. The capacitor is provided with a shunt transistor which drains the charge from the capacitor whenever the clock signal is asserted.

Abstract: A precision oscillator circuit having a wide adjustable operating frequency range and an adjustable duty cycle. The precision oscillator use a window comparator circuit for monitoring a voltage of a capacitive element. The window comparator circuit has a first operating voltage edge and a second operating voltage edge wherein the first operating voltage edge latches an output signal of the window comparator circuit at one level when the voltage of the capacitive element is greater than the first operating voltage edge. The second operating voltage edge brings the output signal of the window comparator circuit back to an initial level when the voltage of the capacitive element is greater than the second operating voltage edge. A precision current reference source is coupled to the capacitive element and to the window comparator circuit. The precision current reference is used for generating currents which are insensitive to temperature, supply voltage, and process variations.

Abstract: A voltage ramp generator for a driver circuit is provided to give an output that is highly linear between zero and a maximum voltage has a combination of current sources or generators for charging and discharging a capacitor, with discharging performed by sequencing two different types of current sources. A first current source on the discharge side of the capacitor has transistors in cascode connected current mirrors and takes the capacitor voltage to a low value but not as low as zero. A second current source of a basic or simple current mirror then takes the capacitor voltage substantially to zero. The voltage ramp generator meets the requirements of high performance, integrated, driver circuits, particularly for achieving complete turn-off of a power device such as a DMOS transistor in a high side cascoded transistors goes up to a threshold near the full supply driver.

Abstract: An integrated detection circuit (10) linearly charges capacitors (14) and (16) over time in response to particular states of an input signal (12). Outputs from the integrated detection circuit (10) are generated by differential pairs (39) when the charge on either of the capacitors (14) or (16) is equal to or greater than a reference voltage input to the differential pairs (39).

Abstract: An integrated circuit chip for determining when the frequency of a clock pulse input signal is below a predetermined threshold level and including a capacitor charged up by a current source to produce a linearly-varying ramp signal. The charging circuit includes two MOS transistors, one arranged as a resistor to control the charging current, the other arranged as a capacitor to be charged. When the oxide layer produced by the IC process for making the chips varies in thickness from one batch of chips to a subsequently produced batch, the effect on the charging of the MOS capacitor resulting from the change in capacitance of the previously produced chip is at least partly compensated for by the corresponding change in resistance of the MOS resistor, thereby tending to maintain the charging rate constant.

Abstract: A current integrator for generating an output voltage (Vo) in response to an input current (Ii) to be integrated. The input current is applied to an integration capacitor via a current-current converter. This enables one end of the integration capacitor to be connected to a fixed voltage and to be implemented by means of a MOS transistor which occupies a comparatively small area. A further area reduction is possible by making the current gain (K) of the current-current converter smaller than 1.

Abstract: A low-power differential switching amplifier (200, 210, 220, 230) is provided which utilizes a unique technique of generating interlaced ramps. The interlacing of the ramps causes the ramp discharge time to be effectively zero, which produces exceptionally accurate sawtooth waveforms with virtually no distortion. The timing of the differential switching amplifier circuitry can be synchronized with an external clock. A voltage null point is produced in the differential amplifier where zero voltage at the input of the amplifier produces essentially zero power dissipation within the load, even if the load is low-Q or substantially resistive. Also, by use of a phase balancing technique, residual errors resulting from component mismatches, which would otherwise have imposed power losses upon the load, are nulled out automatically during the operation of the amplifier.