Abstract: A high-voltage waveform generator comprising a power source, a transformer unit comprising a magnetic core, attached to the power source, a plurality of power switch cards, each having an aperture that allows said magnetic core to pass therethrough, one or more control switches located on each power card, and a control means for actuating the control switches, a power output; wherein the power switch cards are connected in series, wherein each of the apertures in the power switch cards is surrounded by conductive windings, whereby when the power source is activated, the magnetic core induces a current in each of the conductive windings, and wherein the control means activates the control switches simultaneously in under 100 nanoseconds to generate a pulse.

Abstract: A reduced-pin bus system includes a bus having one or more signal lines that are coupled to a bus power supply through a current limiting device. A master unit is coupled to the bus and is arranged to transmit communications across the bus during an active period of the bus and to initiate communications during (and/or at the end of) a quiescent period of the bus. A slave unit is coupled to the bus and is arranged to couple power from the one or more signal lines to a capacitor during the quiescent period of the bus and to consume power from the capacitor during the active period of the bus.

Abstract: There are provided a peaking detection part detecting a peaking amount in an output part of an inductor peaking circuit and a control signal generation part varying a circuit parameter of the inductor peaking circuit based on the peaking amount detected by the peaking detection part. Particularly, the inductor peaking circuit has inductors and resistors inserted in series between the output part and a power supply, and capacitances coupled in parallel between the output part and an earth (GND), and depending on respective values of these inductors, resistors and capacitances, it is possible to suppress a peaking generated in the output part.

Abstract: An SDI signal discriminating apparatus for discriminating the type of an SDI signal. The SDI signal type discriminating apparatus comprises an HD-SDI type detector which generates an HD lock signal HD_LOCK when it detects a first periodic component included in an HD-SDI signal in the received SDI signal, and an SD-SDI type detector which generates an SD lock signal SD_LOCK when it detects a second periodic component included in an SD-SDI signal in the received SDI signal. The first periodic component differs in period from the second periodic component.

Abstract: A circuit configuration for potential-free signal transmission has a transformer with a primary winding and a secondary winding. A drive circuit is connected upstream of the primary winding and a selection circuit is connected up to the secondary winding and is driven by pulses. A latching circuit is connected downstream of the selection circuit and prevents a forwarding of second pulses under specific conditions. Finally, a storage element generates an output signal.

Abstract: A transformer driver circuit connected to the primary or "system" side of a transformer has a system clock connected to an input thereof the system clock having a frequency selected to constitute the desired clock frequency of a CODEC circuit located on the secondary or "line" side of the transformer. A signal line is connected to a point on the secondary of the transformer so as to tap the system clock frequency, whereby both the system clock and the source voltage for the CODEC are derived from the transformer's secondary.

Abstract: A device for generating a control signal voltage which is dependent on a resistance value of a variable resistor (8) includes a transformer (24) having a first winding (22) which is in series with the variable resistor and a rectifier diode (20). A current generator (32) coupled to a power source is coupled to a second winding (26) of the transformer and supplies it with a periodically interrupted current (I.sub.2). Upon each such interruption an exponentially decreasing current will flow through the first winding and also through the variable resistor (8). The peak value of the voltage drop produced by such current across that resistor is proportional to the resistance value thereof. It is also produced across the first winding (22) and is detected by the peak detector (62). That constitutes the control voltage (U.sub.c). Since the variable resistor is fully electrically isolated from the power source, it can be safely touched without shock hazard.

Abstract: The object of the disclosed system is the fast switching of high voltage and short duration pulses on loads which requires high instantaneous intensities, in order to provide said pulses in both directions; the system is capable in switching narrow hand signals, and therefore long duration signals. The system is based on a very lower series impedance switching channel which is comprised of two high voltage capacitors (C.sub.1) in series with two rectifying groups (GR.sub.1 and GR.sub.2) connected in opposition and whose conduction status is activated by forced injection, through said groups of a direct current controlled by a reactive network in series with a conventional low voltage unidirectional switch (CBT), thereby providing for its logical control (SL) from digital circuits TTL or CMOS.

Abstract: High-efficiency clock generator circuits having single or complementary outputs for driving capacitive loads. The clock generator has therein at least one pair of complementary FET switches, coupled between the output of the generator and power supply rails, and an inductor. The generator is operated at a frequency approximately equal the resonant frequency of the inductor combined with the capacitance of the load. Energy normally stored in the load and dissipated in the FETs as in conventional clock generators is instead stored in the inductor and returned to the loads for reuse.