Distortion Compensation Patents (Class 327/317)
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Patent number: 7208992Abstract: System and method for even order and odd order nonlinear distortion of a compensating signal that removes substantially all of the nonlinear distortion in one order or in two orders. Two or more diodes are arranged in at least one of an anti-series configuration and an anti-parallel configuration in which a circuit voltage is equal to a selected odd order and/or to a selected even order in current, plus higher order terms that are often negligible. The diodes may be replaced by other selected nonlinear devices.Type: GrantFiled: November 8, 2001Date of Patent: April 24, 2007Assignee: C-COR.net CorporationInventors: Somnath Mukherjee, Yahsing Yuan, Mridul K. Pal
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Patent number: 7113606Abstract: There is provided an adjustable harmonic distortion detector that includes a clock signal source, means for the detection of a first period of evaluation, and means for the detection of a second period of evaluation. The detector has the characteristic that a first block memorizes a number equal to the clock pulses present in the first period of evaluation, a multiplier block performs a multiplication between the number stored in the first block and a multiplicative factor during the second period of evaluation, and a second block memorizes the outcome. The second block is adapted to generate an output signal when the outcome in the second block is equal to zero.Type: GrantFiled: August 30, 2001Date of Patent: September 26, 2006Assignee: STMicroelectronics S.r.l.Inventors: Edoardo Botti, Mauro Cleris, Antonio Grosso
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Patent number: 7095264Abstract: A programmable jitter signal generator is provided that includes a jitter distribution control unit, a selection unit in signal communication with the jitter distribution control unit, and a delay unit in signal communication with the selection unit; and a corresponding method of generating a programmable jitter signal includes programming a control unit, receiving a reference signal, delaying the received reference signal by a multiple of a base time increment, and selecting a delayed reference signal delayed by a desired multiple of the base time increment in accordance with the programmed control unit.Type: GrantFiled: December 2, 2003Date of Patent: August 22, 2006Assignee: International Business Machines CorporationInventors: Keith A. Jenkins, Jien-Chung Lo, Peilin Song, Tian Xia
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Patent number: 7092180Abstract: An asymmetry-reducing circuit adapted to process an input signal having positive and negative pulses of different amplitudes and generate a corresponding balanced signal having positive and negative pulses of substantially uniform amplitudes. The asymmetry-reducing circuit balances the input signal by providing signal contributions corresponding to the second and third orders of the input signal. In a representative embodiment, the asymmetry-reducing circuit includes a differential amplifier and a plurality of arrayed MOS transistors connected to its inputs and outputs such that source-to-drain conductance of the transistors provides input and feedback resistances to the amplifier. A switch set selectively couples the fingers (gates) of the transistors to the input signal to modulate the source-to-drain conductance with said signal such that the input and feedback resistances change in a complementary manner.Type: GrantFiled: April 1, 2004Date of Patent: August 15, 2006Assignee: Agere Systems Inc.Inventor: Stephen J. Franck
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Patent number: 7046971Abstract: To down size a distortion-correcting circuit. In the case of a distortion-correcting circuit 1, a basic-wave-amplifying section 10 and a distortion-extracting section 20 have the same circuit configuration. Therefore, the basic-wave-amplifying section 10 and the distortion-extracting section 20 have almost equal input impedance and output impedance and make it possible to distribute and synthesize signal powers without using any power distributor or any power synthesizer. Moreover, because the distortion-correcting circuit 1 is constituted by only a transistor, a resistance, a capacitor, or an inductor, it is easy to downsize the circuit 1 and constitute the circuit 1 into an integrated circuit. Therefore, a characteristic of the basic-wave-amplifying section 10 and that of the distortion-extracting section 20 are further similar to each other and it is possible to more properly distribute or synthesize signal powers without using any power distributor or any power synthesizer.Type: GrantFiled: January 22, 2003Date of Patent: May 16, 2006Assignee: Seiko Epson CorporationInventor: Masayuki Kawakami
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Patent number: 6985020Abstract: An inline predistortion circuit for producing composite second order (CSO) and composite triple beat (CTB) distortion correction of a laser transmitter is disclosed having an RF input signal, a diode for producing nonlinear current, and a DC voltage bias for controlling the nonlinear current. The predistortion circuit lacks DC blocking capacitors between the RF attenuator and the diode, which results in improved nonlinear current generation across a wide frequency range. A capacitor in parallel with the bias circuit further increases diode's capability for producing nonlinear current. A low resistance resistor in series with the RF signal path and in parallel with the diode provides the voltage necessary for the diode to conduct while minimizing RF signal attenuation. An inductor in series with the RF signal provides improved phase correction of the CSO and CTB predistortion circuit.Type: GrantFiled: July 9, 2002Date of Patent: January 10, 2006Assignee: General Instrument CorporationInventor: Shutong Zhou
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Patent number: 6909756Abstract: A transmitter is capable of avoiding increasing of a circuit size and current consumption. The transmitter assembly includes a pre-distortion type linearizer correcting to mutually cancel a distortion component caused in a transmission signal and a correction data component. The transmitter assembly also includes first storage means for preliminarily storing the correction data.Type: GrantFiled: October 12, 2000Date of Patent: June 21, 2005Assignee: NEC CorporationInventor: Toshikazu Nakajima
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Publication number: 20040189839Abstract: The present invention is a black clamp circuit for an electronic imager having black reference pixels. The circuit includes an average value circuit determining an average of a number of the black reference pixels, a correction circuit determining the black level correction from the average, and a modifier circuit modifying image pixels with the black level. The average value is used in a real time feedback loop that removes offset errors in the signal processing chain and establishes a corrected black level in output image data. The feedback can be either digital or analog. The correction circuit can include a comparator that allows a hysteresis in the feedback to avoid hunting as well as multiple levels of feedback based on several thresholds. The corrected black level can also be controlled by a digital transfer function. The black clamp circuit can be used for a series of images, an image frame and an image line.Type: ApplicationFiled: March 27, 2003Publication date: September 30, 2004Applicant: Eastman Kodak CompanyInventor: Bruce C. McDermott
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Patent number: 6759897Abstract: A controllable apparatus for providing a compensated RF signal including an input port for coupling with an RF signal source, such as a multifrequency CATV signal, and an output port for coupling to an associated electronic device. The controllable apparatus generates new second and third order products from the multifrequency RF signal which are the same magnitude, but opposite in phase to the nonlinear products generated by the electronic device. Since both the original multifrequency RF input signal and the new generated products from the distortion control circuit are coupled to the electronic device, the nonlinear products from the distortion control circuit and the electronic device will be canceled and the output of the electronic device will comprise only the multifrequency RF signal. The controllable apparatus includes an RF circuit path and a controllable nonlinear compensator transversely connected to the RF circuit path. A control bias input allows selective control of the nonlinear compensator.Type: GrantFiled: November 25, 2002Date of Patent: July 6, 2004Assignee: General Instrument CorporationInventor: Hartmut Ciemniak
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Patent number: 6670842Abstract: A voltage regulator circuit for providing a regulated output voltage at an output terminal, the regulator circuit including a current source (Icontrol) including a current source MOSFET a current mirror circuit including a driver MOSFET (M1) and a follower MOSFET (M2) interposed between the current source and the output terminal, the current source and current mirror being operatively linked as to regulate an input voltage Vin to the regulated output voltage, wherein the circuit further includes an EMC stabilising MOSFET having its drain connected to its substrate and placed in series with any of the driver or follower MOSFETs.Type: GrantFiled: July 16, 2002Date of Patent: December 30, 2003Assignee: AlcatelInventor: Petr Kamenicky
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Patent number: 6590683Abstract: Systems and methods that increase the data transmission rate through a given length of optical fiber, or increase the distortion-limited distance for an optical fiber link at a given data rate using band efficient modulation. This is achieved by modulating data for transmission onto a carrier signal. The modulated signal is predistorted and an optical carrier is amplitude modulated using the predistorted signal. The amplitude modulated optical carrier is transmitted over the optical fiber link. The original modulated microwave signal is reproduced at a receiver. The original signal is demodulated to generate the originally transmitted data. In addition, to reduce the bandwidth required by the modulated carrier, it may be single-sideband modulated. By increasing the number of bits per symbol and keeping the symbol rate constant, the data rate for a given length of optical fiber may be increased using the present invention without introducing additional distortion in the fiber.Type: GrantFiled: February 4, 1999Date of Patent: July 8, 2003Assignee: Lockheed Martin CorporationInventor: Ralph Spickermann
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Patent number: 6577177Abstract: An in-line distortion generator for coupling in-line with a non-linear device (NLD) produces an output signal of useful amplitude, but with low composite triple beat and cross modulation distortions. The distortion generator comprises an instant controlled non-linear attenuator which utilizes the non-linear current flowing through a pair of diodes to provide the proper amount of signal attenuation over the entire frequency bandwidth. The distortion generator circuitry is always matched to the NLD, thereby ensuring a frequency response that is predictable and predefined. The distortion generator may also include a temperature compensation circuit to ensure consistent operation throughout a wide temperature range.Type: GrantFiled: April 1, 1999Date of Patent: June 10, 2003Assignee: General Instrument CorporationInventors: Shutong Zhou, Timothy J. Brophy, Richard A. Meier
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Patent number: 6570430Abstract: An in-line distortion generator for coupling in-line with a non-linear device (NLD) produces an output signal of useful amplitude, but with low composite second order, composite triple beat and cross modulation distortions. The distortion generator comprises an instant controlled non-linear attenuator which utilizes the non-linear current flowing through a pair of diodes, in parallel with a resistor and an inductor, to provide the proper amount of signal attenuation over the entire frequency bandwidth. The distortion generator circuitry is always matched to the NLD, thereby ensuring a frequency response that is predictable and predefined. The distortion generator may also include a temperature compensation circuit to ensure consistent operation throughout a wide temperature range.Type: GrantFiled: January 29, 2002Date of Patent: May 27, 2003Assignee: General Instrument CorporationInventor: Shutong Zhou
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Patent number: 6566891Abstract: The present invention provides a measurement system and a method of determining characteristics associated with a waveform that compensate for distortion associated therewith. In one embodiment, the measurement system includes a monitoring device that detects distortion in a waveform propagating along the transmission medium. The measurement system further includes a computational subsystem that generates a precompensation signal and precompensation value as a function of the distortion in the waveform. The precompensation value substantially compensates for the distortion when inserted into the waveform as a function of the precompensation signal.Type: GrantFiled: October 6, 2000Date of Patent: May 20, 2003Assignee: Agere Systems Inc.Inventors: Akshay Aggarwal, Kadaba R. Lakshmikumar
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Patent number: 6549055Abstract: Apparatus (1) for generating a control signal for a tunable circuit (3) sensitive to temperature receives an input control signal and predistorts it in a distortion circuit (4), so that the output (5) of the tunable circuit (3) will be substantially corrected for non-linearities in the tunable circuit (3). The distortion circuit (4) includes a linear non-distortion circuit element (9), which may be a linear temperature compensation element, and one or more non-linear distortion circuit elements (12, 13, 14), each of which distort the input control signal according to a different function. The outputs of the distortion circuit elements are passed to variable gain elements (17, 18, 19, 20) to produce weighted components. The weighted linear and non-linear components are then combined in a combination circuit element (8) to provide a predistorted control signal to the tunable circuit (3).Type: GrantFiled: November 21, 2001Date of Patent: April 15, 2003Assignee: C-Mac Quartz Crystals LimitedInventor: George Hedley Storm Rokos
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Patent number: 6518801Abstract: The present invention provides an improved apparatus and technique for removing alias signals from the output of a discretely timed circuit. Rather than simply lowpass filtering an output signal from a discretely timed circuit signal to remove aliases as in conventional discretely timed circuits, and instead of increasing the frequency of the clock signal in other conventional discretely timed circuits, the present invention provides for interpolation between clock edges, taking advantage of information in the digital representation, to reduce or eliminate many lower-order alias signal components. More particularly, the present invention eliminates lower-order aliases of a discretely timed circuit, e.g., of a 1-bit resolution direct digital synthesizer (DDS) by interpolating transitions within clock periods utilizing the period of the signal and its instantaneous phase, to improve the time resolution of the output signal. In a disclosed embodiment, a multiplier produces product of an output signal (e.g.Type: GrantFiled: August 5, 1999Date of Patent: February 11, 2003Assignee: Agere Systems Inc.Inventor: Stephen T. Janesch
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Patent number: 6509789Abstract: A distortion control circuit for selective modulation of an RF signal including an input port for coupling with an RF signal source, such as a multifrequency CATV signal, and an output port for coupling to an associated electronic device. The distortion control circuit generates new second and third order products from the multifrequency RF signal which are the same magnitude, but opposite in phase to the nonlinear products generated by the electronic device. Since both the original multifrequency RF input signal and the new generated products from the distortion control circuit are coupled to the electronic device, the nonlinear products from the distortion control circuit and the electronic device will be canceled and the output of the electronic device will comprise only the multifrequency RF signal. The distortion control circuit includes a nonlinear circuit having a pair of diodes which are selectively biased to create second and third order distortion products for adding to the input signal.Type: GrantFiled: July 17, 2000Date of Patent: January 21, 2003Assignee: General Instrument CorporationInventor: Hartmut Ciemniak
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Publication number: 20020175735Abstract: The present invention provides a technique for selective cancellation of the 2nd-order or 3rd-order nonlinearity of a transistor. Any nonlinearity is a function of the bias voltage of a transistor. In many cases, this function is such that, at a particular bias voltage, nonlinearity is zero. The invention provides a bias circuit that generates the optimum bias voltage for a transistor at which its selected nonlinearity is zero. Mathematically, the nonlinearity can be represented by a sum of multiple components where some components have negative sign. The components are proportional to the DC currents of the transistor at bias voltages differing by a small amount. The bias circuit includes bias transistors that are scaled versions of the main transistor. Each bias transistor generates a DC current representing one of the components. The currents are combined according to the signs of the respective components to form a DC signal proportional to the selected nonlinearity.Type: ApplicationFiled: November 15, 2001Publication date: November 28, 2002Inventor: Vladimir Aparin
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Patent number: 6483354Abstract: Process voltage temperature compensation are used for a bus driver; specifically, a PCI-X 2.0 DDR Standard bus driver. Performance is improved by enhancing the speed of the PCI-X buffer by removing the statically controlled gate stages and providing for output signal slew control by dual use of on-resistance of signal pass transistors. Although directed to PCI-X technology, this circuitry may also be used in SCCI, controlled impedance drivers, and other buffers, where short propagation delay and signal integrity are of concern.Type: GrantFiled: August 24, 2001Date of Patent: November 19, 2002Assignee: LSI Logic CorporationInventor: Frank Gasparik
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Patent number: 6429741Abstract: An amplifier having an input; an output supplying an output signal, and a feedback network connected between the input and the output, and a distortion detection circuit. The feedback network includes a first and a second feedback element arranged in series and forming an intermediate node supplying an intermediate signal in phase with the output signal in absence of distortion, and in phase-opposition with the output signal in presence of distortion. The distortion detection circuit includes a phase-comparating circuit which detects the phase of the output signal and of the intermediate signal, and generates a distortion-indicative signal, when the intermediate signal is in phase opposition with respect to the output signal.Type: GrantFiled: June 12, 2001Date of Patent: August 6, 2002Assignee: STMicroelectronics, S.r.l.Inventors: Davide Brambilla, Daniela Nebuloni, Mauro Cleris
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Patent number: 6407609Abstract: The present invention provides a distortion precompensator and method of compensating for distortion in a transmission medium and a transmitter employing the same. In one embodiment, the distortion precompensator includes a controller, associated with a transmitter, that employs a predetermined precompensation signal. The distortion precompensator also includes an injector that injects a predetermined precompensation value as a function of the precompensation signal into a waveform propagating along the transmission medium thereby substantially compensating for distortion associated therewith.Type: GrantFiled: October 6, 2000Date of Patent: June 18, 2002Assignee: Agere Systems Guardian Corp.Inventors: Akshay Aggarwal, Kadaba R. Lakshmikumar
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Patent number: 6404257Abstract: A circuit and method for decreasing the amount of jitter present at the receiver input of high speed data links which uses a driver circuit for input from a high speed data link which comprises a logic circuit having a first section (1) which provides data latches, a second section (2) which provides a circuit generates a pre-destorted output and for compensating for level dependent jitter having an OR function element and a NOR function element each of which is coupled to two inputs and to a variable delay element as an input which provides a bi-modal delay for pulse width pre-distortion, a third section (3) which provides a muxing circuit, and a forth section (4) for clock distribution in the driver circuit. A fifth section is used for logic testing the driver circuit.Type: GrantFiled: May 30, 2000Date of Patent: June 11, 2002Assignee: International Business Machines CorporationInventor: Robert R. Livolsi
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Patent number: 6396327Abstract: A predistortion circuit (102) includes a signal splitter (114), a diode network (118) and a signal combiner (116). The signal splitter (114) is splits an input signal into two portions. One of the signal portions is passed through the diode network (118) and combined with the other portion of the input signal in the signal combiner (116). The diode network (118) includes a plurality of diode circuits (204,206), each including two diode branches (208-214) coupled to an electrical ground (220). The resulting predistorted signal at the output (106) of the signal combiner is amplified, amplitude adjusted and injected into the nonlinear device (112). The input signal is predistorted such that distortion due to nonlinear characteristics of the nonlinear device (112) is reduced.Type: GrantFiled: September 1, 1998Date of Patent: May 28, 2002Assignee: Tacan CorporationInventor: Daniel H. Lam
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Publication number: 20020060597Abstract: Apparatus (1) for generating a control signal for a tunable circuit (3) sensitive to temperature receives an input control signal and predistorts it in a distortion circuit (4), so that the output (5) of the tunable circuit (3) will be substantially corrected for non-linearities in the tunable circuit (3). The distortion circuit (4) includes a linear non-distortion circuit element (9), which may be a linear temperature compensation element, and one or more non-linear distortion circuit elements (12, 13, 14), each of which distort the input control signal according to a different function. The outputs of the distortion circuit elements are passed to variable gain elements (17, 18, 19, 20) to produce weighted components. The weighted linear and non-linear components are then combined in a combination circuit element (8) to provide a predistorted control signal to the tunable circuit (3).Type: ApplicationFiled: November 21, 2001Publication date: May 23, 2002Inventor: George Hedley Storm Rokos
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Patent number: 6392464Abstract: Wide bandwidth compensating circuits are disclosed for compensating for the nonlinearity of other circuits placed in cascade therewith over a relatively wide bandwidth, particularly for high linearity optical modulators, in which first and second versions of a signal are generated having different gains and different nonlinear distortions. The first signal has a higher gain with a lower distortion. The second signal has a lower gain with a higher distortion, and is subtracted from the first larger amplitude signal to form an output signal having a desired nonlinear transfer characteristic over a relatively wide frequency range. A first exemplary circuit has a first higher gain path and a second lower gain path having a transfer characteristic with a substantially greater amount of negative cubic distortion. The first and second signals are subtracted in a wide band differential amplifier to form a resultant signal having a desired positive cubic distortion.Type: GrantFiled: September 14, 1999Date of Patent: May 21, 2002Assignee: Lockheed Martin CorporationInventor: Jerome J. Tiemann
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Patent number: 6388496Abstract: The present invention relates to a semiconductor output circuit that protects a circuit including such a reverse operation as reverses the potentials of a collector and an emitter of a bipolar transistor. A cathode of a protective diode is connected to a P type side of a base-emitter PN junction of a bipolar transistor constituting a semiconductor output circuit, while an anode of the protective diode is connected to an N type side of the base-emitter PN junction. By positively operating the bipolar transistor in a reverse direction with a reverse current gain &bgr;R>1, a reverse voltage between a collector and an emitter of the bipolar transistor is precluded from exceeding Veco to prevent the transistor from being broken down due to its reverse operation.Type: GrantFiled: April 14, 2000Date of Patent: May 14, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hiroyuki Tsurumi, Toshiro Kubota
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Patent number: 6360180Abstract: A driver for applying a deterministic waveform along a lossy transmission path to a device-under-test is disclosed. The driver includes a signal generator for producing a substantially square-wave signal at an output node and an injector coupled to the output node for modifying the square-wave signal to pre-compensate for expected losses along the lossy path.Type: GrantFiled: May 10, 1999Date of Patent: March 19, 2002Assignee: Teradyne, Inc.Inventor: Peter Breger
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Publication number: 20010054927Abstract: An in-line distortion generator for coupling in-line with a non-linear device (NLD) produces an output signal of useful amplitude, but with low composite triple beat and cross modulation distortions. The distortion generator comprises an instant controlled non-linear attenuator which utilizes the non-linear current flowing through a pair of diodes to provide the proper amount of signal attenuation over the entire frequency bandwidth. The distortion generator circuitry is always matched to the NLD, thereby ensuring a frequency response that is predictable and predefined. The distortion generator may also include a temperature compensation circuit to ensure consistent operation throughout a wide temperature range.Type: ApplicationFiled: April 1, 1999Publication date: December 27, 2001Inventors: SHUTONG ZHOU, TIMOTHY J. BROPHY, RICHARD MEIER
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Patent number: 6316983Abstract: An input signal is phase-inverted to supply the inverted signal to a gate of an FET. When the gate-source voltage Vgs decreases, the differential resistance Rds of the FET increases. Moreover, the differential resistance Rds also increases when the drain-source voltage Vds increases. That is, if the magnitude of the input signal from the signal source (2) increases, the gate-source voltage Vgs decreases and the drain-source voltage Vds increases, so that the differential resistance Rds varies largely. This compensates the non-linearity of the following saturation amplifier. Phase compensation is also effected with a capacitor (stray capacitor) or an inductor connected in parallel to the FET in corporation of the phase inverter. The phase inverter may be structured using the stray capacitances of the FET.Type: GrantFiled: December 1, 2000Date of Patent: November 13, 2001Assignee: YRP Advanced Mobile Communication Systems Research Laboratories Co., Ltd.Inventor: Keiichi Kitamura
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Patent number: 6313687Abstract: A variable impedance circuit for use with a load, such as an IC-based active filter circuit, formed on a semiconductor substrate. The variable impedance circuit includes at least one non-linear element, such as a MOSFET. The variable impedance circuit also includes a means for suppressing at least a second order harmonic distortion term from the non-linear element.Type: GrantFiled: September 29, 2000Date of Patent: November 6, 2001Assignee: Agere Systems Guardian Corp.Inventor: Mihai Banu
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Patent number: 6292014Abstract: The present invention relates to an output buffer circuit for transmitting digital signals over a transmission line with pre-emphase. It comprises an output stage and a control circuit. The output stage includes a first impedance circuit connected between an upper power supply potential and an output node. It furthermore includes a second impedance circuit connected between the output node and a power supply node at a lower supply potential. Both impedance circuits receive impedance control signals from the control circuit such that an impedance ratio between the first impedance and the second impedance takes one of at least three different predetermined values in accordance with the present state and the history of a digital data input signal, and such that the sum of the conductance provided by the first impedance circuit and the conductance provided by the second impedance circuit is independent from the generated impedance ratios.Type: GrantFiled: June 3, 1999Date of Patent: September 18, 2001Assignee: Telefonaktiebolaget LM EricssonInventor: Mats Hedberg
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Patent number: 6278313Abstract: A semiconductor circuit includes an amplifying circuit and compensates the distortion characteristic in the event of changes in the ambient temperature. If the amplifying circuit is a field effect transistor (FET) amplifying circuit having a grounded source, a compensating circuit in which a thermistor having a negative temperature characteristic and a thermistor having a positive temperature characteristic are connected in a series is provided between the grounding point and the source of the FET to compensate distortion of signals outputted from the FET that is caused by the ambient temperature. The temperature at which distortion is considered a minimum is taken as the reference temperature, and the drain current that flows at this reference temperature is made a minimum such that the drain current increases as the ambient temperature deviates from the reference temperature, thereby suppressing or preventing increase in distortion in the event of changes in the ambient temperature.Type: GrantFiled: June 12, 2000Date of Patent: August 21, 2001Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6204718Abstract: An embodiment includes an input node, a shunt impedance electrically connected to the input node, and at least one shunt diode connected in series with the shunt impedance. The input node receives an electrical signal from a signal generator. A bias current is applied to the shunt diode from a bias supply. In response, the shunt diode generates second-order distortion and substantially no third-order distortion. The level of bias current is adjusted to substantially eliminate any third-order distortion while the shunt impedance is adjusted so that the appropriate amount of second-order distortion is generated as predistortion. The predistortion is then provided to a nonlinear device, such as a laser, where it operates to substantially cancel inherent distortion generated by the nonlinear device.Type: GrantFiled: June 25, 1999Date of Patent: March 20, 2001Assignee: Scientific-Atlanta, Inc.Inventor: Rezin E. Pidgeon, Jr.
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Patent number: 6194942Abstract: A predistortion circuit includes a first splitter for splitting an input signal into primary and secondary electrical paths, a first combiner for combining a main signal on the primary electrical path and a predistorted signal on the second electrical path into a single signal for modulating a nonlinear device with predictable distortion characteristics, a distortion signal generator for receiving a branch signal from the first splitter and for producing first and second intermodulation products, a second splitter for receiving the first intermodulation products and for outputting two sets of the first intermodulation products, a third splitter for receiving the second intermodulation products and for outputting two sets of the second intermodulation products, an even-order signal processing unit for processing one set of the first intermodulation products and one set of the second intermodulation products to generate even-order intermodulation products, an odd-order signal processing unit for processing theType: GrantFiled: January 19, 2000Date of Patent: February 27, 2001Assignee: Cable Vision Electronics Co., Ltd.Inventors: Ben-Mou Yu, Fu-Chin Shen
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Patent number: 6144706Abstract: To obtain a uniform improving effect of secondary distortion over a wide frequency band with a very simple configuration and less power consumption in the distortion compensation circuit, that improves the secondary distortion circuit of an optical transmitter and a high-frequency amplifier used for a transmission line processing a high-frequency signal over a wide frequency band, such as a cable television(CATV).Type: GrantFiled: October 16, 1998Date of Patent: November 7, 2000Assignee: Yagi Antenna Co., Ltd.Inventors: Yuzo Sato, Yasushi Saito, Hiroki Nishizono
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Patent number: 6140858Abstract: The invention relates to a predistortion circuit for an analog signal in a video communication network. In one embodiment the circuit according to the invention includes a primary branch connecting an input to an output, a delay circuit for delaying a signal in the primary branch, a first coupler/shunting device which samples a fraction of the input signal, a secondary branch connected to the shunting output of the coupler/shunting device, the secondary branch including a second-harmonic generator, and a second coupler/shunting device which receives the output signal from the secondary branch and adds it to the signal at the output of the primary branch. The circuit according to the invention makes possible a symmetrical filter with improved performance characteristics and low manufacturing cost.Type: GrantFiled: November 18, 1997Date of Patent: October 31, 2000Assignee: U.S. Philips CorporationInventor: Fran.cedilla.ois Dumont
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Patent number: 6118322Abstract: An apparatus (100) includes a differential processing circuit (135) responsive to an input signal with first and second signal components, and a signal imbalance suppressor (130) that preprocesses the input signal, prior to input to the differential processing circuit, to remove amplitude and/or phase imbalances that exist between the first and second signal components, in order to reduce even order distortion generation within the differential processing circuit.Type: GrantFiled: November 3, 1998Date of Patent: September 12, 2000Assignee: Motorola, Inc.Inventors: David E. Bockelman, Robert E. Stengel
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Patent number: 6061161Abstract: A distortion-compensation circuit for use on a wideband optical-fiber communication system is provided. This distortion-compensation circuit can compensate for the CSO/CTB (composite second order and composite third beat) distortions in the transmitted signals that are caused due to the intermodulation of undesired harmonics that are caused by nonlinear devices in the system. The distortion-compensation circuit includes splitting means, such as a directional coupler, for splitting the input signal into a first signal and a second signal. The first signal is directed to a first path, while the second signal is directed to a second path. A featured CSO/CTB generator is coupled on the second path to receive the second signal for selectively generating a compensating CSO/CTB output from the second signal. Further, combining means, such as another directional coupler, is arranged at the end of the first and second paths, for combining the compensating CSO/CTB output of the CSO/CTB generator with the first signal.Type: GrantFiled: September 30, 1997Date of Patent: May 9, 2000Assignee: New Elite technologies, Inc.Inventors: Chien-Rong Yang, Ren-Yuh Liang
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Patent number: 6038261Abstract: The present invention relates to a method for setup of a signal in multicarrier modulation, including clipping the signal, in amplitude, with respect to a threshold value, and of reinjecting, with a delay and on the signal to be set up, a clipping noise redistributed, at least partly, outside the useful slip of the signal in multicarrier modulation.Type: GrantFiled: December 31, 1997Date of Patent: March 14, 2000Assignee: SGS-Thomson Microelectronics S.A.Inventor: Denis J. G. Mestdagh
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Patent number: 5995313Abstract: An apparatus and method for suppressing the effects of thermal asperities in readback signals of a hard disc drive are disclosed. A suppression circuit is provided having a clamping path that establishes an electrical short between a readback signal path transmitting the readback signal and a reference line for the readback signal in order to remove substantially all of the energy associated with the thermal asperity from the readback signal. The suppression circuit further includes a compensation path operably coupled between the readback signal path and the reference line to subsequently provide baseline compensation for the readback signal by introducing a non-zero impedance between the readback signal path and the reference line.Type: GrantFiled: August 29, 1997Date of Patent: November 30, 1999Assignee: Seagate Technology, Inc.Inventor: Housan Dakroub
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Patent number: 5973540Abstract: A structure and a method are provided to receive a high-impedance reference voltage signal and generate a desired output signal that is capable of sourcing enough current to meet the demands of a fixed-resistance load. In such a circuit, the signal from an accurate, wide output-swing voltage source circuit having low quiescent current is combined with the output of a current source circuit so that the voltage input to the load is maintained even as the necessary current is supplied. The current source circuit preferably includes a tracking resistance that sinks a control current which a current mirror multiplies by the same ratio as that between the tracking resistance and the load resistance.Type: GrantFiled: January 23, 1998Date of Patent: October 26, 1999Assignee: National Semiconductor CorporationInventor: David M. Boisvert
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Patent number: 5939920Abstract: An apparatus and method for providing distortion to an input signal. A first alternating current component is separated from the input signal, to provide a first signal representing the first alternating current component and a second signal representing the input signal having the first alternating current component separated therefrom. The signal level of the first and second signals is adjusted. Nonlinear distortion is provided to the signal level adjusted first signal, to produce a distorted first signal. The signal level adjusted second signal is combined with the distorted first signal, to produce a corresponding output signal.Type: GrantFiled: October 30, 1996Date of Patent: August 17, 1999Assignee: Fujitsu LimitedInventor: Maki Hiraizumi
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Patent number: 5869993Abstract: The odd harmonic distortion components in the output signal of a capacitively loaded follower transistor is reduced by means of an additional transistor inserted between the emitter of the follower transistor and the bias current source of the follower transistor. A second follower transistor receives the same input signal as the follower transistor and has its emitter coupled to the emitter of the additional transistor via a compensation capacitor. The current through the compensation capacitor is added to the output current and compensates for the odd harmonic distortion.Type: GrantFiled: January 30, 1997Date of Patent: February 9, 1999Assignee: U.S. Philips CorporationInventor: Pieter Vorenkamp
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Patent number: 5847624Abstract: A discrete increment attenuator for processing an input signal by effecting discrete attenuation increments of the input signal to create corresponding attenuation states for the output signal resulting from the input signal, comprising a parallel branched attenuator network providing at least three attenuation states defining corresponding attenuation increments, coupled to receive the input signal and provide the output signal. A separate attenuation branch circuit having an input end and an output end corresponding to a particular plural parallel branch is selectively activated by an attenuation control signal for effecting a discrete incremental attenuation of the input signal.Type: GrantFiled: February 7, 1992Date of Patent: December 8, 1998Assignee: Texas Instruments IncorporatedInventor: Samuel Dale Pritchett
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Patent number: 5841308Abstract: A reference potential difference canceling circuit is provided in a circuit system of a transmitter side to remove noise caused by impedance Z between circuit systems having different reference potentials from a signal, and to transmit the signal. The reference potential of the circuit system of a receiver side is supplied to an input terminal of the reference potential difference canceling circuit, and its output terminal is connected to an input terminal of an output amplifier to which a transmitting signal is input. A gain of the reference potential difference canceling circuit is set to a reciprocal number of a gain of the output amplifier.Type: GrantFiled: April 29, 1997Date of Patent: November 24, 1998Assignee: Kabushiki Kaisha ToshibaInventor: Mitsuru Nagata
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Patent number: 5798665Abstract: A bias current controlling circuit minimizes the power consumption of a high-frequency power amplifier incorporated in a battery powered portable telephone by controlling a bias current supplied to the high-frequency power amplifier in such a manner that an output signal of the high-frequency power amplifier increases the distortion as large in an allowable range as possible, because the bias current is inversely proportional to the magnitude of the distortion.Type: GrantFiled: October 24, 1996Date of Patent: August 25, 1998Assignee: NEC CorporationInventor: Masaki Ichihara
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Patent number: 5780942Abstract: The disclosed input circuit incorporated in semiconductor integrated circuit device will not be operated erroneously due to fluctuations of a supply (or reference) potential caused by noise, for instance.Type: GrantFiled: April 25, 1996Date of Patent: July 14, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Takao Nakajima, Kenichi Nakamura
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Patent number: 5767722Abstract: An electronic circuit having a circuit stage, such as a switched capacitor stage or a 1-bit digital-to-analog converter and switched capacitor filter, that is loaded with a load impedance employs current feedforward to substantially cancel effects of the load impedance. A circuit includes a circuit stage and a load impedance following and connected to the circuit stage. A current feedforward circuit is connected to the load impedance, substantially cancelling the load impedance to improve linearity of the digital-to-analog converter or switched capacitor filter.Type: GrantFiled: April 2, 1996Date of Patent: June 16, 1998Assignee: Crystal SemiconductorInventors: Dan B. Kasha, Navdeep S. Sooch
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Patent number: 5767731Abstract: A protection circuit for preventing momentary activation of the output of an output-isolated driver during power turn on. The protection circuit operates in a manner which prevents a buffer which is driven by the opto-isolator from turning on power transistors during power turn on, particularly in applications such as switching power supplies, motor controllers and the like.Type: GrantFiled: December 9, 1996Date of Patent: June 16, 1998Assignee: International Rectifier CorporationInventors: Vijay Mangtani, Ajit Dubhashi
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Patent number: 5744993Abstract: Briefly, in accordance with one embodiment of the invention, a device for use in a magnetic recording read channel adapted to be coupled to a magneto-resistive (MR) read head comprises: an integrated circuit adapted so as to introduce a controllable amount of second-order nonlinearity into the magnetic recording read channel signal path to at least partially offset nonlinearity associated with use of the MR read head. Briefly, in accordance with another embodiment of the invention, a method of reducing nonlinear signal effects in a magnetic recording read channel signal path associated with use of a magneto-resistive (MR) read head comprises the step of: introducing into the read channel signal path a scalable square of the read channel signal.Type: GrantFiled: September 27, 1995Date of Patent: April 28, 1998Assignee: Lucent Technologies, Inc.Inventor: Jeffrey Lee Sonntag