Abstract: An embodiment of a thermal estimation device including a temperature model generator, a temperature gradient calculator, and a thermal sensing analyzer is disclosed. The temperature model generator generates a temperature model based on an initial power consumption, an initial area and an initial coordination of a circuit module. The temperature gradient calculator substitutes at least one of a testing area, a testing power or a testing coordinate of the circuit module into the temperature model for correspondingly estimating an temperature estimation function. The thermal sensing analyzer differentiates the temperature estimation function. When an absolute value of a differential result of the temperature estimation function resulted from a constant is closest to zero or is zero, outputting the constant as an optimized parameter.

Abstract: A device and a method for selectively hiding bus oscillations upon data reception via a bus system. The device encompasses a monitoring element for monitoring a difference of the bus signal on a bus line of the bus system, and a masking element for masking oscillations of the bus signal for a predetermined masking time if the monitoring result of the monitoring element indicates that oscillations of the bus signal following a transition of the bus signal from a dominant to a recessive state exceed at least one predetermined threshold value.

Abstract: One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.

Abstract: Various embodiments are described that relate to a proportional-integral-derivative controller. The proportional-integral-derivative controller obtains an input voltage and from the input voltage produces an output voltage. Achievement of a particular output voltage can be accomplished through variable resistances in the proportional-integral-derivative controller. To realize these variable resistances, a switching capacitor set can be employed. The switching capacitor set can include individual capacitors with switches. The switches can function with a switching frequency. The switching frequency causes individual capacitors to function with an effective resistance. The resistance can directly correspond to the switching frequency. To change the resistance, the switching frequency can be changed.

Abstract: One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.

Abstract: One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.

Abstract: A method and apparatus for encoding a sequence of images by predicting at least one current image by forward motion compensation from at least one reference image. Prediction implements, for at least one current block of the current image: forward projection of a block of the reference image on the current image, delivering a projected block at least partially overlapping the current block; partitioning the current block delivering a sub-block at least partially overlapped by at least one projected block; and at least one iteration of the following steps for at least one overlapped sub-block: checking that the overlapped sub-block complies with a predetermined allotting criterion; with a positive check, allotting, to the overlapped sub-block, one of the projected motion vectors; and with a negative check, and so long as a predetermined minimum size is not reached for the overlapped sub-block: partitioning of the overlapped sub-block.

Abstract: A device may detect the zero-cross event of a BEMF of an electric motor with first, second, and third phase windings driven by respective first, second, and third power driving stages. The device may include a control circuit configured to place at an impedance state the third power driving stage relative to the third phase winding, the third phase winding being coupled to a zero-cross detecting circuit, introduce a masking signal to mask an output signal of the zero-cross detecting circuit in correspondence with each rising edge of a first driving signal of the first power driving stage relative to the first phase winding, and determine whether a first duty-cycle of the first driving signal is such that a duration of a masking window of the masking signal is greater than an on-time period of the first driving signal.

Abstract: The sensing apparatus includes a sensor and a sampling amplifier. The sensor includes switches, capacitors and gain amplifiers. Second terminals of first and second switches respectively coupled to first and second terminals of third switch. First and second terminals of the first capacitor respectively coupled to a reference voltage and the second terminal of the first switch. Input terminals of the first and the second gain amplifiers respectively coupled to the second terminals of the first and the second switches, and output terminals of the first and the second gain amplifiers respectively coupled to the first and the second input terminals of the sampling amplifier. The first terminal of the second switch coupled to a common mode voltage. The first terminal of the first switch coupled to the pixel circuit via the data line of the display panel.

Abstract: A serial data transmission system, includes a transmitting terminal for transmitting a data, a receiving terminal for receiving the data transmitted by the transmitting terminal, a first connecting capacitor connected between the transmitting terminal and the receiving terminal, and a second connecting capacitor connected between the transmitting terminal and the receiving terminal, wherein the transmitting terminal comprises a transmitting terminal driver unit and an amplitude detection unit connected with the transmitting terminal driver unit, the transmitting terminal driver unit outputs a pair of differential signals, the amplitude detection unit detects an amplitude variation of the differential signals output by the transmitting terminal driver unit, and outputs an indication signal indicating whether the transmitting terminal and the receiving terminal are properly connected with each other. A serial data transmission method is further provided.

Abstract: A filter network having a variable cut-off frequency can be controlled in a way that allows the cut-off frequency to be changed gradually to avoid undesirable transient effects. An impedance network (such as a resistor network) that provides a plurality of impedance values is provided. Logic, and a corresponding method, are provided to change the impedance value gradually, such as on a step-wise basis, to change the cut-off frequency gradually. The size of the impedance step and the duration of the step can be preprogrammed, and may be different for different types of events that trigger the need for a frequency change. It may also be possible for those preprogrammed values to be initial values only, with the values changing under programmed control during the frequency changing process. Other values, such as the initial and target impedance values that determine the initial and target frequency, also may be programmable.

Abstract: A voltage generators is provided including a boosting circuit and a boosting control circuit. The boosting circuit is configured to boost a power voltage to generate first through fourth voltages. The boosting control circuit is configured to control the boosting circuit to enable the first through fourth voltages to be generated in sequence, such that when a current voltage of the first through fourth voltages is boosted to a predetermined level, a voltage next to the current voltage is generated. Related liquid crystal displays and methods are also provided.

Abstract: A method, an apparatus and/or a system of complementary differential input based mixer circuit is disclosed. In one aspect, the method includes inputting a single ended signal to a mixer circuit comprising a differential input circuit through a complementary differential transistor pair of the differential input circuit of the mixer circuit. The method also includes converting the signal ended signal to a differential signal through the complementary differential transistor pair of the differential input circuit to drive the mixer circuit.

Abstract: In hard disc drive (HDD) applications, there is often a need for input buffers that can operate at a variety of voltages (i.e., 1.8V, 2.5V, and 3.3V) as well as tolerate high voltages (i.e., 5V). Traditional buffers, however, usually lack the ability to operate at these varying voltages and lack the ability to tolerate high voltages. Here, a buffer is provided that fits this criteria through the use of a switching circuit and an anti-saturation circuit (as well as other circuitry).

Abstract: A multiplexer is provided. The multiplexer includes an output coupled to a complementary driving unit and a plurality of switch circuits. Each switch circuit includes a channel unit and two switches. The two switches respectively conduct two input signals to a channel end of the channel unit during different switch conduction periods, and the channel unit conducts the channel end to an output end during a channel conduction period. The switch conduction period of the first switch in the first switch circuit equals the switch conduction period of the second switch circuit, the switch conduction period of the second switch in the second switch circuit equals the switch conduction period of the first switch circuit, and the first and second switches are coupled to the same input signal.

Abstract: An apparatus for generating a monocycle comprises an input signal source (76) for providing an input signal, and a step recovery diode (SRD) (80) for receiving the input signal and producing an impulse. A shunt inductor (102) is provided to act as a first differentiator and a capacitor (92) connected in series to the output of the step recovery diode acts as a second differentiator. The first and second differentiators are arranged to double differentiate the impulse to produce a monocycle.

Abstract: Data transmitter embodiments are provided which are particularly useful as interface devices for accurate and reliable transmittal of data from high-speed data system devices such as analog-to-digital converters. Transmitter embodiments have been found to provide excellent fidelity of data transfer at high data rates (e.g., 4 gigabits/second) while consuming only a portion of the power of many conventional transmitters and requiring only a portion of the layout area of these transmitters. Transmitter embodiments provide effective control of transmitter parameters such as matched impedances, data symmetry, common-mode level, data eye and current drain.

Abstract: The present invention is related to a circuit (1) for detecting activity in a burst-mode receiver. The circuit is arranged for receiving an input signal (2) comprising a preamble. The circuit comprises a differentiator (11) for detecting signal transitions in the input signal (2) whereby the preamble comprises information on operating said differentiator (11). In a preferred embodiment, the information is a time constant. The circuit further comprises an integrator (12) arranged for being fed with an output of the differentiator. The resulting signal is compared to a reference (16). If this reference is crossed, activity is detected. In an embodiment a front-end circuit is presented comprising next to a circuit for detecting activity, a reset circuit arranged for resetting the front-end circuit and a clock phase alignment circuit arranged for recovering the phase.

Abstract: It is possible to provide a voltage-current converter which can realize a variable filter having a steep cut-off characteristic with a small area. The voltage-current converter includes: one or more sampling/holding units for sampling an inputted voltage and holding the sampled voltage; one or more separate voltage-current conversion units for outputting a current corresponding to the voltage held by the sampling/holding units; and a control unit for controlling the timing of the sampling and holding of the inputted voltage by the sampling/holding units.

Abstract: A fail-safe differential receiver having a differential amplifier adapted to receive first and second differential input signals and generate a differential voltage. A peak detector is coupled to the differential amplifier for generating a detect signal and a comparator is coupled to the peak detector for comparing the detect signal to a threshold voltage and providing a comparison signal. A directing circuit is coupled to the differential amplifier for receiving the first and second differential input signals and is coupled to the comparator for receiving the comparison signal. An output amplifier is coupled to the directing circuit. The directing circuit selectively directs the first and second differential input signals to the output amplifier as a function of the value of the comparison signal from the comparator.

Abstract: An image sensor has a per-column ADC arrangement including first and second capacitors allowing a comparator circuit to perform correlated double sampling. The capacitors are continuously connected to, respectively, the analog pixel signal and a ramp signal without use of a hold operation. The comparator circuit comprises a differential input being connected to the junction of the two capacitors and being biased by a reference signal. The reference signal is preferably sampled and held from a reference voltage. The use of a differential input as first stage of the comparator addresses problems arising from ground voltage bounce when a large pixel array images a scene with low contrast. Connectivity of the differential input stage allows the ramp signal to see a constant capacitive load thus reduce image artifacts referred to as smear.

Abstract: In a driver circuit 10 for outputting a simulated signal simulating an input signal subjected to transmission loss, corresponding to the input signal, the driver circuit 10 comprises: a main driver 18 which receives the input signal and outputs an output signal corresponding to the input signal; a sub driver 20 which receives the input signal and outputs an output signal given by inverting the input signal; a high frequency emphasizing circuit 22 which receives the input signal of the sub driver 20 and outputs an output signal having the high frequency of the input signal of the sub driver 20 emphasized; and an addition unit 24 which outputs the simulated signal given by adding the output signal of the main driver 18 and the output signal of the high frequency emphasizing circuit 22.

Abstract: There is provided a reference voltage generating circuit including: a first PN junction element (PN1) whose forward voltage is a first voltage V1; a second PN junction element (PN2) having a current density different from the first PN junction element and whose forward voltage is a second voltage V2 higher than the first voltage V1; and generating circuits (101 to 103) inputting the first voltage V1 and the second voltage V2 and generating a reference voltage expressed by A2×V2+A3×(A2×V2?A1×V1) in which A1, A2, and A3 are set to be coefficients, and in which A1 and A2 are different values.

Abstract: The invention relates to a device for determining the temporal position of an analogue trigger signal with relation to an analogue clock signal, comprising an analogue cross-correlator (30), which carries out an analogue cross-correlation between the trigger signal and clock signal to provide a fine resolution.

Abstract: Methods and systems to controllably steer multiple phases of a differential signal, including to generate a differential current in response to a differential voltage, to controllably steer the differential current between multiple output circuits in response to corresponding control signals, which may be out of phase with respect to one another, and to generate multiple corresponding outputs corresponding to the multiple steered phases of the current. A differential input circuit and a current steering circuit may be common to multiple output circuits, and a common offset compensation may be provided to compensate for a substantial portion of offset associated with the multiple outputs.

Abstract: The derivative of a noise-containing input signal is determined by using an aliased derivative to periodically reset a filtered version of a normally determined derivative. The aliased derivative is calculated using a slower update or sampling rate than the normally determined derivative, and the filtered version of the normally determined derivative is reset to a reset value at each update of the aliased derivative. The reset value is based on a weighted sum of the aliased derivative and the filter output. The periodically reset filter output closely follows an idealized derivative of the input signal, substantially eliminating the phase delay introduced by conventional filtering.

Abstract: A method and apparatus to equalize currents on a matching pair of FETs having sources connected together on a silicon on insulator semiconductor chip, or other chip wherein FET bodies can be individually biased. During a determination period, functional inputs coupled to the gates of the matching pair of FETs are short circuited, and a DAC adjusts a first body voltage of a first FET in the matching pair of FETs relative to a second body voltage of a second FET in the matching pair of FETs until a currents in the first FET and the second FET are equal, within resolution of the DAC's voltage granularity. A proper DAC control value is stored and applied to the DAC following the determination period when the short circuit is removed from the functional inputs.

Abstract: The invention provides a universal rate-based transducer for advancing diagnostic and predictive analyses of low frequency physical phenomena, such as associated with heat and mass transfer, solid and fluid mechanics, pressure and seismic analysis. In many applications, such as in the fire metrology, aerospace, security and defense sectors, rate information is crucial for reaching fast and reliable diagnosis and prediction. In one preferred embodiment, the invention comprises a universal voltage rate sensor interface that accurately recovers the instantaneous heating/cooling rate, dT/dt. Upon appropriate calibration, this sensor interface allows real-time extraction of rates associated with many physical quantities of interest (e.g., temperature, heat flux, concentration, strain, stress, pressure, intensity, etc.).

Abstract: In a differential output circuit, a second amplifier has a positive terminal connected to a second fixed potential and a negative terminal to a fifth switch at a first terminal. First and second switches are connected at a point connected to the fifth switch at a second terminal and to a first load. Third and fourth switches are connected at a point connected to the fifth switch at a third terminal and to a second load. The second terminal is connected to the first terminal when the second and third switches turn on. The third terminal is connected to the first terminal when the first and fourth switches turn on.

Abstract: A sensor arrangement comprises a sensor responsive to a measurement parameter as a sensor signal and a signal processing means for the sensor signal, said means having a switching stage for comparison of the sensor signal with a comparison or switching value and for producing a switching signal in a manner dependent on the comparison. A functional stage is present, which constitutes one function of the sensor signal, is comprised in the signal processing means, such function including a time derivative of the sensor signal or a sensor signal value modified by an additive factor, and the output signal of the functional stage forming the comparison of switching value for the switching stage. As a result simply processed binary signals are produced which may comprise not only functions in a manner dependent on the sensor signal but also functions derived therefrom and additional parameters.

Abstract: A method for detecting a null current condition in a PWM driven inductor connected between a voltage source node and a second circuit node of a line for outputting current to a load includes generating a derivative signal by time differentiating a voltage on the second node. The method further includes monitoring an instant when the derivative signal becomes negative, and signaling verification of the null current condition each time the derivative signal becomes negative.

Abstract: A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a current source, which can be adjusted to change the transconductance of the amplifier. The circuit can be provided with a quadri-tall cell or level shifter in order to provide this operation. With these operational characteristics, the MOS differential pair of this type can be used in a voltage adder/subtractor circuit.

Abstract: An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as an inductor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.

Abstract: The opamp with a slew rate booster includes a first high side transistor 23 coupled to a first differential output node OUT−; a second high side transistor 26 coupled to a second differential output node OUT+; a first booster circuit 72 coupled to the control node of the first high side transistor 23; a second booster circuit 70 coupled to the control node of the second high side transistor 26. The opamp exploits the gate control available on the high side transistors 23 and 26. During the charge-discharge differential transient of the load capacitances 58 and 60, the circuit increases the current given by the high side transistor 23 or 26 that is pulling up its output OUT− or OUT+, and reduces by the same amount the current provided at the other output OUT+ or OUT− that is being pulled down by a low side driver 43 or 40. The gate control is accomplished through a simple, symmetrical capacitor-resistor network that implements a basic differentiator.

Abstract: A voltage-controlled current source provides operation as either a differential current source for a floating load, or operation as a grounded current source when one end of the load is grounded. Switching between operation as a differential current source and operation as a grounded current source is automatic, and will accommodate significant lead resistance between the source and the load. Additionally, in absence of a grounded load the circuit can provide active common mode reduction using active feedback to reduce common mode voltage on the load.

Abstract: The input buffer circuit includes an input stage providing a switching point voltage based on a predetermined switching point set between a first and second reference voltages that maximizes the high and low noise margins of the input buffer. The input buffer circuit further includes an output stage. The output stage is coupled to the input stage. The output stage receives the switching point voltage from the input stage and amplifies the switching point voltage to a full logic level voltage.

Abstract: A variable capacitance circuit enables electrostatic capacity to be adjusted as a trimmer capacitor, and that enables a temperature characteristic to be set variably. An input voltage is made to lead by a phase angle of 90° due to a differentiating circuit, before being amplified by an in phase amplifier, thus a current with phase angle of 90° shifted is obtained in such a manner as to take out the output while passing through a resistor. Gain and/or an output resistance of the amplifier are made to set variable. If a thermistor is combined with the circuit as a resistance of the differentiating circuit, temperature coefficient can be made to set variable.

Abstract: An input circuit for, for example, an A/D converter mainly determines the performance of the circuit preceded by the input circuit (A/D converter). To improve the performance of the input circuit and to overcome the problem of high-power dissipation at the same time, the invention proposes the use of a combined sampling means and sub-ranging means as an input circuit.

Abstract: The present invention includes differential devices and methods of protecting a semiconductor device. One aspect of the present invention provides a differential device adapted to be coupled to a ground connection, the differential device comprising: a first interconnect; a second interconnect; a common diffusion region; a first MOS device coupled with the common diffusion region and the first interconnect; a second MOS device coupled with the common diffusion region and the second interconnect; and a tail MOS device coupled with the common diffusion region and adapted to be coupled to a ground connection.

Abstract: An autozeroing floating-gate amplifier (AFGA) is an integrated continuous-time filter that is intrinsically autozeroing. It can achieve a highpass characteristic at frequencies well below 1 Hz. In contrast with conventional autozeroing amplifiers that eliminate their input offset, the AFGA nulls its output offset. The AFGA is a continuous-time filter; it does not require any clocking. The AFGA includes at least one floating-gate MOS transistor that is capable of hot-electron injection of electrons onto the floating gate of the MOS transistor. Electrons are continuously removed from the floating gate(s), for example, via Fowler-Nordheim tunneling. The AFGA has a stable equilibrium for which this tunneling current is balanced by an injection current of equal magnitude.

Abstract: An impulse forming circuit is disclosed which produces a clean impulse from a nonlinear transmission line compressed step function without customary soliton ringing by means of a localized pulse shaping and differentiating network which shunts the nonlinear transmission line output to ground.

Abstract: The present invention is a charge amplifier that directly produces a low impedance voltage output proportional to the charge at its input. The invention consists of an operational amplifier, an input capacitor, a feedback capacitor and a feedback resistor in a parallel configuration. The change amplifier of the present invention can be said to be a differentiator followed by an integrator so that the "noisy" differentiation process precedes the integration and, thus the integration produces less signal degradation.

Abstract: A switched current differentiator includes first and second interconnected current memory cells, An input current is applied to terminal (1) and is fed on line (2) to the current memory cells, A first output current is derived from the first current memory cell via a transistor and a second output current is derived from the second current memory cell via another transistor. The second output current is inverted (A1) and summed with the first output current. The summed current is inverted (A2) and fed to an output via a switch on odd phases of a clock signal and is fed directly to the output via a further switch (S4) on even phases of a clock signal. A damped differentiator may be formed using a feeback loop. In a fully differential version of the differentiator the inverters may be constructed by the correct interconnection of the differential signals, i.e. by crossing over connections.

Abstract: A discriminator provides an output signal having an amplitude proportional to the frequency of a measured signal. The output of the discriminator is connected to a differentiator circuit that provides an impulse signal proportional to a cycle to cycle frequency change of the measured signal.

Abstract: A differential pulse encoding and decoding approach for binary data transmissions, such as binary frequency shift keying (BFSK) data transmissions, for sending and recovering a serial, binary digital data stream by differentiating the pulses thereof. A method and system are disclosed for transmitting from a transmitter to a receiver a digital data signal containing a stream of binary data bits having a first high value and a second low value. At the transmitter, the digital signal is transformed into a differential signal which contains pulses corresponding to transitions between the first and second values. The digital signal is transformed into the differential signal by an encoder which can be a differentiator circuit or an RC high-pass filter circuit. If frequency spectrum is a concern, a low-pass filter can filter the output of the encoder. The differential signal is then transmitted, and received by the receiver which reconstructs the original digital signal therefrom.

Abstract: An address transition signal detecting circuit includes a differentiator for receiving and differentiating an address input signal, and a pulse signal forming portion for receiving the signal differentiated in the differentiator to thereby form an address transition signal.

Abstract: A bus driver includes differentiating and delay circuits connected together in parallel. The differentiating circuit receives an input signal via a first buffer circuit and produces a first signal having a falling and rising period. The delay circuit delays the input signal to produce a second signal output via a second buffer circuit. The second signal is delayed so that the second signal begins falling after the first signal starts falling and so that second signal begins rising after the first signal starts rising. The first and second signals are combined to produce an output signal. The preceding edge of the output signal is rounded because the relatively short falling of the first signal precedes the relatively long falling of the second signal. The following edge of the output signal is rounded because the short rising of the first signal suppresses an end portion of the long falling of the second signal.

Abstract: There is disclosed a rectangular filter which has a simple configuration and is capable of producing an improved rectangular wave. An input step wave is differentiated by a differentiator circuit and amplified by a first amplifier. The output from the amplifier is inverted by an inverting amplifier having a gain of -1. The output from the first amplifier is integrated by an integrator circuit having a time constant equal to the time constant of the differentiator circuit. The output from the inverting amplifier and the output from the integrator circuit are summed up by an adding circuit. The input signal is faithfully reproduced at the output of the adding circuit. After a given time passes since the input signal has been applied, the capacitor of the integrator circuit is shorted out. In this way, a rectangular wave is obtained. There is also disclosed a filter amplifier comprising this rectangular filter and a gated integrator for integrating the output from the rectangular filter for a predetermined time.

Abstract: A control system for controlling exhaust gas recirculation in an internal combustion engine. The output of a throttle position sensor is used as an input to two parallel filters. The first filter is a lag-lead compensated filter which functions as a differentiator, producing an output proportional to the instantaneous rate of change of the throttle position.. The second filter is a fixed-rate tracking filter which generates a tracking signal that tracks the input signal. The tracking signal, however, cannot vary by more than a maximum predetermined rate. The output of the second filter is the difference between the input signal and the tracking signal. The outputs of the two filters are summed and applied to a hysteretic comparator, which turns the EGR valve off when the sum exceeds an upper threshold and turns the EGR valve back on when the sum has decayed below a lower threshold.

Abstract: A peak detector for extracting pulses in a magnetoresistive sensor circuit while suppressing the recovery transients created by thermal asperities. The disclosed peak detector circuit is a simplified variation of the standard magnetoresistive sensor peak detector circuit. The signal differentiation is performed ahead of the usual amplification to remove transient pulse amplitudes before they can affect the AGC gain. The resulting differentiated signal is processed by a modified amplitude qualification circuit to extract data output pulses. The thermal asperity transient recovery period is eliminated without additional circuit complexity, leaving only the initial thermal asperity pulse effects to be corrected by any suitable relatively simple error correction code (ECC).