Abstract: A method for converting an alcohol to a hydrocarbon fraction having a lowered benzene content, the method comprising: converting said alcohol to a hydrocarbon fraction by contacting said alcohol, under conditions suitable for converting said alcohol to said hydrocarbon fraction, with a metal-loaded zeolite catalyst catalytically active for converting said alcohol to said hydrocarbon fraction, and contacting said hydrocarbon fraction with a benzene alkylation catalyst, under conditions suitable for alkylating benzene, to form alkylated benzene product in said hydrocarbon fraction. Also described is a catalyst composition useful in the method, comprising a mixture of (i) a metal-loaded zeolite catalyst catalytically active for converting said alcohol to said hydrocarbon, and (ii) a benzene alkylation catalyst, in which (i) and (ii) may be in a mixed or separated state. A reactor for housing the catalyst and conducting the reaction is also described.

Abstract: A motor includes a rotor, a sensor unit, an offset unit, a rectification unit and a modulating unit. The sensor unit outputs a first signal in accordance with a magnetic field variation of the rotor. The offset unit is coupled to the sensor unit, and outputs a second signal in accordance with the first signal. The rectification unit is coupled to the offset unit, and outputs a third signal in accordance with the second signal. The modulating unit is coupled to the rectification unit, and outputs a control signal in accordance with a result by comparing the third signal with a periodic signal. The modulating unit controls a reverse rotation of the rotor smoothly in accordance with the control signal. A control method of the motor is also disclosed.

Abstract: A detector circuit, has a first diode, to an anode of which an AC signal is input and to which a constant voltage is supplied, a second diode, to an anode of which the constant voltage is supplied, and a difference current generation circuit, which generates the difference current between a first current flowing in the first diode and a second current flowing in the second diode.

Abstract: A detector circuit, has a first diode, to an anode of which an AC signal is input and to which a constant voltage is supplied, a second diode, to an anode of which the constant voltage is supplied, and a difference current generation circuit, which generates the difference current between a first current flowing in the first diode and a second current flowing in the second diode.

Abstract: Apparatus and method for generating a rectified output signal in a RFID tag from first and second alternating signals. A dual-terminal rectifier device has first and second input terminals to which the first and second alternating signals are applied, and further has a gate configured to form a conductive channel to electrically couple the first and second input terminals to the output terminal in response to a gate voltage. The dual-terminal rectifier device is configured to rectify a combination of the alternating input signals applied to the input terminals of the semiconductor device to generate a rectified output signal at an output terminal.

Abstract: The present invention discloses a smart driver used in flyback converters adopting a transconductance amplifier to turn on a synchronous rectifier FET, and a comparator to quickly turn off the synchronous rectifier FET.

Abstract: Consistent with an example embodiment, there is a method of controlling a synchronous rectifier having an input signal having oscillations therein and a switch which is switchable between an open state and a closed state. The method comprises filtering the input signal to produce a filtered signal, comparing the filtered signal with a reference value, and opening the switch in response to the comparison, in which the filtering is active filtering. The active filtering may be based on determination of the peaks (positive and/or negative) of the signal, either directly, including a quarter period offset, or including decay—or a combination of the above; alternatively, the active filtering may be based on the a smoothing functions such as a switched low-pass filter or a short time integrator.

Abstract: Apparatus and method for generating a rectified output signal in a RFID tag from first and second alternating signals. A dual-terminal rectifier device has first and second input terminals to which the first and second alternating signals are applied, and further has a gate configured to form a conductive channel to electrically couple the first and second input terminals to the output terminal in response to a gate voltage. The dual-terminal rectifier device is configured to rectify a combination of the alternating input signals applied to the input terminals of the semiconductor device to generate a rectified output signal at an output terminal.

Abstract: A stabilizing current source circuit is provided. The stabilizing current source circuit is used for stabilizing a current provided by a current source, and the current of the current source increases when temperature rises. The stabilizing current source circuit comprises a current source circuit and an adjustment circuit. The current source circuit provides a current that increases when temperature rises. The adjustment circuit is coupled to the current source circuit and provides an input current that increases when temperature rises. The current of the current source is subtracted from the input current to generate a current source current which does not vary with temperature.

Abstract: A stabilizing method for a current source is provided. The current source is provided a current which increases when temperature rises. An adjustment circuit provides an input current increasing when temperature rises. A rising ratio of the input current with temperature is the same as a rising ratio of the current of the current source with temperature. The current of the current source is subtracted from the input current. After the current of the current source is subtracted from the input current, the current of the current source does not vary when temperature varies.

Abstract: Embodiments of the invention are generally directed to a high-speed differential energy difference integrator (EDI) for adaptive equalizers. In an embodiment, the EDI includes two differential full-wave rectifiers providing differential outputs that are cross-coupled to the inputs of an integration capacitor. In one embodiment, the active areas of the transistors of the differential full-wave rectifiers are substantially the same.

Abstract: The invention includes an apparatus and a method for minimizing power supply sensitivity of a differential amplifier. The apparatus includes a current source providing a differential amplifier bias current to a common source node of the differential amplifier. A voltage sensor senses variations of a power supply associated with the current source. Variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current. The method includes a current source providing the source current. A voltage potential of the common source node is sensed. The current source is adjusted depending upon the sensed voltage potential of the common source node, thereby adjusting a magnitude of the source current.

Abstract: A loss-less diode equivalent circuit which functions to reduce and eliminate the forward bias voltage or drop associated with conventional diodes. The loss-less diode comprises a reverse connected MOSFET device which is configured with a clamping circuit and coupled to an input stage. The drain is coupled to the input stage which receives an input signal. The source of the MOSFET device provides an output port for charging a capacitor in a conduction or on state.

Abstract: According to the present invention, there is provided a variable resistance circuit comprising,

Abstract: A rectifying circuit and method to produce a DC output by rectifying a sinusoidal source having a plurality of output phase voltages and a plurality of phase-to-phase voltages, the rectifying circuit including a bridge circuit coupled to the output phase voltages, the bridge circuit having a plurality of switches; and a control circuit coupled to the output phase voltages and to the bridge circuit, the control circuit being configured to control the switches in accordance with respective absolute values of the phase-to-phase voltages; wherein the output phase voltages are rectified to produce the DC output. When the sinusoidal source is inductive, switch turn-off may be timed to provide synchronous rectification related to estimates of source periodicity.

Abstract: A waveform shaping circuit is provided so that the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency. An inverter which receives the clock pulses through an alternating current coupling capacitor is provided with a non-linear limiter element for limiting an amplitude of an output symmetrically on positive and negative sides thereof. A first current-limiting impedance and a second current-limiting impedance are connected between a power supply side terminal of the inverter and a power supply bus and between a grounding side terminal of the inverter and a grounding bus, respectively.

Abstract: A rectifying integrator of an input signal with full output dynamics, relative to a voltage reference intermediate with respect to the dynamics of the input signal, includes a first line of integration having at least one integrator for integrating that portion of the input signal that exceeds the voltage reference, and includes a hold capacitor coupled in cascade to the integrator. The rectifying integrator includes a second line of integration, identical to the first line of integration, for integrating that portion of the input signal that remains below the voltage reference. An adder output stage generates an output signal equal to the difference between the voltages existing on the hold capacitors of the first and second lines of integration.

Abstract: A vector-signal processing circuit can be operated with low power consumption and can be configured so as to be cheap. Sensor signals in three-axial directions are individually rectified by full-wave-rectifier circuits individually formed by combining four diodes. Subsequently, the outputs of the above are added by an adder circuit and are further processed by a comparator, thereby generating digital signals. Forward-voltage-falling characteristics of the individual diodes used in the full-wave rectifier circuits are set to 0.3 V, and a threshold of the comparator is set to 0.6 V.

Abstract: A synchronous rectifier circuit (10) includes a polarity comparator (14) that generates a signal to a driver circuit (16) for controlling the voltage at the gate of a power MOSFET (60). The power MOSFET (60) is switched to operate in the conduction mode and short out a parasitic diode (62) when the diode is forward biased. The power MOSFET (60) is switched to operate in the nonconduction mode when the parasitic diode (62) is reverse biased. A bias supply circuit (12) uses a capacitor (70) to generate a regulated internal bias that provides power to the polarity comparator (14) and to the driver circuit (16). The internal bias allows the power MOSFET (60) to provide a current conduction that is substantially isolated from the changes in voltage levels at the terminals (64, 66) of the synchronous rectifier circuit (10).

Abstract: A highly efficient compact multiple output voltage generation circuit is designed for use in integrated circuit devices such as DRAMs which require multiple internal voltage supplies for optimum performance. An oscillator is connected to a primary coil of a microtransformer. The microtransformer secondary coil has multiple taps one of which is connected to ground. A second transformer tap is connected to a transformer output node. The oscillating transformer output signal is capacitively coupled to a voltage rectifier. The input to the rectifier is biased to one diode drop below Vcc. The output of the rectifier is an internal supply voltage greater than ground. Another transformer tap is connected to a negative oscillation output node. The negative oscillating signal is rectified to produce a negative internal supply voltage. The voltage generation circuit operates effectively at low Vcc input levels where capacitor based voltage pumps often fail. The circuit is compatible with CMOS manufacturing processes.

Abstract: The present invention discloses a fully integrated precision HDA shock sense circuit with high-order filters implemented in integrated circuit technology. Filters are integrated with an improved on-chip bias generator so that they can provide stable, trimmable and/or programmable frequency responses with a minimum number of external capacitors. The invention provides dual full-wave rectifiers for X-axis and Y-axis shock sensing so that more accurate and reliable shock detection can be achieved. Input signals from X-axis and Y-axis shock sensors are converted to current and provided to the dual full-wave rectifiers. The currents thus full-wave rectified are summed and lowpass filtered to generate an output signal, which is then fed to a comparator to produce a shock detection logic signal.

Abstract: A highly efficient compact multiple output voltage generation circuit is designed for use in integrated circuit devices such as DRAMs which require multiple internal voltage supplies for optimum performance. An oscillator is connected to a primary coil of a microtransformer. The microtransformer secondary coil has multiple taps one of which is connected to ground. A second transformer tap is connected to a transformer output node. The oscillating transformer output signal is capacitively coupled to a voltage rectifier. The input to the rectifier is biased to one diode drop below Vcc. The output of the rectifier is an internal supply voltage greater than ground. Another transformer tap is connected to a negative oscillation output node. The negative oscillating signal is rectified to produce a negative internal supply voltage. The voltage generation circuit operates effectively at low Vcc input levels where capacitor based voltage pumps often fail. The circuit is compatible with CMOS manufacturing processes.

Abstract: A circuit that can switch between a peak detect and an averaging mode is described. In a preferred embodiment, when the circuit is in a peak detect mode a first transistor is on and a second is off, enabling an amplifier in the circuit to produce a signal representative of the peak value of an input signal. In an averaging mode, the first transistor is off, and a second transistor turns on, disabling the output of the amplifier, and thus enabling the averaging mode components of the invention.