Abstract: A method and system avoid ringing at an external power transistor subsequent to switching OFF the external power transistor. A driver circuit generates a drive signal for switching the external power transistor between OFF-state and ON-state. The driver circuit comprises a drive signal generation unit configured to generate a high drive signal triggering the external power transistor to switch to ON-state, wherein an output resistance of the driver circuit is adjustable, an oscillation detection unit to detect a degree of oscillation on the drive signal, and a resistance control unit to adjust the output resistance of the driver circuit based on the degree of oscillation on the drive signal.

Abstract: An electronic device includes: an integrated circuit having a first circuit part, a second circuit part, a first power source line of the first circuit part, a second power source line of the second circuit part, and a coupling switch coupling the first power source line and the second power source line; a power source supply part which generates a power source to be supplied to the first and second circuit parts and which has a power source supply control circuit controlling the supply of power source to the second circuit part; and a power source control part that controls the power source supply control circuit and the coupling switch, wherein the power source control part controls the power source supply control circuit so as to supply a power source in accordance with the operating state of the second circuit part and closes the coupling switch.

Abstract: A switching circuit configured to reduce the effects of signal oscillation on the operation of the switching circuit is provided. The switching circuit may include signal oscillation and detection circuitry that suppresses control signals during a detected oscillation, allowing stored energy to naturally decay in the switching circuit and thereby prevent unwanted extension of the oscillation that may be caused by the repeated switching of a semiconductor element coupled between the input and output of the switching circuit.

Abstract: The semiconductor intergrated circuit comprises: a circuit that executes a predetermined process and a switching circuit that selects a power impedance, The switching circuit selects the power impedance, in accordance with a variation in voltage supplied to the circuit, so that a resonant frequency of the semiconductor integrated circuit is different from a operation frequency of the circuit.

Abstract: A variable bandpass filter system passes a selected range of frequencies while rejecting other frequencies in an RF input signal. The system includes a switch and an oscillator. The switch receives the RF input signal and an oscillating calibration signal, and passes the RF input signal or said oscillating calibration signal based on a control signal. The oscillator receives an output of the switch, and frequency and gain control signals. The frequency control signal selects an operating frequency of the oscillator, such that the operating frequency determines a range of frequencies to pass. The gain control signal selects gain of the oscillator, where the oscillating calibration signal allows the oscillator to be calibrated by varying the gain such that the oscillator acts as a filter.

Abstract: A circuit for producing a stable CDAC reference voltage in a successive approximation analog-to-digital converter includes a circuit (27) producing an input reference voltage (VREFIN), and a buffer circuit (12) producing a stable reference voltage in response to the input reference voltage. The buffer circuit includes an amplifier (13) having a non-inverting input receiving the input reference voltage. A first buffer (13B) receives the output of the amplifier and produces output that is fed back to an inverting input of the amplifier. A second buffer (18) also receives the amplifier output. A first transistor switch (19) couples the output of the second buffer to a CDAC. A second transistor switch (29) couples the CDAC to ground. A third transistor switch (26) couples the first buffer to the CDAC. The first transistor switch (19) closes to cause an initial "coarse" charging of a first capacitance of the CDAC by the second buffer (18).

Abstract: A power circuit for an integrated circuit chip having a plurality of operation frequency modes, the power circuit varying a resonance point defined by a parasitic resistance, inductance and capacitance existing in a power supplying line, in accordance with an operation frequency to thereby prevent the operation frequency from being in accord with a resonance frequency. For instance, when the operation frequency is relatively high, the power circuit lowers the resonance point, and when the operation frequency is relatively low, the power circuit raises the resonance point. The power circuit may further include an encoder receiving an operation frequency mode signal, and emitting an output signal indicative of an operation frequency. The power circuit provides a power ensuring stable operation of an external circuit in a plurality of operation frequency modes.