Abstract: An electronic device includes a power management device configured to supply a plurality of input voltages; a power module configured to generate an output voltage using at least one of the plurality of input voltages, and to output the generated output voltage; and a system load configured to operate by receiving the output voltage, wherein the power module includes: a first power module configured to receive a first input voltage from the power management device, and to generate a first output current using the first input voltage; and a second power module configured to receive a second input voltage from the power management device, and to generate a second output current using the second input voltage based on the first input voltage being lower than a first reference voltage.

Abstract: A circuit arrangement comprises a first branch comprising a resistor of variable resistance and a diode-connected bipolar transistor and a second branch comprising a resistor of fixed resistance and another diode-connected bipolar transistor. A control loop reproduces a voltage drop at the resistor of variable resistance to a voltage drop at the resistor of fixed resistance. Output terminals are connected to the bipolar transistors to supply a differential voltage. The circuit arrangement may be used as an analog frontend circuit in a gas sensor or a temperature sensor arrangement.

Abstract: An ion detection current conversion circuit includes a conversion amplifier coupled with a conversion resistor assembly for converting an ion detection current produced by an ion detector into an ion detection voltage, the conversion resistor assembly comprising a resistor having a high resistance and a capacitive compensation element, and a compensation voltage circuit for deriving a compensation voltage from the ion detection voltage and feeding the compensation voltage to the capacitive compensation element, the compensation voltage circuit comprising a variable resistor for adjusting the compensation voltage.

Abstract: A reference voltage generator is disclosed that may provide a plurality of reference voltages. A reference voltage generator may include a voltage divider, a multiplexer coupled to the voltage divider, an operational amplifier that may receive a voltage from the multiplexer, and a plurality of resistors that may receive an output from the operational amplifier. The reference voltages may be provided from output terminals coupled to the resistors. A reference voltage generator may include a voltage divider, two multiplexers coupled to the voltage divider, an operational amplifier coupled to each multiplexer, and a plurality of resistors coupled between the outputs of the two operational amplifiers. Reference voltages may be provided from output terminals coupled to the resistors.

Abstract: A system is disclosed, including an interface to a DUT and a testing apparatus. The DUT includes a first plurality of temperature sensing circuits. The testing apparatus may store a plurality of control values. Each control value may depend on at least two calibration values of corresponding temperature sensing circuits of a second plurality of temperature sensing circuits. The testing apparatus may generate a plurality of calibration values for the DUT. Each calibration value corresponds to one of the first plurality of temperature sensing circuits. The testing apparatus may determine a plurality of test values for the DUT. The testing apparatus may calculate a probability value, and repeat generation of the plurality of calibration values upon determining that the probability value is less than a predetermined threshold value. The probability value corresponds to a likelihood that the plurality of calibration values is accurate.

Abstract: A method includes obtaining a standard value for a characteristic of a power switch and obtaining a measured value of the characteristic, via a gate drive unit connected to a gate terminal of the power switch. The method also includes determining a health state of the power switch by comparing the measured value to the standard value of the characteristic.

Abstract: A control circuit for generating a first control signal and a second control signal includes: an inverter, used for generating an inverted clock according to an input clock; a first delay circuit, used for generating a first delay control signal; a second delay circuit, used for generating a second delay control signal; a first mask circuit, used for generating a first mask signal according to the input clock; a second mask circuit, used for generating a second mask signal according to the inverted input clock; a first logic determining circuit, used for generating the first control signal to the first delay circuit according to the second mask signal and the input clock; and a second logic determining circuit, used for generating the second control signal to the second delay circuit according to the first mask signal and the inverted clock.

Abstract: A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.

Abstract: Disclosed are embodiments of an integrated circuit chip designed for reliability at low ambient temperatures. The chip substrate can be divided into zones, including at least one temperature-sensitive zone (TSZ) that contains one or more temperature-sensitive circuits. Temperature sensor(s) can be positioned in the semiconductor substrate adjacent to the TSZ. Thermal radiator(s) can be embedded in a metal wiring layer and aligned above the TSZ. The temperature sensor(s) can be operatively connected to the thermal radiator(s) and can trigger operation of the thermal radiator(s) when the temperature in the TSZ is below a predetermined threshold temperature. Additionally, an on-chip power control system can be operatively connected to the thermal radiator(s) so that operation of the thermal radiator(s) is only triggered when a circuit within the TSZ is about to be powered up. Also disclosed are associated embodiments of a system and method for designing such an integrated circuit chip.

Abstract: An analogue measurement data detection system according to the present invention includes: a reference voltage generation circuit configured to generate and output a reference voltage; an analogue/digital converter configured to compare an analogue signal with the reference voltage outputted from the reference voltage generation circuit, and based on a differential voltage between the analogue signal and the reference voltage, generate and output a digital signal corresponding to the analogue signal. The reference voltage generation circuit is configured to cause the reference voltage to have such a temperature characteristic as to compensate for temperature characteristics of at least the analogue/digital converter and the reference voltage generation circuit.

Abstract: An apparatus and method for charging a battery includes a battery to be charged, a power delivery path configured for delivering power to the battery, and an integrated switching battery charger configured for charging a battery by delivering output power to the battery via the power delivery path based on input power from an input power source. The integrated switching battery charger includes an output voltage regulation loop and an input voltage regulation loop, both of which are configured to control the output current flowing out of the integrated switching battery charger to the battery. The input or output voltage regulation loops are further enhanced by adding a current source which is proportional to absolute temperature from the regulated voltage to the control voltage for the purpose of either regulating peak power from the source or to maximize energy storage in the battery as a function of temperature.

Abstract: Embodiments related to an undervoltage detector are described and depicted. An undervoltage detector is formed to detect a low input bias voltage with a voltage divider network including first and second series circuits of semiconductor devices coupled to terminals of the input bias voltage source, and a resistor voltage divider including first and second voltage divider resistors coupled in series with the first and second series circuits. A ratio representing the numbers of semiconductor devices in the series circuits is substantially equal to a ratio of resistances in the resistor voltage divider. The equality of the ratios may be corrected by the presence of other resistances in the undervoltage detector. The semiconductor devices are each coupled in a diode configuration. The first series circuit is coupled to a current mirror to provide a bias current for a comparator that produces an output signal for the undervoltage detector.

Abstract: An apparatus and method for testing is provided. An integrated circuit includes a comparison circuit that is arranged to trip based on a power supply signal reaching a trip point. The integrated circuit also includes an analog-to-digital converter that is arranged to convert the power supply signal into a digital signal. The integrated circuit also includes a storage component that stores a digital value associated with the digital signal, and provides the power supply value at an output pin of the integrated circuit. The integrated circuit includes a latch that is coupled between the analog-to-digital converter and the storage component. The latch is arranged to open when the comparison circuit trips, such that, when the comparison circuit trips, the storage component continues to store a digital value such that the digital value corresponds to the voltage associated with the power supply signal when the comparison circuit tripped.

Abstract: A temperature stable comparator circuit, comprised of: a branch C having a first end, a second end, a first type-1 device and first type-2 device, wherein the first type-1 device and the first type-2 device are connected to a node O; a branch B having a first end, a second end, a second type-1 device, a second type-2 device, and a resistor; and a branch A having a first end, a second end, a third type-2 device and a current-control device; wherein the first ends of the branch A, branch B, and branch C are commonly connected, and the second ends of the branch B and branch C are commonly connected.

Abstract: A power-up signal generation circuit includes a fixed level transition voltage generation unit, a variable level transition voltage generation unit, a comparison unit, and a selective output unit. The fixed level transition voltage generation unit is configured to generate a fixed level transition voltage changing at a constant level of an external voltage. The variable level transition voltage generation unit is configured to generate a variable level transition voltage changing at a level of an external voltage which varies depending on temperature. The comparison unit is configured to compare the level of the fixed level transition voltage with the level of the variable level transition voltage, and generate a selection signal. The selective output unit is configured to output the fixed level transition voltage or the variable level transition voltage as a power-up signal in response to the selection signal.

Abstract: A temperature compensation circuit for generating a temperature compensating reference voltage (VREF) may include a Bandgap reference circuit configured to generate a Bandgap reference voltage (VBGR) that is substantially temperature independent and a proportional-to-absolute-temperature reference voltage (VPTAT) that varies substantially in proportion to absolute temperature. The circuit may also include an operational amplifier that is connected to the Bandgap reference circuit and that has an output on which VREF is based. The circuit may also include a feedback circuit that is connected to the operational amplifier and to the Bandgap reference circuit and that is configured so as to cause VREF to be substantially equal to VPTAT times a constant k1, minus VBGR times a constant k2.

Abstract: A driver circuit includes an output transistor circuit that includes a first transistor of a first conductivity type and a second transistor of a second conductivity type disposed between a supply voltage source and a reference voltage source, and that outputs an output signal from a connection node between the first transistor and the second transistor, a first pre-buffer circuit that drives a gate of the first transistor in response to an input signal, and a second pre-buffer circuit that drives a gate of the second transistor in response to the input signal.

Abstract: A low voltage detector (100) includes a voltage and current reference circuit (102); a power supply voltage monitor circuit (104), coupled to the voltage and current reference circuit and to a power supply; and a voltage comparator (106), coupled to the voltage and current reference circuit and to the power supply voltage monitor circuit. The voltage and current reference circuit includes a self-cascode MOSFET structure (SCM) (110) that produces a reference voltage. The power supply voltage monitoring circuit includes another SCM (140) that produces a monitor voltage, related to the power supply voltage. The reference voltage and the monitor voltage have a same behavior with changes in temperature, thereby allowing the trip point of the low voltage detector to minimally vary with temperature. The low voltage detector is disposed on an integrated circuit (101), and the transistors of the low voltage detector consist of only CMOS transistors.

Abstract: A corner detector comprises a PMOS threshold voltage detector and an NMOS threshold voltage detector, the PMOS threshold voltage detector is composed of a first clock terminal, a first CMOS inverter, a first capacitor, a PMOS threshold voltage function generator and a first voltage output terminal, wherein the PMOS threshold voltage function generator is electrically connected to the first capacitor and applied to generate a first formula of voltage signal as a function of threshold voltage, the NMOS threshold voltage detector is composed of a second clock terminal, a second CMOS inverter, a second capacitor, an NMOS threshold voltage function generator and a second voltage output terminal, wherein the NMOS threshold voltage function generator is electrically connected to the second capacitor and applied to generate a second formula of voltage signal as a function of threshold voltage.

Abstract: A low voltage differential signalling driver is provided in which a first output node and a second output node provide a differential signal. First differential steering switch circuitry is switched in dependence on a differential input signal to selectively connect the first output node to a voltage supply via a current source, while second differential steering circuitry is switched in dependence on an inverse version of the differential input signal to connect the second output node to the voltage supply via the current source. Slew control circuitry is provided, configured to establish a current discharge path for the current source during the polarity transition of the differential input signal, thus maintaining a symmetric slew rate of the output signals at the first output node and second output node.

Abstract: A comparator circuit (300) has a first field effect transistor (FET) (307) with a supply voltage (301) connection and a diode connected FET (303) connected in series to form the first circuit leg of the comparator (300). A second diode connected FET (309) and a second FET (305) in series form the second circuit leg. The first FET (307) and said second FET (305) are approximately equal sized FETs. Another embodiment is an integrated circuit (401) with two n-channel FETs. A first diode connected FET (303) is connected to the first n-channel FET (307) in series to form the first circuit leg of a comparator (300) and a second diode connected FET (309) is connected to a second n-channel FET (305) in series to form the second circuit leg of the comparator. The two n-channel FETs that form the differential pair are approximately equal in size. The trip point is high with respect to the supply voltage.

Abstract: A temperature-compensated voltage comparator (301) that compares first and second input voltages includes first and second bipolar junction transistors (BJTs) (221 and 222) that convert the first and second input voltages to first and second input currents, respectively. The first and second BJTs share a same thermal environment and their currents are dependent upon temperature. A temperature-compensating circuit (350), which includes a zero thermal coefficient reference (419), generates a logarithmic temperature-compensating factor that compensates for temperature dependency of the first and second BJTs. The temperature-compensating circuit receives one of the input currents, and outputs a temperature-compensated current that is said input current multiplied by the logarithmic temperature-compensating factor. The temperature-compensating circuit shares a thermal environment with the first and second BJTs.

Abstract: A temperature detection circuit includes a bandgap reference voltage generation circuit, a detection output circuit, and an output conversion circuit. The bandgap reference voltage generation circuit generates a first reference voltage and causes a bias current to flow through a current path to produce a thermal voltage. The current path has a first resistor. The detection output circuit has a second resistor and causes a mirror current of the bias current to flow through the second resistor. The output conversion circuit uses a second reference voltage to convert a voltage drop across the second resistor to a predetermined output form to detect a temperature. The first and second resistors are substantially identical in temperature dependence. The second reference voltage is generated from the first reference voltage.

Abstract: A detection circuit includes a current source with no temperature coefficient; a current generation circuit that generates a VBE proportional reference current from the current source with no temperature coefficient; a current mirror circuit that returns an output current of the current generation circuit; a reference voltage generation circuit that generates a VBE proportional voltage with a negative temperature coefficient on the basis of the current returned by the current mirror circuit so that the VBE proportional voltage is used as a reference voltage of a comparator; and a full-wave rectifying means, having a differential pair and a rectifier circuit, using the current source with no temperature coefficient, having an alternating current signal supplied as an input signal, for generating a direct current voltage with a negative coefficient on the basis of a voltage obtained by full-wave rectifying the alternating current signal, and for using the generated voltage as a comparative voltage of the compar

Abstract: An internal voltage generator includes an internal voltage detecting unit that receives an active signal activated in an active operation mode of a semiconductor memory and a bias voltage varying according to temperature variation, detects a level of an internal voltage by using a reference voltage and outputs an internal voltage pumping signal activated according to the level of the internal voltage.

Abstract: Power savings are achieved for digital data transport over short distances by using the characteristics of resonant LC circuits. Economy of circuit elements is achieved by enabling a single pair of resonant circuits to drive large numbers of digital data lines or nodes in parallel. This maximizes power efficiency and minimizes area and cost. Resistance is minimized by insuring that all switches in the current path are fully “ON” whenever significant current is flowing through them. All other parasitic resistances in the circuits, consisting primarily of parasitic interconnect resistances, are minimized. This enables the data transmission circuits to achieve maximum Q or quality factor, which minimizes power dissipation.

Abstract: A wave detector circuit includes: a first transistor having its base and collector connected together, the first transistor receiving an AC signal and a reference voltage at its base and collector; a second transistor having its base connected to the base of the first transistor through a resistor, the second transistor outputting a detected voltage at its collector; and a diode-connected temperature compensation transistor connected between ground potential and the base and the collector of the first transistor.

Abstract: An integrated circuit having a temperature sensitive circuit (TSC) to generate a signal indicative of the substrate temperature near the TSC. The integrated circuit has circuitry configured to receive a TSC signal from at least one TSC and to convert the TSC signal to a signal indicative of the integrated circuit's temperature. The thermal control circuit compares the integrated circuit temperature to a threshold and produces a corrective action signal when the temperature exceeds the threshold. The corrective action signal is provided to corrective action circuitry preferably configured to modify the operation of the IC to reduce the IC temperature in proximity to the corresponding TSC.

Abstract: A temperature compensation circuit having satisfactory linearity, a trimming circuit including a plurality of temperature gradients, and an acceleration detector having a wide applicable temperature range. A plurality of resistor elements R1 to R4, R5 to R8, R21 to R24, R25 to R28 are connected in series between a power supply voltage line and a ground voltage line. Resistor elements R9 to R14 are connected in series between connection nodes N1 and N3. Resistor elements R29 to R34 are connected in series between connection nodes N2 and N4. The resistor elements R1, R2, R4, R5, R7 to R14, R24, R25 have negative temperature coefficients. The resistor elements R3, R6, R21 to R23, R26 to R34 have positive temperature coefficients. An output terminal NT5 connects a connection node of the resistor elements R13 and R14 and a connection node of the resistor elements R30 and R29.

Abstract: Method and system for periodically measuring the junction temperature of a semiconductor device. The junction exited by at least two sequential predetermined currents of different magnitudes. The voltage response of the junction to the at least two currents is measured and the temperature of the junction is calculated, while substantially canceling ohmic effects, by using the voltage response and a correction factor obtained by periodically. Whenever desired, the junction is exited by a set of at least four sequential different currents having known ratios. The voltage response to the set is measured and the correction factor is calculated by using each voltage response to the set.

Abstract: A comparator with a fixed reference voltage (self bias) for an oscillator is disclosed. The comparator includes: a depletion MOS network to form a source current, wherein the gate and the source has a connection; and an enhanced MOS transistor, wherein the drain or the source connects with the depletion MOS transistor in series. The gate of the enhanced MOS transistor receives an input voltage when the input voltage is lower than the reference voltage, and the comparator outputs a high level voltage, or the enhanced MOS transistor outputs a low level voltage if the input voltage is higher then the reference voltage. Moreover, the oscillator's comparator has a reference voltage that is independent from temperature and supply voltage source.

Abstract: A temperature sensor includes a reference voltage generator, a sensing temperature controller and a first differential amplifier. The reference voltage generator generates a reference voltage having a first slope that varies in accordance with variations of a peripheral temperature, and a temperature sensing voltage having a second slope that varies in accordance with variations of the peripheral temperature. The sensing temperature controller controls an offset of an amplifier in response to a first control signal, and amplifies a voltage difference between the reference voltage and the temperature sensing voltage to generate a first differential output signal, and a second differential output signal having an inverted phase of the first differential output signal. The first differential amplifier amplifies a voltage difference between the first differential output signal and the second differential output signal to generate a sensor output signal.

Abstract: A reference voltage generator uses a conventional forward junction voltage generating device and a conventional thermal generator to generate a thermal voltage. The forward junction voltage and the thermal voltages have respective thermal sensitivities that act oppositely to each other so that, when the forward junction voltage is combined with the thermal voltage to produce a reference voltage, the reference voltage is substantially insensitive to temperature. The forward junction voltage and the thermal voltage are combined to produce the reference voltage in a manner that avoids generating any voltage having a magnitude that is greater than the magnitude of the sum of the forward voltage and the thermal voltage.

Abstract: An on-chip temperature detection device includes: a bipolar type power transistor; a mirror transistor in which a collector current, which is proportional to a collector current of the power transistor, flows; a current detection section that detects the collector current of the mirror transistor; a voltage detection section that detects a voltage between a base and an emitter of the power transistor; and a calculation section that calculates a chip temperature of the power transistor, based upon the collector current of the mirror transistor detected by the current detection section, and upon the voltage between the base and the emitter of the power transistor detected by the voltage detection section.

Abstract: An apparatus and method for generating an output signal that tracks the temperature coefficient of a light source are provided. A light source temperature coefficient tracking mechanism (e.g., a current source circuit) that generates an output signal, which tracks the temperature coefficient of the light source (e.g., temperature coefficient of a light emitting diode (LED)) is provided. A proportional to absolute temperature current source circuit (PTAT current source circuit) generates a first signal. A complimentary to absolute temperature current source circuit (CTAT current source circuit) generates a second signal. The output signal that tracks the temperature coefficient of the light source is based on the first signal and the second signal.

Abstract: A circuit for compensating for an offset voltage in a PhotoDetector Integrated Circuit (PDIC). The circuit includes a temperature detection unit, a current transfer unit and a current adjustment unit. The temperature detection unit generates a current that varies with variation in surrounding temperature. The current transfer unit transfers the generated current. The current adjustment unit adjusts the current transferred from the current transfer unit at a predetermined ratio and outputs the adjusted current.

Abstract: A programmable thermal sensor is implemented in an integrated circuit such as a microprocessor. The programmable thermal sensor monitors the temperature of the integrated circuit, and generates an output to indicate that the temperature of the integrated circuit has attained a preprogrammed threshold temperature. In a microprocessor implementation, the microprocessor contains a processor unit, an internal register, microprogram and clock circuitry. The microprogram writes programmable input values, corresponding to threshold temperatures, to the internal register. The programmable thermal sensor reads the programmable input values, and generates an interrupt when the temperature of the microprocessor reaches the threshold temperature. In addition to a programmable thermal sensor, the microprocessor contains a fail safe thermal sensor that halts operation of the microprocessor when the temperature attains a critical temperature.

Abstract: An oscillator circuit (100) can provide a dual slop temperature response. For a lower temperature range, a capacitor (106) can be charged and/or discharged according to a first current source (302) that provides an essentially constant current source. For a higher temperature range, the capacitor (106) can be charged and/or discharged according to a second current source (304) that can be enabled and/or provide current according to a voltage proportional to absolute temperature. A slightly positive temperature coefficient of a first current source (302) can be offset by a threshold detect circuit (210 and 212) within a second comparator circuit (204) that utilizes the threshold voltage (Vt) of a transistor (212) as a low limit for a capacitor voltage.

Abstract: Method and system for periodically measuring the junction temperature of a semiconductor device. The junction is excited by at least two sequential predetermined currents of different magnitudes. The voltage response of the junction to the at least two currents is measured and the temperature of the junction is calculated, while substantially canceling ohmic effects, by using the voltage response and a correction factor. Whenever desired, the junction is excited by a set of at least four sequential different currents having known ratios. The voltage response to the set is measured and the correction factor is calculated by using each voltage response to the set.

Abstract: A reference voltage generator uses a conventional forward junction voltage generating device and a conventional thermal generator to generate a thermal voltage. The forward junction voltage and the thermal voltages have respective thermal sensitivities that act oppositely to each other so that, when the forward junction voltage is combined with the thermal voltage to produce a reference voltage, the reference voltage is substantially insensitive to temperature. The forward junction voltage and the thermal voltage are combined to produce the reference voltage in a manner that avoids generating any voltage having a magnitude that is greater than the magnitude of the sum of the forward voltage and the thermal voltage.

Abstract: A temperature sensor apparatus comprises a pair of parallel circuit branches each including a pn semiconductor junction coupled in series to an impedance. The pn semiconductor junctions have different cross-sectional areas. An amplification stage comprises a CMOS input stage coupled respectively across each pn semiconductor junction and a FET transistor output stage (coupled to a load impedance) that generates an amplified output signal corresponding to the pn semiconductor junction temperature.

Abstract: A stable voltage that is independent of supply voltage is applied to a pair of current sources. A first current source generates a first current that passes through a first resistor, setting a compare-in-put voltage. A source-input voltage is applied to the first current source to vary the first current and the compare-input voltage. A second current source generates a stable current that passes through a second resistor, setting a reference voltage. The compare-input voltage and the reference voltage are applied to inputs of a comparator that generates an output voltage that indicates when the source-input voltage causes the compare-input voltage to rise past the reference voltage. The first and second currents track each other over temperature and process variations and are independent of supply voltage. A more accurate comparison of the source-input voltage is thus made.

Abstract: A temperature detection circuit comprises an OP amp, a reference current generator, a temperature detection voltage generator, a comparator, and a band gap reference voltage generator. The OP amp receives a band gap reference voltage and a first voltage. The reference current generator generates the first voltage and a reference voltage in response to an output signal of the OP amp. The temperature detection voltage generator generates a temperature detection voltage in response to an ambient temperature and the output signal of the OP amp. The comparator compares the reference voltage with the temperature detection voltage to generate a temperature control signal. The band gap reference voltage generator generates the band gap reference voltage. Accordingly, the temperature detection circuit of the present invention can perform high or low temperature detection stably in supply voltage and temperature variations and thus protect the operation of the integrated circuit.

Abstract: The temperature compensated threshold circuit includes: a positive trip point circuit 60 for providing a positive trip point when an input voltage PSM is higher than a positive supply voltage VCC; a negative trip point circuit 62 for providing a negative trip point when the input voltage PSM is below a negative supply voltage AGND; and a bias circuit 64 for providing to the positive and negative trip point circuits 60 and 62 a first current proportional to absolute temperature and a second current proportional to a base emitter voltage.

Abstract: A circuit configured to match an impedance of a first pin and a second pin coupled to a transmission line. A first resistor is generally coupled to the first pin and a second resistor is generally coupled to the second pin. The first and second resistors may be coupled to a common node to provide an output voltage level independent of process corner and temperature variation.

Abstract: A system and method for temperature-compensated small signal peak detection. A small amplitude signal peak detector includes an exponential operator for generating a modulated signal through the application of an exponential function to the input signal. The peak detector also includes an averaging circuit for obtaining the average value of the modulated signal and an inverting offset stage for inverting the signal and removing an offset component. The resulting signal is directly proportional to the peak value of the input signal. The peak detector further includes a temperature compensation circuit for canceling the temperature-dependent effects introduced by the exponential operator and averaging means. The temperature compensation circuit is a thermistor with temperature-dependent characteristics matched to the temperature-dependent characteristics of the circuit when operated without a temperature compensation circuit.

Abstract: A circuit for biasing an FET, comparing a gate bias voltage of the FET with a reference voltage at an operational amplifier and performing closed-loop control on the gate bias voltage of the FET with the output of the operational amplifier. The temperature characteristics of the mutual conductance of the FET is compensated by setting the temperature characteristics of one or both of two voltage dividing resistors. Variations in a drain bias current due to input signal level and temperature changes can be suppressed. The circuit at the gate and the circuit at the drain are separate, making possible class A, class AB, and class B operations. The voltage drop at the gate resistor can be ignored so that the gate resistor can be designed with priority given to stability of the RF characteristics.

Abstract: The comparator includes a differential stage having a first input and a second input, an output stage in which the output is zero when the two inputs have therebetween a specific voltage difference, and a biasing stage providing a first biasing voltage and a second biasing voltage for respectively creating a second input voltage and a first input voltage respectively in the second and first inputs such that the two input voltages have therebetween the specific voltage difference. A method for forming the same includes steps of a) providing the differential stage, b) providing the output stage and c) providing the biasing stage which has a characteristic dependent on a manufacturing parameter such that the specific voltage difference is independent of the manufacturing parameter.

Abstract: A low voltage reset circuit device without being influenced by temperature and manufacturing process is formed by a first low voltage reset circuit using an energy gap circuit to generate a reference voltage, and a second low voltage reset circuit using a threshold voltage of a MOS transistor as a reference voltage. The first low voltage reset circuit is used to provide an accurate low voltage reset property,. while the circuit only works as VDD>1.2V. When VDD<1.2V, the second low voltage reset circuit still works normally for providing the desired reset signal thereby covering the low VDD voltage range.

Abstract: An LVDS (Low Voltage Differential Signal) driver circuit having low sensitivity to fabrication process variation, power supply noise voltage variation, and operating temperature variation (PVT). The LVDS driver circuit includes a predriver having an input coupled to an internal circuit. The predriver is coupled to a current source. The current source includes a first resistance and is configured to produce a reference current through the first resistance. The reference current is coupled to the predriver to control an output swing of the predriver, the output swing determined by a ratio of the first resistance and a second resistance in the predriver. The ratio of the first and second resistance is such that the output swing is constant across PVT. An output driver is coupled to the predriver to receive the output swing. The output driver has an output for coupling an output signal to an external circuit.