Abstract: A demodulator for demodulating a modulated signal has a peak detector (206) with an input (100) coupled to receive the modulated signal and an output (207) to supply a peak detector output signal. The peak detector has a charge storer (314) coupled to the peak detector output so that the peak detector output signal is provided by a voltage across the charge storer (314) and a comparator (313) having a first comparator input coupled to the peak detector input to receive the modulated signal and a second comparator input coupled to the peak detector output to receive the peak detector output signal. The comparator (313) provides a comparison signal representing a comparison between the voltage of the modulated signal and the peak detector output signal.

Abstract: A frequency demodulator of the present invention includes: an amplification section for receiving a frequency-modulated signal and amplifying the frequency-modulated signal based on a gain so as to produce a digital signal having a predetermined level and an inverted signal of the digital signal; a digital demodulation section for receiving the digital signal and frequency-demodulating the digital signal; an amplitude detection section for receiving the digital signal and the inverted signal of the digital signal, and detecting maximum amplitude values of the digital signal and the inverted signal for a predetermined period of time so as to produce an amplitude signal in proportion to the maximum values; and a gain controlling section for varying the gain based on the amplitude signal.

Abstract: A pulse counting FM demodulator includes a differentiating circuit that differentiates an FM intermediate-frequency signal to produce a differentiated pulse signal. A trigger signal is generated based on the differentiated pulse signal and is used to control the charging and discharging of a capacitor that is included in a monostable multivibrator. The charging and discharging of the capacitor provides an output level inverting operation. A variable current source supplies the capacitor with a charging current that is varied in response to an externally supplied control voltage, and an output circuit provides a demodulated output signal having a level corresponding to the output level inverting operation in the monostable multivibrator.

Abstract: An integrated circuit includes a demodulator having delay circuitry and demodulation control circuitry that may be fully formed within a common integrated circuit. The delay circuitry receives an input signal and generates a delayed input signal. The demodulation control circuitry generates a demodulated output based upon the input signal and the delayed input signal that has a level that is proportional to, or a finction of, a period of a respective cycle of the input signal. The demodulation control circuitry includes pulse generation circuitry, pulse delay circuitry, pulse conversion circuitry and sampling circuitry. The pulse generation circuitry generates a signal pulse based upon the input signal and the delayed input signal with a duration that is proportional to at least one period of the input signal. The pulse delay circuitry generates a delayed signal pulse based upon the signal pulse.

Abstract: Frequency modulated signals are demodulated through a limiter circuit that chops the signal to give pulses whose occurrence frequency is proportional to the instant frequency of the received signal. The invention is devoted to a new processing of those pulses. The leading edges of the pulses are time integrated. The obtained signal is then as usual, low pass filtered to give the demodulated signal. The main advantage of this new processing is that the circuit that makes this processing does not implement delay lines and can then be made as a single chips.

Abstract: A receiver having, arranged in this order, an input section, an FM demodulator, to which a frequency-modulated input signal is applied, and an LF section, which FM demodulator includes a pulse shaper and a low-pass filter, the pulse shaper comprising a series arrangement of at least a load and a capacitance, the base-emitter junction of a transistor being arranged across the capacitance, and further including a switching device for charging and discharging the capacitance. The pulse shaper generates a low-noise pulse in that charging of a capacitance is started upon an edge of the input signal. The capacitance voltage is measured by a single transistor and when the transistor is turned on, the charging current of the capacitance is diverted via the transistor, so that the capacitance voltage is limited. The capacitance is discharged upon a second edge, after which the cycle is repeated. The output signal of the pulse shaper is a signal which varies with the current through the capacitance.

Abstract: An FM or PM signal is demodulated so that the cycle time of the modulated input signal is measured using a time-to-digital converter comprising a counter that uses a moderate clock frequency as a reference clock, a digital delay line interpolator and a control circuitry. The counter is used for rough digitization and the delay line for interpolating the moment of zero-crossing inside a clock cycle. Total delay of the delay line, i.e., the range of time intervals the interpolator is able to measure, is actively kept equal to the cycle time of the reference clock. When the number of delay elements in the delay line is a power of two, the result of the delay line interpolator may be used directly as the least significant bits of the measurement.

Abstract: For an integratable FM demodulator which has an optimal noise behavior and does not require any balancing, the demodulator includes a marker pulse generator (2) having an integrator (22) which is succeeded by a comparator (23), while at the start of each positive and/or negative edge of the limited FM signal, a marker pulse is started and one of a first and second reference signals is applied to the integrator input until a predetermined edge of the reference clock signal appears, and the first and a second reference signals are subsequently applied alternately to the integrator input in dependence upon a reference clock signal applied to the marker pulse generator, the two reference signals being applied to the integrator input during the desired period of time of the marker pulse, each time during equal overall time intervals, and a comparison voltage occurring at the integrator output at the end of the desired period of time, which comparison voltage is detected by the comparator (23), whereupon the starte

Abstract: A frequency demodulation circuit disclosed superposes pulses on an input frequency-modulated (FM) signal at substantially peaks of the FM signal before demodulating the FM signal so that zero cross points of the FM signal can be correctly restored. A peak detection circuit detects peaks of the FM signal or peaks of the fundamental wave of the FM signal, which substantially correspond to the peaks of the FM signal. A pulse generating circuit generates, from the peak detection result, a train of pulses respectively occurring at the same timings as those of the detected peak occurrance timings. The generated train of pulses and the FM signal are respectively fed to differential inputs of a differential input type limiter. An output signal of the limiter is fed to a pulse count circuit to obtain a frequency demodulated signal.

Abstract: An FM signal demodulator for converting the frequency of an input signal to a corresponding voltage. The demodulator includes a delay circuit responsive to the input signal for delaying the phase of the input signal by a fixed time, an exclusive-OR gate responsive to the input signal and the delayed phase signal from the delay circuit for outputting a pulse signal having a duration corresponding to the fixed time and an LPF responsive to the pulse signal for generating an output signal having a level which changes in response to changes in the frequency of the input signal.