Modulator-demodulator-type Amplifier Patents (Class 330/10)
  • Patent number: 11923813
    Abstract: A pulse width modulated (PWM) amplifier includes a synchronization logic circuit having a first input configured to receive a bridge control signal and having a second input configured to receive a clock signal. The synchronization logic circuit is configured to provide a slope switch signal and a reference switch signal. The PWM amplifier includes a ramp generator having a first input configured to receive a first voltage supply and having a second input configured to receive a second voltage supply and having a third input configured to receive the reference switch signal and having a fourth input configured to receive the slope switch signal. The ramp generator is configured to provide a ramp signal having a first slope responsive to the slope switch signal in a first state and having a second slope responsive to the slope switch signal in a second state and to provide the clock signal.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: March 5, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shaik Asif Basha, Mohit Chawla, Jasjot Singh Chadha
  • Patent number: 11906993
    Abstract: A feedforward correction block for use in a multi-level output system may include circuitry configured to determine an occurrence of a mode transition between operating modes of the multi-level output system, capture a loop filter output of a signal path of the multi-level output system occurring before and after the occurrence of the mode transition, and based on the transition and a change in the loop filter output responsive to the transition, determine a transition-specific compensation function to apply to a feedforward input signal of the signal path that is combined with the loop filter output.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: February 20, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Thomas H. Hoff
  • Patent number: 11881821
    Abstract: This disclosure relates to a signal generating circuit and an audio processing device. The circuit includes a switch module, a voltage producing module, and a signal generating module; the switch module is connected to the voltage producing module, including at least one control switch, and is used for receiving a frequency division signal. Based on the frequency division signal, the at least one control switch is turned on or turned off; the voltage producing module is separately connected to the switch module and the signal generating module and used for producing a first voltage and a second voltage. The at least one control switch controls the first voltage and the second voltage to change. The signal generating module is connected to the voltage producing module and used for generating a carrier signal with the same frequency as the frequency division signal according to the received first and second voltages.
    Type: Grant
    Filed: April 28, 2019
    Date of Patent: January 23, 2024
    Assignee: SPREADTRUM COMMUNICATIONS (SHENZHEN) CO., LTD.
    Inventors: Junliang Shi, Jianping Cheng, Mengzhang Li, Wenxian Lu
  • Patent number: 11876493
    Abstract: A hybrid class-H/predictive class-G switching amplifier architecture and techniques for amplifying a signal (e.g., an audio signal) using such an architecture. One example method of amplification generally includes delaying an input signal to generate a delayed version of the input signal, amplifying the delayed version of the input signal with an amplifier powered by a boost converter, and selectively controlling the boost converter to operate in at least one of a predictive class-G mode or a class-H mode, based on a magnitude of the input signal.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: January 16, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Subbarao Surendra Chakkirala, Sherif Galal, Earl Schreyer
  • Patent number: 11876525
    Abstract: An apparatus comprises circuitry configured to generate a predicted error signal by applying to a digital signal a distortion model characterized by parameters configured to model circuit component mismatches in a digital-to-analog converter (DAC), circuitry configured to generate a pre-compensated digital signal using the digital signal and the predicted error signal, and circuitry configured to provide the pre-compensated digital signal to the DAC for conversion into an analog signal.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: January 16, 2024
    Assignee: Ciena Corporation
    Inventors: Ramin Babaee, Shahab Oveis Gharan, Martin Bouchard
  • Patent number: 11870400
    Abstract: A class-D amplifying system includes: a first digital-to-analog converter (DAC), a class-D amplifier circuit and a second DAC. The first DAC generates an analog input signal according to a digital input signal. The class-D amplifier circuit generates an output signal according to the analog input signal in a pulse width modulation (PWM) manner. The second DAC generates a common mode (CM) adjustment current for adjusting a CM voltage of the analog input signal according to one or more of the following parameters: (1) the CM voltage of the analog input signal; and/or (2) a driving power. A power stage circuit of the class-D amplifier circuit is powered by the driving power. The second DAC determines which parameter the CM adjustment current is correlated to according to: (A) A level state of the output signal; and/or (B) A level state of a PWM signal of the class-D amplifier circuit.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: January 9, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventor: Yi-Kuang Chen
  • Patent number: 11857341
    Abstract: Disclosed herein are devices and methods of using a mobile or wearable device for the acquisition and spatial filtering of ECG signals from an electrode array. One variation of a mobile or wearable device comprises an array of electrodes, one or more reference electrodes, and a controller in communication with the electrodes. In one example, the one or more reference electrodes are located on a wrist-worn device (e.g., a watch), and the electrode array is located on an accessory device that may be contacted with a fingertip. One variation of a spatial filtering method comprises identifying the electrodes that have high levels of noise and excluding the ECG signals from those electrodes from further analyses. In another variation, a method of spatial filtering comprises identifying electrodes with low levels of noise and including only the ECG signals from those electrodes in further analyses.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: January 2, 2024
    Assignee: Apple Inc.
    Inventors: Johannes Anne Bruinsma, Erno H. Klaassen, Paras Samsukha, Xiaoyu Guo
  • Patent number: 11863135
    Abstract: A Class D power amplification modulation system for self-adaptive adjustment of an audio signal is provided, including an amplification circuit module, a pulse width modulation (PWM) circuit module connected to the amplification circuit module, a frequency detection circuit module, a carrier generator module connected to the frequency detection circuit module, an amplitude detection circuit module, a direct current (DC) potential adjustment module connected to the amplitude detection circuit module, and a drive circuit module. A method, a device, a processor, and a computer-readable storage medium are also provided. The characteristics of the circuit in the signal time domain and frequency are improved by simultaneously controlling the amplitude and the frequency of the audio signal, to minimize power consumption of signals with different amplitudes and frequencies, and to improve EMI performance, or to balance the circuit power consumption and EMI characteristics.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: January 2, 2024
    Assignee: CRM ICBG (WUXI) CO., LTD.
    Inventors: Xu Zhou, Hangjuan Jia, Dianjun Zhang, Fan Yang
  • Patent number: 11855592
    Abstract: A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output and include a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: December 26, 2023
    Assignee: Cirrus Logic Inc.
    Inventor: John L Melanson
  • Patent number: 11855659
    Abstract: An isolator of embodiments includes a ?? analog-digital converter configured to convert an analog signal into a digital signal of one bit and transmit the digital signal of one bit as normal data, a time direction multiplexing circuit configured to perform time direction multiplexing of alternately performing conversion of the normal data into a digital differential signal and transmission of the digital differential signal, and transmission of a special signal different from the normal data, and an insulated transmission circuit configured to transmit the digital differential signal and the special signal transmitted from the time direction multiplexing circuit via an insulating layer.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: December 26, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Masaki Nishikawa, Shoji Ootaka
  • Patent number: 11847556
    Abstract: Numerous examples of a precision programming apparatus are disclosed for precisely and quickly depositing the correct amount of charge on the floating gate of a non-volatile memory cell within a vector-by-matrix multiplication (VMM) array in an artificial neural network. In one example, a neuron output circuit for providing a current to program as a weight value in a selected memory cell in a vector-by-matrix multiplication array is disclosed, the neuron output circuit comprising a first adjustable current source to generate a scaled current in response to a neuron current to implement a positive weight, and a second adjustable current source to generate a scaled current in response to a neuron current to implement a negative weight.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: December 19, 2023
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Steven Lemke, Vipin Tiwari, Nhan Do, Mark Reiten
  • Patent number: 11848651
    Abstract: A switching amplifier system with a power supply, a pulse modulator configured to modulate an input signal into a pulse width modulation signal, a switching stage configured to generate an amplified output signal, and an error feedback signal configured to correct errors in the amplified output signal, where the input signal is comprised of at least one of an analog signal and a digital signal. A method of signal amplification comprising generating, by a pulse width modulator, a pulse width modulation signal, combining, by a switching stage, the input signal and the pulse width modulation signal to form an amplified output signal, and generating, by the switching stage, an error feedback signal, where the error feedback signal is configured to correct errors in the amplified output signal, and where the input signal is comprised of at least one of an analog signal and a digital signal.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: December 19, 2023
    Assignee: ADX Research, Inc.
    Inventors: Pallab Midya, Adip Kumar Dutta, Uma Ekambaram Iyer
  • Patent number: 11837999
    Abstract: An audio amplifier employs an idle mode to reduce power consumption and improve efficiency of the amplifier. The audio amplifier comprises a modulator configured to receive an analog input signal. The modulator is operable to convert the analog input signal to differential first and second quantized signals, each having a common mode duty cycle. The modulator causes the common mode duty cycle of each of the first and second quantized signals to be shifted when the level of the analog input signal is below a threshold level so that the common mode duty cycle is one of greater than or less than fifty percent (50%). The amplifier further includes a power stage that receives the first and second quantized signals and generates corresponding first and second output signals configured to drive a load, wherein the first and second output signals switched between a supply voltage and a second voltage based on the respective first and second quantized signals.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 5, 2023
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Rajdeep Mukhopadhyay, Euan Murphy, Matt Felder, Simon Quinn
  • Patent number: 11810911
    Abstract: A monolithic component includes a field-effect power transistor and at least one first Schottky diode inside and on top of a gallium nitride substrate.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: November 7, 2023
    Assignees: STMICROELECTRONICS APPLICATION GMBH, STMICROELECTRONICS (TOURS) SAS
    Inventors: Mathieu Rouviere, Arnaud Yvon, Mohamed Saadna, Vladimir Scarpa
  • Patent number: 11811369
    Abstract: Systems and methods for calibrating a wireless power transmitter is described. A wireless power transmitter can include a controller and an amplifier module. The amplifier module can include an amplifier configured to amplify a voltage converted from a current proportional to power consumed by a wireless power transmitter, and a circuit connected to the amplifier. The circuit can be configured to receive a control signal from the controller. The circuit can be further configured to perform time division multiplexing on an output of the amplifier according to the control signal. A time division multiplexed output of the amplifier can include calibration data of the amplifier. The amplifier can be configured to output the time division multiplexed output to the controller.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: November 7, 2023
    Assignee: Renesas Electronics America Inc.
    Inventors: Gustavo James Mehas, Marcin Kamil Augustyniak, Giovanni Figliozzi
  • Patent number: 11804814
    Abstract: A digital audio playback circuit includes a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: October 31, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Stilgenbauer, Paolo Cacciagrano, Giovanni Gonano
  • Patent number: 11799426
    Abstract: Class D amplifier circuitry comprising: input buffer circuitry configured to receive a first digital input signal modulated according to a first modulation scheme in which the digital input signal can take a first plurality N of discrete signal levels; analog modulator circuitry configured to generate an analog modulated signal based on an analog output signal output by the input buffer circuitry; and quantizer circuitry configured to generate an output signal based on the analog modulated signal, wherein the output signal is modulated according to a second modulation scheme in which the output signal can take a second plurality M of discrete signal levels, wherein the second plurality M is greater than the first plurality N.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: October 24, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Johnny Klarenbeek, David P. Singleton, Morgan T. Prior, Jonathan T. Wigner, Christopher M. Dougherty, Qi Cai, Anindya Bhattacharya
  • Patent number: 11783696
    Abstract: A tool for performing diagnostics on a fire detection system includes an induction coil which includes two halves that may be selectively opened and closed to surround a wire in the system and sense current through the wire. A diagnostic module and a conduit provide communication of data of the sensed current between the induction coil and the diagnostic module. The diagnostic module is configured to decode the data to interpret communications sent through the wire.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: October 10, 2023
    Assignee: Carrier Corporation
    Inventors: Michael Lawrence Golob, Juan F. Posada, Dennis Michael Gadonniex
  • Patent number: 11777494
    Abstract: A level shift transistor of a first conductivity type configured to level shift a signal from a primary side circuit to a secondary side circuit between the primary side circuit having a primary side reference potential as reference and the secondary side circuit having a secondary side reference potential independent from the primary side reference potential as reference, a diode connected in a forward direction between a first main electrode of the level shift transistor and the secondary side circuit, a capacitor connected in parallel to the diode, and an inverter configured to invert the signal are provided. A control electrode of the level shift transistor is connected to a primary side power supply of the primary side circuit, and a second main electrode thereof is connected to an output of the inverter. The inverter operates between the primary side reference potential and the primary side power supply.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: October 3, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuta Tsukuma, Hiroshi Yoshida
  • Patent number: 11777415
    Abstract: An amplifier system may include at least one input source, a converter configured to provide voltage rails to an amplifier, the voltage rails including a first voltage rail and a second voltage rail, a MOSFET arranged at a secondary side of the system at the first voltage rail, a second MOSFET arranged at the first voltage rail, a third MOSFET arranged at the second voltage rail, a fourth MOSFET arranged at the second voltage rail; and, a first capacitor arranged at the first voltage rail and a second capacitor arranged at the second voltage rail, the first and forth MOSFETS are configured to operate simultaneously with one another and the second and third MOSFETs are configured to operate simultaneously with one another and opposite of the first and fourth MOSFETs so as to allow synchronous rectification so that the first and second capacitors reciprocally and mutually exclusively charge and discharge.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: October 3, 2023
    Assignee: Harman International Industries, Incorporated
    Inventors: Matthew Ryan Parnell, Nathan Richard Dort
  • Patent number: 11764742
    Abstract: A switching amplifier comprises a controller, configured to receive an input signal and a reference signal, and to generate a control signal according to the input signal and the reference signal; a pulse-width modulation (PWM) modulator, coupled to the controller, configured to generate a PWM signal according to the input signal and the control signal; a power management unit, coupled to the controller, configured to receive a power supply and the control signal, and to provide an adaptive supply voltage according to the power supply and the control signal; and a switching power stage, coupled to the power management unit and the PWM modulator, configured to generate an output signal according to the PWM signal and the adaptive supply voltage.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: September 19, 2023
    Assignee: National Cheng Kung University
    Inventor: Tai-Haur Kuo
  • Patent number: 11764741
    Abstract: A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an input of the analog integrator, and a calibration system. The calibration system may be configured to force the input of the analog integrator to a fixed known input value, force the amplifier output to a fixed known duty cycle, measure an analog signal generated at the output of the analog integrator in response to forcing the input of the analog integrator to the fixed value, determine an offset of the switched mode amplifier system based on the analog signal, and correct for the offset.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: September 19, 2023
    Assignee: Cirrus Logic Inc.
    Inventor: John L. Melanson
  • Patent number: 11742808
    Abstract: A nuclear magnetic resonance (NMR) power supply system and method are disclosed. The architecture adopts a two-stage topology to reduce the required capacitance by over ten times, leading to a four-fold improvement in power density. The first stage is an isolated converter that only supplies average power, therefore input filter and transformer sizes can be reduced. The second stage is a fast response DC-DC converter followed by a RF transmitter to produce a pulsed RF signal, so that the mid-point voltage after the first stage can be allowed to droop considerably, leading to much smaller sized capacitors. These and other embodiments enforce the isolated converter to only transfer average power, which reduces the power rating and the volume of the system's transformer.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: August 29, 2023
    Assignee: University of Houston System
    Inventors: Harish S. Krishnamoorthy, Yu Yao
  • Patent number: 11728805
    Abstract: Circuits for protecting devices, such as gallium nitride (GaN) devices, and operating methods thereof are described. The circuits monitor a magnitude of the current in a device and reduce the magnitude of the current and/or shut down the device responsive to the magnitude of the current exceeding a threshold. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: August 15, 2023
    Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
    Inventors: Cristiano Bazzani, Damian McCann
  • Patent number: 11706565
    Abstract: An apparatus for amplifying an audio source includes a speaker and a chip. The chip includes a processor configured to generate a signal and an amplifier element configured to amplify the signal into an amplified signal. The chip further includes a current monitor configured to monitor the current of the amplified signal prior to the amplified signal being output from the chip to the speaker and a voltage monitor configured to monitor the voltage of the amplified signal prior to the amplified signal being output from the chip to the speaker. The processor of the chip is configured to control a power of the amplified signal output from the chip to the speaker based at least on the current and the voltage.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: July 18, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventor: Marshall Chiu
  • Patent number: 11698393
    Abstract: The present disclosure provides a current detection circuit for a loudspeaker 500, comprising a first detection resistor RSP, a second detection resistor RSN, a sampling selection circuit 100, an input selection circuit 200, and a processing circuit 300. By adding the sampling selection circuit 100 and the input selection circuit 200, voltages on two ends of the corresponding detection resistors (RSP, RSN) are sampled according to the fact that potential differences of an output stage VOP and an output stage VON of a class-D audio power amplifier 400 are in different semi-periods, and the current of the loudspeaker 500 is obtained through processing, thereby detecting the current of the loudspeaker 500 without adding an anti-clipping distortion function to the class-D audio power amplifier 400.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: July 11, 2023
    Assignee: SHANGHAI AWINIC TECHNOLOGY CO., LTD
    Inventors: Zhifei Yang, Haijun Zhang, Wei Yao, Liming Du, Jiantao Cheng
  • Patent number: 11689655
    Abstract: A method for adjusting a parameter of an audio service and a terminal includes obtaining, by the terminal, first information, where the first information includes at least one of a first battery level or a first temperature, and adjusting, by the terminal, a parameter of an audio service of the terminal when a first condition is met, where the first condition includes one or more of the first battery level is less than a first preset threshold or greater than a second preset threshold, or the first temperature is less than a third preset threshold or greater than a fourth preset threshold.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: June 27, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jianhua Feng, Jianting Feng, Shi Zhang, Hongjun Zhao
  • Patent number: 11689165
    Abstract: An adaptive sample and hold circuit for signal amplifier range selection is presented. The adaptive sample and hold circuit has an input for receiving an input signal and an output for providing a sample-and-hold-voltage. It also includes a sample-and-hold-capacitor to generate the sample-and-hold-voltage from the input signal, and a range detector. The range detector is adapted to identify a range of the input signal and to adjust a voltage at the sample-and-hold-capacitor based on the range of the input signal to maintain the sample-and-hold-voltage within a predetermined voltage span.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: June 27, 2023
    Assignee: Dialog Semiconductor B.V.
    Inventor: Anthony Gribben
  • Patent number: 11646707
    Abstract: An analog front end circuit with pulse width modulation current compensation comprises sensing a current condition and determining if the current condition is a positive or negative current condition. An appropriate control signal is determined according to the current condition and sent to turn on a positive current electronic switch if the current condition is a negative current condition or sent to turn on a negative current electronic switch if the current condition is a positive current condition. A positive compensation current flows to offset negative parasitic current when the positive current electronic switch is turned on and a negative compensation current flows to offset positive parasitic current when the negative current electronic switch is turned on. A master control unit utilizes pulse width modulation signals of various widths associated with various current conditions to be sent to turn on the positive electronic switch or the negative electronic switch.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: May 9, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventor: Yen-Cheng Cheng
  • Patent number: 11632040
    Abstract: An assembly for powering a first circuit, including at least one ferrite bead in series with a diode between a first terminal of application of a first voltage and a first terminal of said first circuit.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: April 18, 2023
    Assignee: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventor: Guillaume Lefevre
  • Patent number: 11606642
    Abstract: The application describes a switched driver (401) for outputting a drive signal at an output node (402) to drive a load such as a transducer. The driver receives respective high-side and low-side voltages (VinH, VinL) defining an input voltage at first and second input nodes and has connections for first and second capacitors (403H, 403L). A network of switching paths is configured such that each of the first and second capacitors can be selectively charged to the input voltage, the first input node can be selectively coupled to a first node (N1) by a path that include or bypass the first capacitor, and the second input node can be selectively coupled to a second node (N2) by a path that includes or bypasses the second capacitor. The output node (402) can be switched between two switching voltages at the first or second nodes. The driver is selectively operable in different operating modes, where the switching voltages are different in each of said modes.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: March 14, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Anthony S. Doy, Eric J. King
  • Patent number: 11601101
    Abstract: A switching power amplifier includes logic circuitry that generates first and second components of a differential signal, based on received amplitude code and a delayed version of the same. The amplitude code includes a sign and a magnitude. When the sign is positive, a first logic path is configured to generate the first component based on the received amplitude code and the second logic path is configured to generate the second component based on the delayed amplitude code. When the sign is negative, the first logic path is configured to generate the first component based on the delayed amplitude code and the second logic path is configured to generate the second component based on the received amplitude code. The switching power amplifier further includes a differential-to-single ended conversion circuit configured to generate a single-ended signal based on the differential signal.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: March 7, 2023
    Assignee: Apple Inc.
    Inventors: Utku Seckin, Hanwen Yang
  • Patent number: 11588444
    Abstract: A method for powering an audio amplifier includes receiving an input audio signal in an audio signal processor, delaying the input audio signal in the audio signal processor to generate a delayed audio signal, predicting a power demand estimate by analyzing the input audio signal to calculate the power demand estimate in the audio signal processer, and selecting, by the audio signal processor, power conversion settings for a DC to DC converter on the basis of the power demand estimate. The method further includes supplying power input to the DC to DC converter, converting the power input in accordance with the power conversion settings to provide a power output, powering the audio amplifier using the power output, and supplying the delayed audio signal to the audio amplifier from the audio signal processor to generate an amplified audio signal.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: February 21, 2023
    Assignee: TYMPHANY ACOUSTIC TECHNOLOGY LIMITED
    Inventor: Ruben Minoru Tuemp Millyard
  • Patent number: 11588471
    Abstract: Examples of amplifiers and nth-order loop filters thereof are configured to enable fast and robust recovery from saturation, while limiting signal distortion at or near full power delivery across multiple process and temperature corners. An example nth-order loop filter comprises n series-coupled resistor-capacitor (RC) integrators. In an example, each of the second RC integrator to the (n?1)th RC integrator has a reset mechanism responsive to a reset signal output from a reset controller when an input signal overload condition is detected at the input. Upon detecting the overload condition, each of the third RC integrator to the (n?1)th RC integrator is hard reset, the nth RC integrator is not reset, and a controlled reset is performed on the second RC integrator to recover from saturation caused by the signal overload condition, while maintaining the output signal below the 1% total harmonic distortion (THD) level at or near full power delivery.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: February 21, 2023
    Assignee: Texas Instruments Incorporated
    Inventor: Venkata Ramanan Ramamurthy
  • Patent number: 11581995
    Abstract: Provided are a frame configuring unit configured to configure a frame using a plurality of orthogonal frequency-division multiplexing (OFDM) symbols, by allocating time resources and frequency resources to a plurality of transmission data, and a transmitter which transmits the frame. The frame includes a first period in which a preamble which includes information on a frame configuration of the frame is transmitted, a second period in which a plurality of transmission data are transmitted by time division, a third period in which a plurality of transmission data are transmitted by frequency division, and a fourth period in which a plurality of transmission data are transmitted by time division and frequency division.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: February 14, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Yutaka Murakami, Tomohiro Kimura, Mikihiro Ouchi
  • Patent number: 11575353
    Abstract: An audio amplifier system is described herein, comprising: an amplifier adapted to amplify an audio signal and comprising an output enable/disable input, the amplifier further adapted to receive an output enable signal at the output enable/disable input that enables/disables an output of the amplifier; a Zobel network connected to the output of the audio amplifier and comprising a Zobel capacitor and a Zobel resistor arranged such that they form a high pass frequency filter function and wherein the Zobel network is adapted to be substantially resistive when a frequency of an audio signal output from the audio amplifier is within a first frequency range; a mirroring resistor connected in parallel to the Zobel resistor and adapted to mirror a power that is dissipated in the Zobel resistor, and wherein a printed circuit board upon which the mirroring resistor is located is adapted to conduct heat generated by the mirroring resistor; a negative temperature coefficient (NTC) resistor located in close proximity to
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: February 7, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 11575354
    Abstract: An audio amplifier that implements current mode control without the use of an explicit or separate current mode sensor is disclosed. The audio amplifier may include a pair of feedback loops that provide current from a node located before an inductor of an output filter and current from a node located after the inductor of the output filter to an integrator circuit. The integrator circuit may be formed from existing circuitry of the audio amplifier controller. Thus, current mode control can be implemented without a separate current mode sensor.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: February 7, 2023
    Assignee: RGB Systems, Inc.
    Inventor: Eric Mendenhall
  • Patent number: 11562888
    Abstract: A power supply system controls the source impedance of a generator utilizing two amplifiers having asymmetrical power profiles in reference to a nominal load impedance that are diametrically opposite in reference to the nominal load impedance. Variations in power profiles may be achieved by using different topologies for each of the amplifiers or implementing a phase delay network. The output power from the first and second amplifiers may be combined using a combiner circuit or device and the output power from the combiner is transmitted to a plasma load. The output power of each amplifier may be independently controlled to alter one or more characteristics of the output power signal provided by the individual amplifiers. By changing the ratio of the output power of the first amplifier to the output power of the second amplified, the source impedance of the generators may be varied.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: January 24, 2023
    Assignee: Advanced Energy Industries, Inc.
    Inventors: Gennady G. Gurov, Michael Mueller, Zebulun Whitman Benham
  • Patent number: 11557999
    Abstract: A control method includes sequentially updating a next cycle pulse width modulation command for each of an upper switch and lower switch of a phase leg of a power converter according to an order defined by timing of a rising edge of the next cycle pulse width command for one of the switches relative to a rising edge of a previous cycle pulse width command for the one of the switches.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: January 17, 2023
    Assignee: Ford Global Technologies, LLC
    Inventors: Xuemei Sun, Jiyao Wang
  • Patent number: 11552609
    Abstract: The present disclosure relates to amplifier circuitry (300) that includes a linear amplifier stage (110) that receives an input signal and outputs a first drive signal to an output node (302) and a switching amplifier stage (130) operable to output a second drive signal to the output node (302). A controller (340) is selectively operable in a first dual-amplifier mode, in which switching of the switching amplifier stage is controlled based on a current of the first drive signal, such that the current of the first drive signal does not exceed a first current threshold magnitude; and at least one other mode, in which the controller controls the switching amplifier stage such that the current of the first drive signal may exceed the first current threshold magnitude. The controller (340) selectively controls the mode of operation based on an indication (SSL) of signal level of the output signal.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: January 10, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John P. Lesso
  • Patent number: 11546709
    Abstract: An audio system includes an H-bridge. The audio system implements one or more techniques for ensuring a transistor within the H-bridge does not turn on in the event of the detection of a short-circuit on the output of the H-bridge. Other transistors within the H-bridge can turn and thus audio can still be played to a speaker.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: January 3, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Mohit Chawla
  • Patent number: 11545941
    Abstract: A power control system for audio power amplifiers, especially in the automotive segment, dynamically controlling the output voltage through the reading of the input and output currents, and other parameters, automatically adjusting the amplifier to the load and to the operation conditions, allowing that the amplifier always operates within the safe operation range.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: January 3, 2023
    Inventor: Jose Mazini Tarifa
  • Patent number: 11539336
    Abstract: An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: December 27, 2022
    Assignee: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Nan Sun, Xiyuan Tang
  • Patent number: 11525875
    Abstract: In one aspect, a magnetic field sensor includes a plurality of tunneling magnetoresistance (TMR) elements that includes a first TMR element, a second TMR element, a third TMR element and a fourth TMR element. The first and second TMR elements are connected to a voltage source and the third and fourth TMR elements are connected to ground. Each TMR element has a pillar count of more than one pillar and the pillar count is selected to reduce the angle error below 1.0°.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: December 13, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Rémy Lassalle-Balier, Pierre Belliot, Christophe Hoareau, Jean-Michel Daga
  • Patent number: 11519754
    Abstract: Isolated circuit systems are provided. The systems include a primary side circuit and a secondary circuit, electrically isolated from each other. The primary side and secondary side circuits each utilize a direct current (DC) reference signal. The primary side circuit may use the DC reference signal in a modulation operation. The secondary side circuit may use the DC reference signal in a demodulation operation. The DC reference signal may be sent from the primary side circuit to the secondary side circuit, or from the secondary side circuit to the primary side circuit.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: December 6, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Wenhui Qin, Shaoyu Ma, Tianting Zhao, Fang Liu
  • Patent number: 11522507
    Abstract: Various techniques are provided to reduce common mode disturbance associated with an amplifier, such as a class D amplifier. In one example, an amplifier includes a power stage configured to generate first and second PWM signals. The amplifier further includes an integration stage comprising input nodes configured to receive an input differential analog signal. The integration stage is configured to generate an output differential analog signal in response to the PWM signals and the input differential analog signal. The amplifier further includes an active compensation circuit configured to provide a compensation signal to the integration stage to reduce disturbances at the input nodes associated with the PWM signals switching between a common mode and a differential mode. Additional devices, systems, and methods are also provided.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: December 6, 2022
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Dan Shen, Jinbao Lan, Yunfu Zhang, Lorenzo Crespi
  • Patent number: 11516605
    Abstract: An audio device includes a network interface, an amplifier that amplifies an audio signal received through the network interface, and a processor configure to obtain an output value of a signal from the amplifier and sends the output value of the signal through the network interface.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: November 29, 2022
    Assignee: YAMAHA CORPORATION
    Inventor: Mitsutaka Goto
  • Patent number: 11500406
    Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: November 15, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Ramin Zanbaghi, Eric Kimball
  • Patent number: 11489499
    Abstract: A switch circuit provides a first output signal and a second output signal for switching between ternary modulation and quaternary modulation for a target device. A first output signal is provided from one of a first signal, a second signal and a ground signal according to an input signal and a duty signal, wherein the first signal is generated through performing a one-bit left-shift operation for the input signal, and the second signal is generated through adding the input signal and the duty signal. A second output signal is provided from one of a third signal, a fourth signal and the ground signal according to the input signal and the duty signal, wherein the third signal is generated through subtracting the input signal from the duty signal, and the fourth signal is generated through performing a two's-complement transformation and the one-bit left-shift operation for the input signal.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: November 1, 2022
    Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
    Inventors: Tsung-Fu Lin, Hsin-Yuan Chiu
  • Patent number: 11489498
    Abstract: An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: November 1, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Chandra Prakash, Cory J. Peterson, Eric Kimball