Modulator-demodulator-type Amplifier Patents (Class 330/10)
  • Patent number: 11070178
    Abstract: A class D power amplifier with novel design is provided. The amplifier includes an input stage, a periodic signal generator, a comparator, a power output stage, and a boost circuit. The input stage is coupled to a first supply voltage. The periodic signal generator generates a periodic signal and a reference signal. The power output stage is coupled to a second supply voltage. The boost circuit compares an output of the input stage with the reference signal, and thereby adjusts a value of the second supply voltage. The value of the second supply voltage is larger than a value of the first supply voltage. The reference signal is proportional to an amplitude of the periodic signal, and the amplitude of the periodic signal is determined by the value of the second supply voltage.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: July 20, 2021
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventor: Shao-Ming Sun
  • Patent number: 11070179
    Abstract: An apparatus measures a speaker impedance. A DAC converts a known digital input signal to an audio frequency first analog voltage signal. Resistors with known resistance attenuate the first analog voltage signal to generate a current. The known resistance effectively determines the current because the known resistance is high relative to the speaker impedance. The current is sourced into the speaker to generate a second analog voltage signal. The known resistance is sufficiently high to cause the second analog voltage signal to be inaudible as transduced by the speaker. An amplifier amplifies the second analog voltage signal with a known gain to generate a third analog voltage signal. An ADC converts the third analog voltage signal to a digital output signal. A processing element calculates the impedance of the speaker proportional to the digital output signal based on the known digital input signal, the known resistance, and the known gain.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: July 20, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Frank Cheng, Ruoxin Jiang, Zhong You
  • Patent number: 11062650
    Abstract: A sensing circuit of a display device is provided. The sensing circuit includes a chopper circuit, a first operational amplifier and a filter. The chopper circuit is configured to receive a sensing input signal of the display device and modulate the sensing input signal. The first operational amplifier is coupled to the chopper circuit. The first operational amplifier is configured to receive the modulated sensing input signal and output the modulated sensing input signal to the chopper circuit. The chopper circuit is further configured to demodulate the modulated sensing input signal from the first operational amplifier and output the demodulated sensing input signal. The filter is coupled to the chopper circuit. The filter is configured to filter the demodulated sensing input signal from the chopper circuit and output the filtered sensing input signal as a sensing output signal. A source driver including the sensing circuit is also provided.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: July 13, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Yuan Chang, Feng-Lin Chan
  • Patent number: 11063566
    Abstract: An RF module with improved testing capabilities is provided. The module has a first switch with signal outputs and an additional auxiliary connection connected to an auxiliary terminal. The auxiliary terminal can be connected to an RF filter while a power amplifier is decoupled from the filter.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: July 13, 2021
    Assignee: Snaptrack, Inc.
    Inventors: Miguel Angel Falagan Bobillo, Andreas Detlefsen
  • Patent number: 11057010
    Abstract: Embodiments of a power amplifier and method of operating a power amplifier are disclosed. In one embodiment, a power amplifier includes a pulse wave modulation (PWM) controller, a first power control stage configured to drive a first output between VDD and VSS in response to a control signal from the PWM controller, a second power control stage configured to drive a second output between VDD and VSS in response to a control signal from the PWM controller, and a mid-voltage control circuit configured to hold the voltage of the first output at a mid-voltage that is between VDD and VSS during an interval between when the first output is driven between VDD and VSS and hold the voltage of the second output at the mid-voltage during an interval between when the first output is driven between VDD and VSS.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: July 6, 2021
    Assignee: NXP B.V.
    Inventors: Ghiath Al-kadi, Erich Merlin, Ulrich Neffe, Ludovic Oddoart
  • Patent number: 11057009
    Abstract: A switching power amplifier includes logic circuitry that generates first and second components of a differential signal, based on received amplitude code and a delayed version of the same. The amplitude code includes a sign and a magnitude. When the sign is positive, a first logic path is configured to generate the first component based on the received amplitude code and the second logic path is configured to generate the second component based on the delayed amplitude code. When the sign is negative, the first logic path is configured to generate the first component based on the delayed amplitude code and the second logic path is configured to generate the second component based on the received amplitude code. The switching power amplifier further includes a differential-to-single ended conversion circuit configured to generate a single-ended signal based on the differential signal.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: July 6, 2021
    Assignee: Apple Inc.
    Inventors: Utku Seckin, Hanwen Yang
  • Patent number: 11050390
    Abstract: An amplifier circuit includes, a first transistor and a first resistor connected in series between a power supply voltage and an output terminal. A second transistor and a second resistor are connected in series between the output terminal and a ground reference voltage. There is a first operational amplifier and a second operational amplifier. A first detection current corresponding to a voltage drop across first resistor is generated. A second detection current corresponding to a voltage drop across the second resistor is generated. A first replication circuit subtracts the second detection current from the first detection current. A third resistor conducts the current obtained by subtracting the second detection current from the first detection current.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: June 29, 2021
    Assignees: KABUSHI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takaya Yasuda, Kazuyasu Minami
  • Patent number: 11047890
    Abstract: A method of determining a phase misalignment between a first signal generated from a first signal path and a second signal generated from a second signal path may include obtaining multiple samples of the first signal proximate to when the first signal crosses zero wherein the first signal can be approximated as linear; obtaining multiple samples of the second signal proximate to when the second signal crosses zero wherein the first signal can be approximated as linear; based on the multiple samples of the first signal, approximating a first time at which the first signal crosses zero; based on the multiple samples of the second signal, approximating a second time at which the second signal crosses zero; and determining the phase misalignment between the first signal and the second signal based on a difference between the first time and the second time.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: June 29, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Gautham S. Sivasankar, Tejasvi Das, Emmanuel Marchais, Amar Vellanki, Leyi Yin, John L. Melanson, Venugopal Choukinishi
  • Patent number: 10998868
    Abstract: An RF signal generation device includes an RF signal generation unit 102 that pulse-modulates a prescribed signal to generate an output signal in which four or more-level discrete output levels appear and that a lowest level and any other level appear alternately; a code converter 91 that converts the output signal from the RF signal generation unit 102 into an RF signal in which a smaller number of levels than the number of levels in the output signal; a driver unit 203 that converts the RF signal from the code converter 91 into a binary signal comprising plural bits in which bits corresponding to signal levels in the RF signal are significant; and a digital amplifier 303 that outputs a voltage corresponding to levels in the RF signal outputted from the code converter 91, on the basis of an output signal from the driver unit 203.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: May 4, 2021
    Assignee: NEC CORPORATION
    Inventor: Tatsuya Soma
  • Patent number: 10972061
    Abstract: A Class-D amplifier having a low power dissipation mode includes first and second independent output stages that receive respective first and second level power supply voltages for driving a load coupled to the amplifier output during respective first and second operating modes. Bypass switches are controllable to disconnect the second output stage from the output during the first operating mode and to connect the second output stage to the output during the second operating mode. The operating modes are selected based on the amplifier output power level. First and second independent pre-driver stages receive the respective first and second level power supply voltages for driving the respective first and second independent output stages. During the second operating mode the first pre-driver stage is placed into a low power dissipation state and during the first operating mode the second pre-driver stage is placed into a low power dissipation state.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: April 6, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Zhaohui He, Rahul Singh, Ruoxin Jiang
  • Patent number: 10965253
    Abstract: Systems and methods are provided for improved noise performance of audio amplifiers. In one example, a system includes a multistage amplifier comprising at least a first stage amplifier and a second stage amplifier. The system further includes a plurality of switches disposed within the multistage amplifier to configure the multistage amplifier. The system further includes a control signal configured to control the multistage amplifier to a normal amplification mode or a mute state, wherein the multistage amplifier is adapted to amplify an input signal in the normal amplification mode, the multistage amplifier is adapted to output a zero signal in the mute state, and internal amplification stages of the multistage amplifier are disabled in the mute state, and output stages of each of the at least first stage amplifier and the second stage amplifier are electrically shorted and/or shorted to a fixed bias voltage in the mute state.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: March 30, 2021
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Dan Shen, Balakishan Challa, Lorenzo Crespi
  • Patent number: 10965263
    Abstract: In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: March 30, 2021
    Assignee: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
    Inventors: Ru Feng Du, Qi Yu Liu
  • Patent number: 10955527
    Abstract: A radar system includes a transmitter circuit, which transmits a radar wave having a chirp frequency gradually increasing or decreasing to a target, and a frequency conversion circuit, which demodulates a signal of the radar wave reflected at the target by frequency-conversion in correspondence to the chirp frequency. A radar signal processor includes a variable amplifier connected to an output side of the frequency conversion circuit, and a feedback circuit which detects an output of the variable amplifier as a detection signal and feeds back a signal of a frequency band included in the detection signal to an input of the variable amplifier. The feedback circuit is configured to cut off and not cut off a frequency band including a DC offset transient response frequency, which occurs at time of frequency conversion by the frequency conversion circuit, during a specified period and a period other than the specified period, respectively.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: March 23, 2021
    Assignee: DENSO CORPORATION
    Inventors: Tomotoshi Murakami, Nobumasa Hasegawa, Yoshiyuki Utagawa
  • Patent number: 10951204
    Abstract: A digital pulse width modulation driver system and method can include: receiving input digital data with a digital signal processing chip on a device; converting the input digital data into pulse width modulated data; generating an amplitude signal with the digital signal processing chip; transmitting the amplitude signal and the pulse width modulated data from a transmit interface within the device to a receive interface within an analog driver chip; and amplifying the pulse width modulated data with a driver coupled to a high voltage rail based on the amplitude signal corresponding to the high voltage rail, or amplifying the pulse width modulated data with the driver coupled to a low voltage rail based on the amplitude signal corresponding to the low voltage rail.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: March 16, 2021
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Simon Kenneth Quinn, Ross William Ballany, Rajdeep Mukhopadhyay, Sergei Slavnov
  • Patent number: 10931242
    Abstract: An error amplifier for a pulse width modulation circuit is described. The amplifier includes an operational amplifier configured as an integrator and a feedback loop coupled between a signal output of the operational amplifier and an inverting input of the operational amplifier. The feedback loop comprises a feedback capacitor coupled to the signal output, a feedback resistor coupled to the feedback capacitor, and an integrator resistor coupled to the feedback resistor and the inverting input of the operational amplifier. A junction between the feedback resistor and the integrator resistor is configured to receive an input signal and a junction between the feedback capacitor and the feedback resistor is configured to receive a feedback signal from the pulse width modulation circuit.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: February 23, 2021
    Assignee: Reid Acoustic Designs Ltd.
    Inventor: Laurence Reid
  • Patent number: 10911010
    Abstract: A class-D amplifier according to an embodiment includes a PWM modulator, a first output transistor group that includes two transistors complementarily operating and includes a first connection point between the two transistors as an output terminal, a second output transistor group that includes two transistors complementarily operating and includes a second connection point between the two output transistors as an output terminal, and a selector configured to selectively provide a PWM pulse signal to one of the first output transistor group and the second output transistor group. A system that includes the second output transistor group, a low-pass filter, and a load connected to the low-pass filter configures a series resonance circuit.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: February 2, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Takafumi Kiyono
  • Patent number: 10892877
    Abstract: A user equipment transmits a first wireless signal and transmits a second wireless signal; the first wireless signal is generated by a first sequence; the first wireless signal is used to determine a first time interval; the first time interval is a time interval between a first and a second time instant; the first time instant is a starting time instant at which a transmitter of the first wireless signal transmits the first wireless signal; the second time instant is a starting time instant at which a transmitter of the second wireless signal transmits the second wireless signal; the first time instant is earlier than the second time instant; the second wireless signal occupies a first wireless resource; the first wireless resource is one of J candidate wireless resources; the first time interval is used to determine the first wireless resource out of the J candidate wireless resources.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: January 12, 2021
    Assignee: SHANGHAI LANGBO COMMUNICATION TECHNOLOGY COMPANY LIMITED
    Inventor: XiaoBo Zhang
  • Patent number: 10862431
    Abstract: The present disclosure relates to an envelope tracking (ET) amplification architecture, which includes a power amplifier (PA) block configured to amplify a radio frequency (RF) input signal and provide an RF output signal, and an ET voltage block configured to provide modulated voltages to the PA block as power supplies. Herein, the modulated voltages are provided based on a configuration of the PA block and from one pulsed ramp signal, which contains envelope information of the RF input signal. The modulated voltages are eligible to have at least one of a time delay difference, an amplitude difference, and a phase difference.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: December 8, 2020
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10862442
    Abstract: In a Class-D amplifier, first/second ratios and first/second RC time constants are sequentially matched by trimming. An integrator is coupled to differential first/second paths. The first/second ratios are of a feedback resistor to an input resistor in the first/second paths. R's of the first/second RC time constants are the resistors of the first/second matched ratios. C's of the first/second RC time constants are integrating capacitors in the first/second path. For each of multiple power rails, a ramp amplitude is determined based on a sensed voltage. Concurrently, the driver stage is switched from first to second power rails and quantizer switched from first to second ramp amplitudes to achieve constant combined quantizer/driver stage gain. Based on a sensed load current, an IR drop is determined for a respective output impedance of the driver stage and added to a loop filter output to compensate for the respective output impedance.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 8, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Zhaohui He, Rahul Singh, Ruoxin Jiang
  • Patent number: 10833575
    Abstract: In one embodiment, a controller for a power supply may be configured to operate as a quasi-resonant controller while operating in a discontinuous current mode and to operate as one of a pulse width or pulse frequency modulation controller while operating in a continuous current mode. The controller may have an embodiment that varies a frequency of the switching drive signal around a center frequency while operating in the continuous current mode, and varies a value of a current sense signal but not vary the frequency of the switching drive signal around a center frequency while operating in the discontinuous current mode.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: November 10, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Martin Podzemny, Vaclav Peroutka
  • Patent number: 10826374
    Abstract: A circuit for controlling a power converter includes a pulse generator generating a first pulse signal and a second pulse signal in response to an input signal, the first pulse signal being asserted at a given time interval or thereafter after the input signal has been de-asserted, a level-shift circuit shifting a level of the first pulse signal to generate a first shifted signal and to shift a level of the second pulse signal to generate a second shifted signal, a logic circuit controlling a first-side switching device in response to the first and second shifted signals, and an output node outputting an output signal. The first-side switching device is coupled to a second side-switching device at the output node.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: November 3, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kinam Song, Wonhi Oh, Jinkyu Choi, JunHo Lee
  • Patent number: 10818223
    Abstract: An organic light emitting display device includes an organic light emitting device, a first thin film transistor which is connected in series with the organic light emitting device between a first driving source line supplying a first driving source and a second driving source line supplying a second driving source lower than the first driving source, and second and third thin film transistors which are connected in series with each other between a first node between the first thin film transistor and the organic light emitting device and a data line supplying a data signal. The number of the drive control signals supplied to respective pixels in this organic light emitting display device can be reduced, thereby preventing a bezel from being widened due to a gate drive unit embedded in a display panel.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: October 27, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Jaesung Yu
  • Patent number: 10804332
    Abstract: A display, a circuit arrangement for a display and a method of operating a display are disclosed. In an embodiment a display includes a voltage supply and a plurality of pixels. Each pixel includes a given number of light emitters, the light emitters being arranged in parallel electric lines with a light emitter per electric line, wherein the voltage supply is adapted to provide an electric voltage to each of the parallel electric lines. Each electric line comprises a current control element, wherein the current control element of an electric line is configured to control an electric current flowing through the light emitter arranged in the electric line.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: October 13, 2020
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Anant Aggarwal, Alireza Safaee
  • Patent number: 10797659
    Abstract: According to an aspect, an audio amplifier includes a first sigma-delta modulator configured to receive a digital audio signal and generate a first multi-level output signal based on the audio signal, and a second sigma-delta modulator configured to receive the first multi-level output signal from the first sigma-delta modulator and generate a second multi-level output signal. The second multi-level output signal has a number of levels less than a number of levels of the first multi-level output signal.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: October 6, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIED, LLC
    Inventor: Christian Venanzi Caduff
  • Patent number: 10797651
    Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: October 6, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Lei Zhu, Ku He, Vamsikrishna Parupalli
  • Patent number: 10797652
    Abstract: A DC-to-DC converter block with multiple supply voltages includes a power circuit, the power circuit including N depletion-mode HEMT transistors (T3_1, T3_2, T3_N), N being a natural number greater than or equal to 3. The DC-to-DC converter block also includes a gate drive circuit for the N depletion-mode HEMT transistors (T3_1, T3_2, T3_N) of the power circuit, the drive circuit including depletion-mode HEMT transistors (T1_1, T2_1, T1_2, T2_2, T1_N, T2_N) configured to drive the gates of the N depletion-mode HEMT transistors (T3_1, T3_2, T3_N) of the power circuit, and the power circuit being powered by N positive and non-zero supply voltages, namely a lower supply voltage (VDD_1), an upper supply voltage (VDD_N), and (N?2) intermediate supply voltages (VDD_2) distributed between the lower (VDD_1) and upper (VDD_N) supply voltages.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: October 6, 2020
    Assignee: WUPATEC
    Inventors: Emmanuel Gatard, Pierre Lachaud
  • Patent number: 10784827
    Abstract: Embodiments provide a power management system for a battery-powered audio device. The system includes bi-directional power conversion and control circuitry to implement a corresponding control scheme. The system may be switchable between a charge mode, during which the power conversion and control circuitry charges the battery of the audio device and the AC/DC adapter provides an amplifier supply voltage to one or more amplifiers of the audio device, and a discharge mode, in which the power conversion and control circuitry may provide a regulated amplifier supply voltage to the one or more amplifiers that is regulated based on one or more operating conditions of the system. The system may provide reduced cost and reduced power consumption and reduced size compared with prior systems.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: September 22, 2020
    Assignee: THX LTD.
    Inventor: Andrew John Mason
  • Patent number: 10778160
    Abstract: A circuit for stabilizing a Class-D audio amplifier having a loop bandwidth modulator configured to modulate a loop bandwidth of the amplifier as a function of one or more control signals, a tuned output filter terminator coupled to a low-pass filter and configured to provide stabilizing control feedback to loop bandwidth modulator, and a carrier injection system configured to provide a wide range fixed frequency operation. Also, a method of stabilizing a feedback network within a Class-D amplifier by providing a first feedback loop coupling an output of a PWM logic stage of the amplifier to an input circuit of the amplifier, providing a second feedback loop coupling an output of a switching output stage of the amplifier to the input circuit, and providing a third feedback loop coupling an output of a low-pass filter of the amplifier to the input circuit.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Dolby Laboratories Licensing Corporation
    Inventor: Joel A Butler
  • Patent number: 10771047
    Abstract: This application relates to time-encoding modulators (TEMs). A TEM (100) receives an input signal (SIN) and outputs a time encoded signal (SPWM). A comparator (101) is located within a forward signal path of a feedback loop of the TEM. Also in the feedback loop are a filter (104) and a delay element (106) for applying a controlled delay. In some embodiments a latching element (101, 302; 106, 402) is located within the forward signal path to synchronise any signal transitions output from the latching element to a received first clock signal. Any signal transitions in the output (SOUT) from the modulator are thus synchronised to the first clock signal. In some embodiments the delay element (106) is a digital delay element which is synchronised to the first clock signal.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: September 8, 2020
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 10763803
    Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: September 1, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Edoardo Botti, Tommaso Barbieri, Davide Luigi Brambilla, Cristiano Meroni
  • Patent number: 10763799
    Abstract: An amplifier comprises: an input stage, a pulse width modulation stage, and a switched output stage. During operation, the input stage receives an input signal (such as an audio signal). The input stage adjusts the input signal based on feedback from the switched output stage of the amplifier. According to one configuration, the feedback from the switched output stage is a voltage across a flying capacitor disposed in the switched output stage. The pulse width modulation stage uses the adjusted input signal or signals to produce respective pulse width modulation signals that are subsequently used to drive (control) switches in the switched output stage. The switches in the switched output stage generate an output voltage to drive a load based on states of the pulse width modulation signals. Adjustments applied to the input signal based on the feedback maintains the magnitude of the flying capacitor voltage at a desired setpoint.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 1, 2020
    Assignee: Infineon Technologies Austria AG
    Inventor: Mikkel Hoyerby
  • Patent number: 10734955
    Abstract: An audio amplifier of a BTL (Bridged Tied Load) type, includes a first amplifier, a second amplifier, a first output pin connected to an output of the first amplifier, a second output pin connected to an output of the second amplifier, a first monitor pin, a second monitor pin, a current source connected to the first monitor pin and configured to be switched on and off, a switch interposed between the second monitor pin and a fixed voltage line, and a load state determination circuit configured to detect a state of a load based on a potential difference between the first monitor pin and the second monitor pin.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: August 4, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Yuji Saegusa, Keita Okamoto
  • Patent number: 10727792
    Abstract: A vacuum tube and transistor amplifier natural sound field tone dividing system includes: a front-end circuit for receiving and processing an input signal to thereby generate an audio signal; a transistor power amplifying circuit connected to the front-end circuit and adapted to process a low-frequency signal in the audio signal and play the low-frequency signal with a first player; and a vacuum tube power amplifying circuit connected to the front-end circuit and adapted to process a medium-frequency signal and a high-frequency signal in the audio signal, play the medium-frequency signal with a second player, and play the high-frequency signal with a third player, wherein the transistor power amplifying circuit and the vacuum tube power amplifying circuit are independent of each other.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 28, 2020
    Assignee: ECHOWELL ELECTRONIC CO., LTD.
    Inventor: Hsi-Hsien Chen
  • Patent number: 10715092
    Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: July 14, 2020
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
  • Patent number: 10707850
    Abstract: A method of calibrating a delay generation circuit and the corresponding circuit.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: July 7, 2020
    Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Greenfield Technology
    Inventors: Gérard Billiot, Franck Badets, Dominique Monnier-Bourdin, Bernard Riondet
  • Patent number: 10701693
    Abstract: An electronic apparatus includes a radio communication unit employing a WiGig method and a radio communication unit employing a Wi-Fi method. A bias T circuit is included in the radio communication unit employing the WiGig method. The bias T circuit includes inductors and a filter. The inductors are disposed between a signal line and a DC-DC converter, and are connected in series to each other. The filter has attenuation characteristics in a frequency band used by the radio communication unit employing the Wi-Fi method. One end of the filter is connected between the signal line and one of the inductors located at a first stage from the signal line.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: June 30, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yu Ishiwata, Yoshihiro Imanishi, Kiyomi Ikemoto, Kota Takayama
  • Patent number: 10700551
    Abstract: An inductive wireless power transfer device includes a primary winding assembly and a secondary winding assembly separated from the primary winding assembly by a distance. A first magnetic core cap is on the primary winding assembly and a second magnetic core cap is on the secondary winding assembly so as to magnetically couple together the primary winding assembly and the secondary winding assembly. A multi-section high voltage (HV) isolator is interposed between the primary winding assembly and the secondary winding assembly. The multi-section HV isolator includes at least one individual insulator section comprising a dielectric material, and at least one intermediate magnetic core comprising a ferrite material interposed between the primary winding assembly and the secondary winding assembly.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: June 30, 2020
    Assignee: RAYTHEON COMPANY
    Inventors: Boris S. Jacobson, Lev Volfson, Sara Lorene Makowiec
  • Patent number: 10700643
    Abstract: This disclosure provides systems, methods and apparatuses for characterizing and operating a power amplifier. Before being placed into operation, output phase and output gain characteristics of the power amplifier may be determined over various operating conditions including varying two independent control signals and a supply voltage. The output phase and output gain characteristics may be stored for later retrieval. The power amplifier may be operated by determining a control signal profile for the two independent control signals based on operating conditions and radio-frequency (RF) envelope information associated with an input signal received by the power amplifier. The independent control signals may be generated in accordance with the control signal profile.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: June 30, 2020
    Assignee: QUALCOMM Incorporated
    Inventor: Chenliang Du
  • Patent number: 10686408
    Abstract: The present invention relates to a four-way Doherty amplifier. The invention further relates to a mobile telecommunications base station. The invention proposes a new Doherty combiner topology that allows peak efficiencies to be reached at deeper back-off levels than conventional Doherty combiners.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: June 16, 2020
    Assignee: Ampleon Netherlands B.V.
    Inventor: Xiaochuan Jiang
  • Patent number: 10675477
    Abstract: An apparatus has advanced amplifier Classes and low pass filter technologies for using software generated ascending or level waveforms that are effective when applying cardiac defibrillation and cardioversion waveforms which significantly reduce damage to the heart muscle. The apparatus comprises a waveform energy control system for delivering software generated waveforms comprising differentially driven Class D and Class B amplifier sections, wherein the Class D amplifier section produces Phase 1 ascending waveforms and has a programmable lowpass filter (LPF) and wherein the Class B amplifier section delivers hard-switched Phase 2 waveforms.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: June 9, 2020
    Assignee: RUSE TECHNOLOGIES, LLC
    Inventors: Raymond E. Ideker, Richard Ruse, Scott Bohanan
  • Patent number: 10677858
    Abstract: To downsize a magnetic sensor by reducing the number of terminals of the magnetic sensor. A magnetic sensor to detect a magnetic field is provided, including: a drive terminal; a first output terminal; a second output terminal; and a magnetic sensing unit in which a first conduction path through which a driving current flows between the drive terminal and the first output terminal and a second conduction path through which a driving current flows between the drive terminal and the second output terminal are formed integrally. The magnetic sensing unit may have a first extending unit extending to the first output terminal and a second extending unit extending to the second output terminal.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: June 9, 2020
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Takahisa Shikama, Takaaki Furuya
  • Patent number: 10673392
    Abstract: A digital amplifier includes a pulse-width adjustment circuit that adjusts the pulse width of a digital signal, a switching circuit that amplifies the output signal of the pulse-width adjustment circuit, and a feedback signal generator that generates a feedback signal based on the output signal of the switching circuit.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: June 2, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tsuyoshi Nakahira, Akihiro Nishigaki
  • Patent number: 10673397
    Abstract: An operational amplifier includes an output node; an output stage, comprising a plurality of output current paths and a plurality of control nodes, wherein the plurality of control nodes are respectively coupled to the plurality of output current paths, and the plurality of output current paths are coupled to the output node and respectively coupled to a plurality of power supply sources providing different voltages; and a selecting unit, configured to couple an internal output node of the operational amplifier to one of the plurality of control nodes of the output stage.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: June 2, 2020
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Jhih-Siou Cheng, Tzong-Honge Shieh
  • Patent number: 10666210
    Abstract: A power tube driver of a class-D audio amplifier includes high-side and low-side fixed charge/discharge gate driving circuits, high-side and low-side power tubes, a dead time generation circuit based on gate voltage detection, high-side and low-side gate charge/discharge accelerating circuits, and high-side and low-side gate voltage detection circuits. The class-D audio amplifier with the features of low radiation interference, and high efficiency, linearity and robustness can be balanced easily.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: May 26, 2020
    Assignee: SI EN TECHNOLOGY (XIAMEN) LIMITED
    Inventor: Chunhui Ye
  • Patent number: 10658981
    Abstract: Circuits and methods for achieving high linearity, high efficiency power amplifiers, including digital predistortion (DPD) and pulse cancellation in switched-state RF power amplifier systems are described.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: May 19, 2020
    Assignee: Eta Devices, Inc.
    Inventors: Mark A. Briffa, Joel L. Dawson, John E. DeRoo, Krenar Komoni, David J. Perreault, Oguzhan Uyar
  • Patent number: 10659028
    Abstract: The present invention is in the field of programmable pulse width modulator (PWM) controller comprising filters and a mixer, such as for use in a digital audio converter and digital amplifier controller, a chip comprising said PWM controller, a device comprising said PWM controller or said chip, as well as uses thereof.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: May 19, 2020
    Assignee: AXIGN B.V.
    Inventor: Daniel Schinkel
  • Patent number: 10651801
    Abstract: Resistor mismatch may be digitally compensated based on a known resistor mismatch, power supply information, and/or other operating parameters of the amplifier. The digital compensation may be applied to the digital input signal before conversion for processing and amplification in the analog domain. An amplifier with digital compensation for resistor mismatch may be used in a class-D amplifier with a closed loop and feedforward feedback. A class-D or other amplifier with digital compensation may be integrated with electronic devices such as mobile phones.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: May 12, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Lei Zhu, Xin Zhao, John L. Melanson
  • Patent number: 10644656
    Abstract: A wideband, frequency agile, radio frequency digital-to-analog converter (RF-DAC) based phase modulator includes first, second, and third RF-DACs, each configured to upconvert an input I/Q digital baseband signal pair to a local oscillator (LO) frequency but with the first RF-DAC being driven by a first set of LO clocks, the second RF-DAC being driven by a second set of LO clocks that is forty-five degrees out of phase with respect to the first set of LO clocks, and the third RF-DAC being driven by a third set of LO clocks that is a further forty-five degrees out of phase with respect to the second set of LO clocks. First, second, and third upconverted analog signals produced by the first, second, and third RF-DACs are combined to reinforce the fundamental LO component while canceling 3rd-order and 5th-order LO harmonics.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: May 5, 2020
    Assignee: Technische Universiteit Delft
    Inventors: Leonardus Cornelius Nicolaas de Vreede, Seyed Morteza Alavi, Mohammedreza Mehrpoo, Mikhail Evgenyevich Polushkin, Mohsen Hashemi, Yiyu Shen
  • Patent number: 10630240
    Abstract: An amplifier includes a power amplifier that amplifies an input signal, a VI detection circuit that is connected to a rear stage of the power amplifier to detect power of an output signal of the power amplifier, and a controller that turns on the power amplifier when the input signal is inputted to the power amplifier, turns off the power amplifier when the input signal is not inputted to the power amplifier, and turns on the power amplifier when the VI detection circuit detects a voltage that exceeds a predetermined value when the power amplifier is in off state.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: April 21, 2020
    Assignee: YAMAHA CORPORATION
    Inventor: Mitsutaka Goto
  • Patent number: 10630177
    Abstract: Various methods and devices that involve power converter with stable feedback are disclosed. A disclosed power converter comprises an input node on an input side of the power converter and an output node on an output side of the power converter. The power converter also comprises a switch coupled to the input node and having a control node, a feedback path between the output node and the control node, and a first circuit block on the feedback path with a multipath feedback active filter. The first circuit block is at least partly defined by a pure bandpass transfer function.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: April 21, 2020
    Assignee: Silanna Asia Pte Ltd
    Inventor: Barry S. Arbetter