Phase Shift Means In Loop Path Patents (Class 330/107)
  • Patent number: 10693508
    Abstract: Various embodiments disclosed herein provide for a low complexity transmitter structure for active antenna arrays by reducing the number of digital predistortion extraction loops that need to be performed. Digital predistortion (DPD) corrects any non-linearities in a power amplifier. By determining which power amplifiers have similar characteristics in an array, and thus may use similar predistortion coefficients, once the DPD coefficients are determine for one of the grouped power amplifiers, DPD can be performed on each of the grouped power amplifiers based on the DPD coefficients.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: June 23, 2020
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventor: SaiRamesh Nammi
  • Patent number: 10658988
    Abstract: A signal processing system may include a modulation stage configured to generate a modulated input signal, an open-loop switched mode driver coupled to the modulation stage and configured to generate an output signal from the modulated input signal, a voltage regulator configured to generate a supply voltage that supplies electrical energy to the open-loop switched mode driver, and a control subsystem configured to, when a magnitude of the modulated input signal falls below a threshold magnitude, control the voltage regulator to control the supply voltage such that the output signal varies non-linearly with the modulated input signal for magnitudes of the modulated input signal below the threshold magnitude.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: May 19, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Miao Song, Xiaofan Franky Fei, Xin Zhao, Tejasvi Das, Lei Zhu, Jing Bai, Alan Mark Morton
  • Patent number: 10644374
    Abstract: Power combiners having increased output power, such as may be useful in millimeter-wave devices. The power combiner comprise at least two channels, wherein each channel comprises a phase alignment circuit, wherein the phase alignment circuit comprises a first differential input subcircuit comprising a first inverter and a second inverter, and a second differential input subcircuit comprising a third inverter and a fourth inverter, wherein the first inverter, the second inverter, the third inverter, and the fourth inverter each comprise a PMOS transistor and an NMOS transistor each having an adjustable back gate bias voltage. By adjusting the back gate bias voltage, the phases of the signal through each channel may be aligned, which may increase the output power of the power combiner. Methods of increasing output power of such power combiners. Systems for manufacturing devices comprising such power combiners.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: May 5, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang, Abdellatif Bellaouar
  • Patent number: 10608600
    Abstract: Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: March 31, 2020
    Assignee: Analog Devices, Inc
    Inventors: Ralph D. Moore, Jesse Bankman
  • Patent number: 10566940
    Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: February 18, 2020
    Assignee: StMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Alberto Cattani, Germano Nicollini, Alessandro Gasparini
  • Patent number: 10560054
    Abstract: A circuit system including an operational amplification circuit is disclosed. The operational amplification circuit includes N stages of operational amplification units that are cascaded, an input terminal of the 1st stage of operational amplification unit is an input terminal of the operational amplification circuit, and an output terminal of the Nth stage of operational amplification unit is an output terminal of the operational amplification circuit; an output terminal of the ith stage of operational amplification unit is connected to an input terminal of the (i+1)th stage of operational amplification unit, so as to provide an input signal for the (i+1)th stage of operational amplification unit; and there is a feedback channel from the output terminal of the Nth stage of operational amplification unit to an input terminal of each of the 1st stage of operational amplification unit to the Nth stage of operational amplification unit.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: February 11, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Ding Li, Shuai Du, Yixing Chu
  • Patent number: 10536160
    Abstract: A pipelined analog-to-digital converter includes: a first switched capacitor network, a first digital-to-analog converter, a second switched capacitor network, a second digital-to-analog converter, and an operational amplifier. The outputs from the first switched capacitor network and the first digital-to-analog converter form a first subtraction signal. The outputs from the second switched capacitor network and the second digital-to-analog converter form a second subtraction signal. The operational amplifier is arranged to operably generate an output signal based on the first subtraction signal or the second subtraction signal, and to operably switch coupling relationship of multiple candidate capacitors of the operational amplifier based on the magnitude of an input signal of a prior stage circuit, so that only a portion of the multiple candidate capacitors could be participated in the generation of the output signal at a time.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: January 14, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chih-Lung Chen, Shih-Hsiung Huang, Chien-Ming Wu, Jie-Fan Lai
  • Patent number: 10530381
    Abstract: An operational amplifier includes: a first gain stage for generating a second signal based on a first signal transmitted from a prior stage circuit; a second gain stage for generating an output signal based on the second signal; multiple candidate capacitors; and a capacitor selection circuit for switching the coupling relationship of the multiple candidate capacitors based on the magnitude of an input signal of the prior stage circuit, so that only a portion of the multiple candidate capacitors could be coupled to the second gain stage at a time.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: January 7, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Jie-Fan Lai, Chih-Lung Chen, Shih-Hsiung Huang, Chien-Ming Wu
  • Patent number: 10511274
    Abstract: A traveling wave amplifier includes two input-side lines, two output-side lines, and amplification cells. The amplification cells each include a first input terminal, a second input terminal, a first transistor including a base connected to the first input terminal and a collector connected to one output-side line, a second transistor including a base connected to the second input terminal and a collector connected to the other output-side line, a current source connected to an emitter of each of the two transistors, a first series circuit connected between the collector of the second transistor and the base of the first transistor and including a capacitor and a resistor, and a second series of circuit connected between the collector of the first transistor and the base of the second transistor and including a capacitor and a resistor.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: December 17, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taizo Tatsumi
  • Patent number: 10503222
    Abstract: A method for temperature mitigation includes receiving a signal from a temperature sensor that is disposed within a computing device. A processor chip within the computing device produces heat. The signal from the temperature sensor is converted to temperature data. The method further includes processing the temperature data to generate an estimate of a temperature of an external surface of the device. The processing includes applying a low pass filter to the temperature data, applying an amplitude attenuation to the temperature data, and applying a delay to the temperature data. The method further includes reducing an operating parameter of the processor chip, such as operating frequency, in response to the estimated temperature of the external surface of the device.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: December 10, 2019
    Assignee: Qualcomm Incorporated
    Inventors: Arpit Mittal, Mehdi Saeidi, Farsheed Mahmoudi
  • Patent number: 10498486
    Abstract: An apparatus includes a demapper to compute a reliability metric associated with a number of bit streams received by multiple radio-frequency (RF) antennas. The apparatus further includes a channel decoder in a feedback loop with the demapper to process the reliability metric and to provide a feedback signal to the demapper. The demapper is an iterative demapper and can use a symbol subset of at least a first stream of the plurality of bit streams and the feedback signal to compute the reliability metric for a second stream of the plurality of bit streams.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: December 3, 2019
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Daniel Stopler, Rethnakaran Pulikkoonattu, Roy Oren, Ilan Reuven, Amir Eliaz
  • Patent number: 10478337
    Abstract: A system for performing an ocular surgical procedure is provided. The system includes a multiple frequency signal source, a configurable tuned output filter connected to the multiple frequency signal source, and a multiple frequency ultrasonic handpiece. The multiple frequency signal source operates at a first frequency and is configured to drive the configurable filter and the multiple frequency ultrasonic handpiece at the first frequency. The multiple frequency signal source operates at a second frequency and is configured to drive the configurable filter and the multiple frequency ultrasonic handpiece at the second frequency, and the design addresses third harmonic frequency issues for the multiple frequency ultrasonic handpiece. Switchable passive components, such as inductors, resistors, and/or capacitors may be employed in the configurable tuned output circuit, or alternately multiple similar circuits may be employed. Alternately, a multi-tap transformer may be provided.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: November 19, 2019
    Assignee: Johnson & Johnson Surgical Vision, Inc.
    Inventors: Rob Raney, David A. King, David A. Greenbaum
  • Patent number: 10469098
    Abstract: Integrator circuits comprising switched capacitors, non-switched capacitors, and an op amp. One embodiment is directed to an integrator circuit comprising an op amp having an inverting input, a non-inverting input, an inverting output and a non-inverting output, a first sampling capacitor and a first feedback capacitor, and a first non-switched capacitor. The first feedback capacitor is coupled between the inverting input and the non-inverting output of the op amp, and the first non-switched capacitor is coupled between the negative integrator input and the inverting input of the op amp. During a sampling phase, a positive integrator input is coupled to the first sampling capacitor, and during an integration phase, a charge sampled across the first sampling capacitor during the sampling phase is transferred to the first integration capacitor.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 5, 2019
    Assignee: Omni Design Technologies Inc.
    Inventors: Hae-Seung Lee, Denis Daly
  • Patent number: 10461734
    Abstract: This invention discloses an active load generation circuit and a filter. The active load generation circuit includes a transistor, a voltage control circuit, a voltage offset and tracking circuit, and a temperature sensing circuit. The transistor provides an impedance and includes a control terminal and an input terminal. The control terminal receives a control voltage, the input terminal receives an input signal, and the impedance is associated with the control voltage. The voltage control circuit generates an intermediate voltage according to a power supply voltage and a first reference voltage. The voltage offset and tracking circuit generates the control voltage according to the input signal and the intermediate voltage such that the control voltage varies with the input signal. The temperature sensing circuit senses an ambient temperature of the active load generation circuit and adjusts the first reference voltage according to the ambient temperature.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: October 29, 2019
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Wei-Cheng Tang, Kuohsi Wu
  • Patent number: 10404221
    Abstract: An amplifier circuit that includes a first amplifier that has a first input that receives an input signal, a second input and an output. The amplifier circuit also includes a second amplifier that has a first input that is coupled to the output of said the amplifier and a second input. The circuit further includes a first impedance network Z1, a second impedance network Z2, a third impedance network Z3 and a fourth impedance network Z4. The first impedance network Z1 is coupled to a load and the second input of the second amplifier, the second impedance Z2 is connected the output of the first amplifier and the second input of the first amplifier, the third impedance Z3 is connected to the output of the first amplifier and the load, the fourth impedance Z4 is connected the output of the second amplifier and the second input of said first amplifier.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: September 3, 2019
    Assignee: THX Ltd.
    Inventors: Owen Jones, Lawrence R. Fincham, Andrew Mason
  • Patent number: 10381874
    Abstract: This disclosure provides systems, methods and apparatus for increasing the efficiency of an amplifier when driven by a variable load. In one aspect a transmitter device is provided. The transmitter device includes a driver circuit characterized by an efficiency. The driver circuit is electrically connected to a transmit circuit characterized by an impedance. The transmitter device further includes a filter circuit electrically connected to the driver circuit and configured to modify the impedance to maintain the efficiency of the driver circuit at a level that is within 20% of a maximum efficiency of the driver circuit. The impedance is characterized by a complex impedance value that is within a range defined by a real first impedance value and a second real impedance value. A ratio of the first real impedance value to the second real impedance value is at least two to one.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: August 13, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Charles Edward Wheatley, III, Zhen Ning Low, Stanley Slavko Toncich, Ngo Van Nguyen, Cody B. Wheeland
  • Patent number: 10340891
    Abstract: A differential elliptic filter circuit includes: a differential amplifier, feedback and feedforward paths. An upper pair and a lower pair of inverting feedback paths couple a corresponding one the differential signal outputs of the amplifier to an inverting one of a pair of inputs of the amplifier, to provide two complex conjugate poles, and establish upper and lower virtual grounds at the amplifier inputs. Upper and lower inverting feedforward paths couple corresponding passive nodes of the upper and lower pairs of inverting feedback paths to respectively the lower and upper virtual grounds to provide two zeros of the circuit. The upper and lower non-inverting feedforward paths couple an upper and lower one of a pair of differential signal inputs of the circuit to respectively the upper and lower virtual grounds to enable positioning of the two zeros of the circuit on an imaginary axis of a pole-zero plot.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: July 2, 2019
    Assignee: QUANTENNA COMMUNICATIONS, INC.
    Inventors: Omid Oliaei, Didier Margairaz
  • Patent number: 10284237
    Abstract: An analog predistortion linearizer system with dynamic frequency compensation for automatically adjusting predistortion characteristics based on a detected frequency includes a frequency detector configured to generate at least one frequency detection signal in response to receiving an amplifier drive signal, the frequency detection signal including a frequency indicator that indicates the frequency of the amplifier drive signal. Moreover, the system also includes a controller communicatively coupled to the frequency detector and configured to generate a predistorter control signal in response to receiving the frequency detection signal from the frequency detector, and a predistorter communicatively coupled to i) the frequency detector and ii) the controller, the predistorter configured to generate a predistorted amplifier drive signal based on at least the predistorter control signal.
    Type: Grant
    Filed: October 14, 2017
    Date of Patent: May 7, 2019
    Assignee: Mission Microwave Technologies, LLC
    Inventors: Blythe C Deckman, Michael P DeLisio, Jr., Amir Halperin
  • Patent number: 10256522
    Abstract: A vertical combiner for an overlapping linear phased array is provided. The vertical vector combiner enables two strip-line signals from different layers to be combined, or divided, by vertical transitions between substrate layers and produce a desired output signal phase. The combiner can terminate in a short to act as an antenna. In an antenna application, the antenna provides multiple substrate layers for each strip-line signal, each having a metal ground plane. The ground planes are be coupled by vertical transitions access enabling a stepped ground within the structure which increases bandwidth. The multi-layer combiner architecture enables integration with phased array feed networks for millimeter wave phased array antennas.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: April 9, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wenyao Zhai, Vahid Miraftab
  • Patent number: 10250200
    Abstract: The present disclosure is directed to a dual output path LNA that can be used to break the tradeoff between the output impedance and linearity of an LNA without the problems of a programmable output impedance LNA. In an embodiment, the dual output path architecture includes an LNA driving a low level of impedance in a low voltage gain path, thus achieving high linearity in the presence of large blockers, and driving a high level of impedance in a high voltage gain path to increase the LNA's voltage gain and minimize performance degradation due to a noisier, low power receiver front-end chain following the LNA. The present disclosure is further directed to a local oscillator (LO) offset circuit with low power and reduced spur generation.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: April 2, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Valentina Della Torre, Seema B. Anand, Howard Chi, Matteo Conta
  • Patent number: 10222407
    Abstract: A sensor arrangement (10) comprises an amplifier (11) having a signal input (12) to receive an input signal (SIN) and a signal output (13) to provide an amplified sensor signal (SOUT) that is an inverted signal with respect to the input signal (SIN). Furthermore, the sensor arrangement (10) comprises a feedback path connecting the signal output (13) to the signal input (12), wherein the feedback path comprises a series connection of a capacitive sensor (14) and a feedback capacitor (15). A voltage source arrangement (19) of the sensor arrangement (10) is connected to a feedback node (18) between the capacitive sensor (14) and the feedback capacitor (15).
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: March 5, 2019
    Assignee: ams AG
    Inventor: Matthias Steiner
  • Patent number: 10211787
    Abstract: Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 19, 2019
    Assignee: NXP USA, INC.
    Inventors: Abdulrhman M. S. Ahmed, Mario M. Bokatius, Paul R. Hart, Joseph Staudinger, Richard E. Sweeney
  • Patent number: 10205438
    Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: February 12, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Mohyee Mikhemar, Amir Hadji-Abdolhamid, Hooman Darabi
  • Patent number: 10197638
    Abstract: A high bandwidth Hall sensor includes a high bandwidth path and a low bandwidth path. The relatively high offset (from sensor offset) of the high bandwidth path is estimated using a relatively low offset generated by the low bandwidth path. The relatively high offset of the high bandwidth path is substantially reduced by combining the output of the high bandwidth path with the output of the low bandwidth path to generate a high bandwidth, low offset output. The offset can be further reduced by including transimpedance amplifiers in the high bandwidth sensors to optimize the frequency response of high bandwidth Hall sensor.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: February 5, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arup Polley, Srinath Ramaswamy, Baher S. Haroun, Rajarshi Mukhopadhyay
  • Patent number: 10146245
    Abstract: An I-V converting module includes: a current output sensor, an I-V transforming circuit, a sampling and holding circuit, a source follower, a loop switch, and a bypass circuit. A drain of the source follower is connected to an input/output end of the sampling and holding circuit. A source of the source follower is connected to an input end of the I-V transforming circuit and an output end of the current output sensor, and a gate of the source follower is connected to an output end of the I-V transforming circuit via the loop switch, and to the bypass circuit. When the loop switch is closed and the bypass circuit is disabled, a feedback loop formed by the source follower, the I-V transforming circuit and the loop switch is conducted, and the I-V converting module enters into a sampling setup stage.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: December 4, 2018
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Mengwen Zhang
  • Patent number: 10116262
    Abstract: A front-end amplifier circuit for receiving a biological signal includes a signal channel. The signal channel amplifies the biological signal to generate a detection current and includes a capacitive-coupled transconductance amplifier. The capacitive-coupled transconductance amplifier amplifies the biological signal with a transconductance gain to generate a first current.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: October 30, 2018
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Chung-Yu Wu, Ya-Syuan Sung
  • Patent number: 10097396
    Abstract: A direct conversion wireless transmitter includes IQ mismatch pre-compensation using direct learning adaptation to adjust IQ pre-compensation filtering. Widely-linear IQ_mismatch pre-compensation filtering compensates for IQ mismatch in the TX analog chain, filtering of input data x(n) to provide pre-compensated data y(n) with a compensation image designed to interfere destructively with the IQ_mismatch image. A feedback receiver FBRX captures feedback data z(n) used for direct learning adaptation. DL adaptation adjusts IQ_mismatch filters, modeled as an x(n)_direct and complex conjugate x(n)_image transfer functions w1 and w2, including generating an adaptation error signal based on a difference between TX/FBRX-path delayed versions of x(n) and z(n), and can include estimation and compensation for TX/FBRX phase errors. DL adaptation adjusts the IQ pre-comp filters w1/w2 to minimize the adaptation error signal. Similar modeling can be used for IQ mismatch.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: October 9, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Charles K. Sestok, IV
  • Patent number: 10097162
    Abstract: Embodiments of an apparatus are disclosed. In an embodiment, a power receiver unit is disclosed. The power receiver unit includes a power pick-up unit, a communication modulator, and a filter. The power pick-up unit receives a wireless power signal. The communication modulator applies a modulation to the received wireless power signal. The filter suppresses a load signal from a load of the wireless charge receiver to prevent interference with the modulation.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: October 9, 2018
    Assignee: NXP B.V.
    Inventors: Patrick Niessen, Rene Geraets
  • Patent number: 10097138
    Abstract: Embodiments of a Doherty amplifier device are provided, including a first amplifier stage having a first gain; a second amplifier stage having a second gain that is less than the first gain; and an input power splitter coupled to inputs of the first and second amplifier stages, wherein the input power splitter includes either an inductive element, a capacitive element, or both coupled between the inputs of the first and second amplifier stages, and a resistive element coupled to the input of the second amplifier stage, the input power splitter respectively delivers first and second power levels to inputs of the first and second amplifier stages, and the resistive element is configured to tune gain linearity of the Doherty amplifier device by increasing the second power level to be greater than the first power level, based on a ratio of the second gain to the first gain.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: October 9, 2018
    Assignee: NXP USA, Inc.
    Inventor: Igor Blednov
  • Patent number: 10041811
    Abstract: A high bandwidth Hall sensor includes, for example, a Hall element for generating a first polarity Hall-signal output current. An amplifier receives, at a first input, the first polarity Hall-signal output current and outputs a feedback current of a second polarity opposite the first polarity in response. The feedback current is coupled to the first input, and the feedback current suppresses an instantaneous voltage generated by the first polarity first Hall element output current at the first input. In an embodiment, the feedback current suppresses the instantaneous voltage generated by first polarity Hall element output current such that the effects of the Hall element source impedance are reduced.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: August 7, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arup Polley, Srinath Ramaswamy, Baher S. Haroun, Rajarshi Mukhopadhyay
  • Patent number: 9979358
    Abstract: The present invention is directed to electrical circuits. More specifically, an embodiment of the present invention provides a differential amplifier in cascode configuration. An input transistor is coupled to an output transistor via a peaking inductor. The output transistor is also directly coupled to a degeneration resistor. There are other embodiments as well.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: May 22, 2018
    Assignee: INPHI CORPORATION
    Inventors: Leonardo Vera, Carl Pobanz, James Hoffman
  • Patent number: 9973200
    Abstract: Methods and apparatus include and amplifier circuit and a first capacitor branch including a first plurality of capacitors. The first capacitor branch couples to an input signal and to an input of the amplifier circuit. A second capacitor branch includes a second plurality of capacitors. The second capacitor branch couples to the input of the amplifier circuit and to an output of the amplifier circuit.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: May 15, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jaskarn Singh Johal, Erhan Hancioglu, Renee Leong, Harold M. Kutz, Eashwar Thiagarajan, Onur Ozbek
  • Patent number: 9954497
    Abstract: Circuits for low noise amplifiers with interferer reflecting loops are provided. In some embodiments, circuits for a low noise amplifier with an interferer reflecting loop are provided, the circuits comprising: a low noise amplifier (LNA) having an input and an output; a buffer having an input coupled to the output of the LNA and an output; and notch filter having an input coupled to the output of the buffer and an output coupled to the input of the LNA.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: April 24, 2018
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Jianxun Zhu, Peter R. Kinget, Harish Krishnaswamy
  • Patent number: 9941910
    Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a controller that determines a radiated throughput for at least one of an uplink throughput or a downlink throughput of the communication device, reduces transmit power for the communication device responsive to the radiated throughput satisfying a predetermined throughput range, and tunes a matching network of the communication device responsive to the radiated throughput not satisfying the predetermined throughput range. Other embodiments are disclosed.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: April 10, 2018
    Assignee: BlackBerry Limited
    Inventors: Lizhong Zhu, Joseph Caci, Keith R. Manssen
  • Patent number: 9935614
    Abstract: Multi-state radio frequency (RF) attenuator configurations that include bridged-T type, pi-type, and T-type structures each having a programmable throughput section and a coupled programmable shunt section. The throughput sections and shunt sections may be configured in various combinations of parallel and serial fixed or selectable resistance elements such that multiple resistance states and impedance matching states can be programmatically selected, and may include stacked switch elements to withstand applied voltages to a specified design level.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: April 3, 2018
    Assignee: pSemi Corporation
    Inventor: Ravindranath Shrivastava
  • Patent number: 9917721
    Abstract: Methods, systems, and apparatus for receiving an input signal, where the input signal includes a carrier signal modulated with a first modulation signal and a second modulation signal, and where the second modulation signal is a TM signal. Demodulating the first modulation signal from the input signal. Modulating an un-modulated carrier signal with the first modulation signal to generate a third signal, where the third signal includes the carrier signal modulated by the first modulation signal. And, removing the first modulation signal from the input signal by subtracting the third signal from the input signal to extract the TM signal from the input signal.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 13, 2018
    Assignee: TM IP Holdings, LLC
    Inventor: Richard C. Gerdes
  • Patent number: 9912294
    Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: March 6, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas K. Pulijala, Steven G. Brantley
  • Patent number: 9891762
    Abstract: A touch screen device includes a touch screen panel including Tx lines, Rx lines, and touch sensors formed at crossings of the Tx lines and Rx lines; a Tx driving circuit for supplying a driving pulse to the Tx lines; and an Rx driving circuit for sampling charge variations of the touch sensors, which are received through the Rx lines, and converting the received charge variations into touch raw data, wherein the Rx driving circuit includes: a noise filter that removes noise of signals received from the Rx line; an integrator that accumulates the charge variations passing through the noise filter; a sampling circuit that samples the accumulated charge variation of the integrator; and an analog to digital converter that converts the charge variation sampled by the sampling circuit into the touch raw data, the noise filter being a biquad bandpass filter including variable resistors and variable capacitors.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: February 13, 2018
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sangyong Lee, Hyeongwon Kang
  • Patent number: 9887674
    Abstract: A multi-stage amplifier, comprising a first amplifier stage is presented. The output of the first amplifier stage is coupled to a first terminal of a capacitor having a controllable capacitance. The input of a second amplifier stage is coupled to the output of the first amplifier stage and the first terminal of the capacitor. The output of the second amplifier stage is coupled to a second terminal of the capacitor and an output of the multi-stage amplifier. The input of a current sensing circuit is coupled with the output of the multi-stage amplifier. A control signal generator is coupled between the output of the current sensing circuit and a control terminal of the capacitor. The control signal generator provides a control signal to the capacitor in order to control or vary the capacitance of the capacitor.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: February 6, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Carlos Zamarreno Ramos, Ambreesh Bhattad, Frank Kronmueller
  • Patent number: 9871489
    Abstract: An arrangement and method for radio-frequency (RF) high power generation which compensate for a failed power amplifier module includes at least one power combiner having RF inputs and at least one RF output, and at least two power amplifier modules electrically connected to a respective input by at least one transmission line, and at least one RF switch formed by the at least one transmission line with a complex load electrically connected to the at least one RF switch.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: January 16, 2018
    Assignees: Siemens Aktiengesellschaft, OOO SIEMENS
    Inventors: Evgeny Ivanov, Andrey Krasnov, Alexander Smirnov, Marcus Zerb
  • Patent number: 9866237
    Abstract: Disclosed examples include switched capacitor integrator circuits including an amplifier, a feedback capacitor, a sampling capacitor, a loading capacitor and a switching circuit, along with a controller that operates the switching circuit to sample an input signal to the sampling capacitor during a sample portion of a given sample and hold cycle, to couple the sampling capacitor to an amplifier input during a first hold portion of each sample and hold cycle, and to couple the sampling capacitor and the loading capacitor to the amplifier input in a second hold portion of each sample and hold cycle to reduce the bandwidth and power consumption by the integrator circuit.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: January 9, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajavelu Thinakaran, Sumit Dubey
  • Patent number: 9859990
    Abstract: A system and/or method is provided for enhanced listening of audio signals acquired via a telecoil by performing hum filtering. The system may include a telecoil and a telecoil hum filter. The telecoil hum filter may include a comb notch filter. The comb notch filter may include a delay module and a comb notch filter summing module. The telecoil may be operable to receive a magnetic signal and convert the magnetic signal to an input audio signal. The delay module of the comb notch filter may be configured to generate a delayed signal by applying a delay to the input audio signal. The delay may be based on a fundamental hum frequency. The comb notch filter summing module may be configured to generate a comb notch filter output signal by adding the input audio signal and the delay signal.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: January 2, 2018
    Assignee: ETYMOTIC RESEARCH, INC.
    Inventor: Stephen D. Julstrom
  • Patent number: 9813028
    Abstract: an amplifier amplifies electrical power of signals. A calculating unit calculates a cumulative value for each of first samples and second samples, between which a difference in electrical power or phase is within a first range, in a first sample group and a second sample group corresponding to a first signal that is a signal before amplification in the amplifier and a second signal that is a signal after amplification in the amplifier. Then, the calculating unit calculates, by using the calculated cumulative value, a phase difference between the first signal and the second signal. The correction unit corrects the phase difference by using a correction amount calculated from the phase difference. The updating unit updates, by using the first signal and the second signal of which the phase difference is corrected, a distortion compensation coefficient that is used to compensate nonlinear distortion generated in the amplifier.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: November 7, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Hideharu Shako
  • Patent number: 9811058
    Abstract: Disclosed are an apparatus and a method for controlling a signal such that a PLC input signal is equalized to a reference input signal. The apparatus includes an error calculation unit to calculate an error by using the PLC input signal and the reference input signal; an estimation parameter calculation unit to calculate an estimation parameter by using the reference input signal, the PLC input signal and the error; and an error correction unit to correct the error by using the estimation parameter such that the PLC input signal is equalized to the reference input signal.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: November 7, 2017
    Assignee: LSIS CO., LTD.
    Inventor: Jung Wook Kim
  • Patent number: 9806703
    Abstract: A single-ended to differential conversion circuit for converting an input signal into a pair of differential signals is provided. An amplifier includes an inverting input terminal, a non-inverting input terminal for receiving a reference signal, and an output terminal. A first resistor is coupled between the inverting input terminal and the output terminal of the amplifier. A second resistor is coupled to the inverting input terminal of the amplifier. The third resistor is coupled to the output terminal of the amplifier. The resistor string is coupled between the output terminal of the amplifier and the second resistor, and includes a fourth resistor and a fifth resistor connected in series. A signal of the pair of differential signals is provided via the third resistor, and another signal of the pair of differential signals is provided via the resistor string.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: October 31, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yu-Hsin Lin, Tze-Chien Wang
  • Patent number: 9762274
    Abstract: An apparatus includes an elliptical inductance-capacitance (LC) filter and a resistive-capacitive (RC) notch filter serially coupled to the elliptical LC filter. The elliptical LC filter and the RC notch filter are configured to filter a radio-frequency (RF) signal received by a feedback receive path.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: September 12, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Shailesh Shekhar Rai, Mahim Ranjan, Jeremy Mark Goldblatt, Frederic Bossu, Vijay Chellappa
  • Patent number: 9721504
    Abstract: Discussed are a current sensing circuit capable of compensating for degradation of an organic light emitting diode by sensing a current of the organic light emitting diode, and an organic light emitting diode display having the same. The current sensing circuit according to an embodiment includes a plurality of sensing modules configured to sense a pixel current from a display panel having an organic light emitting diode on each of a plurality of pixels, and to output a sensing voltage according to a sensing result; and an analog-to-digital converter configured to convert the sensing voltage into an analog-to-digital voltage, and to output sensing data.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: August 1, 2017
    Assignee: LG Display Co., Ltd.
    Inventors: SangYun Kim, JunHyeok Yang
  • Patent number: 9711942
    Abstract: A laser apparatus includes a semiconductor laser of which a drive condition is controlled according to a plurality of types of drive currents and a controller which controls the drive condition such that a sum of the drive currents is equal to or less than a predetermined threshold value.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: July 18, 2017
    Assignee: FUJITSU OPTICAL COMPONENTS LIMITED
    Inventor: Hiroki Kanesaka
  • Patent number: 9705465
    Abstract: A control apparatus is provided that can provide high dynamic resolution and is suitable for inclusion within an integrated circuit. The control apparatus receives a demand signal representing a desired value of a measurand, and a feedback signal representing a present value or a recently acquired value of the measurand. The processing circuit forms a further signal a further signal which is a function of the demand and feedback signals. The further signal is then subjected to at least an integrating function. The demand signal, feedback signal or the further signal is processed or acquired in a sampled manner. The use of such sampled, i.e. discontinuous, processing allows integration time constants to be synthesized which would otherwise require the use of unfeasibly large components within an integrated circuit, or the use of off-chop components. Both of these other options are expensive.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: July 11, 2017
    Assignee: ANALOG DEVICES GLOBAL
    Inventors: Rares Andrei Bodnar, Patrick Joseph Pratt, Donal Bourke, Peter James Tonge
  • Patent number: 9692361
    Abstract: A two-way Doherty amplifier for amplifying a modulated or non-modulated carrier signal, said carrier signal having a carrier frequency; wherein the Doherty amplifier comprises a first amplifier having a first amplifier output node, a second amplifier having a second amplifier output node, a combining node connected or connectable to a load, a first amplifier output line connecting the first amplifier output node to the combining node, and a second amplifier output line connecting the second amplifier output node to the combining node, and wherein the first amplifier output line has an electrical length of substantially one quarter wavelength of the carrier signal and the second amplifier output line has an electrical length of substantially one half wavelength of the carrier signal.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: June 27, 2017
    Assignee: NXP USA, INC.
    Inventor: Igor Blednov