Abstract: A high voltage power system is disclosed. In some embodiments, the high voltage power system includes a high voltage pulsing power supply; a transformer electrically coupled with the high voltage pulsing power supply; an output electrically coupled with the transformer and configured to output high voltage pulses with an amplitude greater than 1 kV and a frequency greater than 1 kHz; and a bias compensation circuit arranged in parallel with the output. In some embodiments, the bias compensation circuit can include a blocking diode; and a DC power supply arranged in series with the blocking diode.

Abstract: A circuit arrangement for compensating for signal attenuation during the transmission of transmission signals of a mobile communications device includes at least one amplifier is switched out of the signal transmission path or is deenergized, or does not amplify, attenuate or forward the detected input signal, unless an input signal level is detected which is greater than or equal to the input signal detection level (SEP) or a trigger level (SAP) which is at most 10 dB higher than the same. Alternatively or in combination, the amplifier is operated at a variable amplification factor in an adjustment range (X1) which begins at an input signal detection level (SEP) or a trigger level (SAP) which is at most 10 dB higher than the same, and extends to cover higher signal levels than these, wherein, if the input signal detection level (SEP) or the trigger level (SAP) is reached or exceeded, the input signal is either non-amplified or is attenuated at an amplification factor?1.

Abstract: A design method for designing a multi-path amplifier involves connecting an amplifier stage having at least two amplifier branches to a combiner stage; feeding a plurality of testing signals with one or more of a plurality of sweeping variables to the amplifier stage; measuring output signals at the output of the combiner stage depending on the plurality of testing signals; designing a structure of an input network stage for the amplifier stage on the basis of the measured output signals; and combining the designed input network stage with the amplifier stage to create an efficiency-optimized multi-path amplifier.

Abstract: A nonreversible circuit device includes circulators of high pass type, each circulator including a first central conductor, a second central conductor, and a third central conductor arranged on a microwave magnetic body, to which a DC magnetic field is applied, in a relation intersecting each other in a mutually insulated state, and capacitance elements connected respectively in series between one end of the first central conductor and an antenna port, between one end of the second central conductor and a reception port, and between one end of the third central conductor and a transmission port. A pass frequency band of the circulator is lower than that of the circulator. The antenna ports of the circulators are electrically connected to provide one combined antenna port, and a low pass filter is inserted between the combined antenna port and the antenna port of the circulator.

Abstract: The present invention discloses a flash-memory low-speed read mode control circuit, which comprises a charge pump, a first voltage division circuit composed of two resistors and a first switch interconnected in series, and a second voltage division circuit composed of two capacitors interconnected in series. The first switch is used for switching between the data read mode of the low-speed read mode and the charge pump electric-leakage mode. In the data read mode, a first component voltage formed by the two resistors is fed back to the input terminal of the charge pump through a comparator, an NAND gate and a buffer, making a stable value of the output voltage of the charge pump proportional to the first component voltage.

Abstract: Various embodiments described herein provide systems and methods for improved performance for power amplifiers, particularly GaN power amplifiers. According to some embodiments, a power amplifier (e.g., GaN power amplifier) utilizes an adaptive closed loop control of the drain current of the power amplifier to achieve improved performance for the power amplifier.

Abstract: In one embodiment, a digital internal amplified voltage of power management circuitry is forced to an input threshold voltage upon a determination that a set of emergency conditions is satisfied, and is set to an input minimum battery voltage upon a determination that the set of emergency conditions is not satisfied. The emergency conditions may include determining that a battery voltage is less than a threshold voltage and determining that an input minimum battery voltage is less than an input threshold voltage.

Abstract: There are provided a bias circuit and an amplifier having a current limit function, including: a control voltage generating unit generating a control voltage using a reference voltage; a bias voltage generating unit generating a bias voltage according to the control voltage; and a bias current limit unit controlling the control voltage according to a bias current of the bias voltage generating unit.

Abstract: A power recovery system includes a transmission line that is coupled to transfer an RF signal received via an antenna. The RF signal generates a partial standing wave in the transmission line and the transmission line has at least one standing wave anti-node. A power recovery circuit converts an anti-node signal from the at least one standing wave anti-node to a power signal.

Abstract: A programmable gain controller (PGC) useful with a digital to analog converter is coupled to an input node providing a current source that is variable with a level of an input signal such as time sampled audio data, and multiple switches controlled to function as a digital gain control. Each switch is configured to selectively steer a variable fraction of the current provided by a current source to either a current sink node or to an output node of the PGC to provide at least one scaled current. An amplifier is coupled to an output of the PGC. The amplifier is configured to convert scaled current(s) to at least one output signal having an amplitude that is a function of both the input signal level and the digital gain input signal. Controlling the gain by steering current at the analog portion of the apparatus conserves circuit space and reduces noise.

Abstract: Methods and apparatus are disclosed for automatically adjusting antenna impedance match in a wireless transceiver employing phase-amplitude modulation. According to some embodiments of the invention, a wireless transceiver comprises a transmitter circuit and a receiver circuit connected to the antenna by a transmit/receive duplexer. An electronically adjustable matching network is located between the transmitter output and the antenna. To control the adjustable matching network, a directional coupler is located between the transmitter output and the matching network to separate transmit signals reflected from the antenna system, including the antenna, the matching network and the T/R duplexer. The reflected transmit signals are routed to the receiver circuit, which digitizes the reflected signal and determines an antenna reflection coefficient based on the digitized reflected signal and the modulation signal used to create the transmit signal.

Abstract: In one embodiment, a method includes generating a current that is proportional to a mobility and an oxide capacitance of a tracking device and independent of a threshold voltage variation of the tracking device, generating a voltage from the current, and providing the voltage as at least part of a bias voltage for another device. In one embodiment, this other device may be a compensation circuit coupled to a main device to compensate for capacitance non-linearity of the main device.

Abstract: A system and method for controlling a power amplifier using a programmable ramp circuit involves receiving an input bias current at a programmable ramp circuit, generating an output bias current based on the input bias current using the programmable ramp circuit, and transmitting the output bias current from the programmable ramp circuit to a power amplifier for amplifying a radio frequency signal.

Abstract: A system comprises a variable gain amplifier (VGA) that amplifies an input signal with a gain that is based on a gain control signal. A power amplifier receives an output of the VGA. Memory switches between at least two of N output power settings each including a predetermined reference value and a predetermined gain offset value. The memory substantially concurrently changes from the predetermined reference value and the predetermined gain offset value of a prior one of the N output power settings to the predetermined reference value and the predetermined gain offset value of a current one of the N output power settings, where N is an integer greater than one. A gain control adjuster adjusts the gain control signal based on an output of the power amplifier and the predetermined reference value and gain offset value of the current one of the N output power settings.

Abstract: An apparatus for and method of extending the dynamic range of a RF communications receiver. The invention provides a mechanism for controlling the gain of both the LNA and down conversion mixer in the front end portion of an RF receiver. Both the LNA and the mixer are adapted to have both low and high gain modes of operation. The control mechanism typically comprises a two bit gain control that places both the LNA and mixer in one of four operating gain mode states. The selection of the most appropriate operating gain mode state, is preferably determined in accordance with various metrics such as the received levels of the desired signal, levels of interference signals, bit error rate and receiver RSSI.

Abstract: In radio communication system that is able to transmit in two or more modulation modes, e.g., one modulation mode when phase shifts are performed and another modulation mode when phase shifts and amplitude shifts are performed, the disclosed invention can avoid that receiving band noise becomes so great not to conform to the GSM standards' prescription for such noise in a high voltage region of the power supply voltage, even when the output power is controlled by changing the amplitude of the input signal to the power amplifier circuitry while fixing the bias voltages to be applied to the power amplifying transistors. When the output power is controlled as above, in the modulation mode (GSM mode) when phase shifts are performed, idle currents flowing across the power amplifying transistors are regulated, depending on the power supply voltage, i.e., the idle currents are decreased when the power supply voltage is high and increased when the power supply voltage is low.

Abstract: A power amplifier configuration including power amplifier circuitry and power control circuitry and having improved Power Added Efficiency (PAE) is provided. The power amplifier circuitry includes one or more input amplifier stages in series with a final amplifier stage. The power control circuitry provides a variable supply voltage to the input amplifier stages based on an adjustable power control signal. The final amplifier stage is powered by a fixed supply voltage. In operation, as output power of the power amplifier is reduced from its highest power level, the variable supply voltage is reduced. Accordingly, RF power of an amplified signal provided to the final amplifier stage from the input amplifier stages decreases, and the final amplifier stage transitions from saturation to linear operation, thereby increasing the gain of the final amplifier stage. Thus, a desired output level can be maintained while operating at lower current levels.

Abstract: A system for communicating information includes a variable gain amplifier (VGA) responsive to an input signal and a gain control signal for controlling a gain of the VGA. The system also includes a power amplifier responsive to the VGA. An output power level of the power amplifier is compared to a predetermined reference value to generate the gain control signal. The gain control signal is offset by a gain offset value. To change the output power level of the power amplifier from a first output power level to a second output power level, a first predetermined reference value and a first gain offset value associated with the first output power level are changed substantially concurrently to a second predetermined reference value and a second gain offset value, respectively, associated with the second output power level.

Abstract: A differential circuit and an amplifier circuit for reducing an amplitude difference deviation, performing a full-range drive, and consuming less power are disclosed. The circuit includes a first pair of p-type transistors and a second pair of n-type transistors. A first current source and a first switch are connected in parallel between the sources of the first pair of transistors, which are tied together, and a power supply VDD. A second current source and a second switch are connected in parallel between the sources of the second pair of transistors, which are tied together, and a power supply VSS. The circuit further includes connection changeover means that performs the changeover of first and second pairs between a differential pair that receives differential input voltages and a current mirror pair that is the load of the differential pair. When one of the two pairs is the differential pair, the other is the current mirror pair.

Abstract: A method and apparatus for compensating a base current of a bipolar junction transistor by replicating operating conditions of the BJT in a compensating circuit. An output current of the compensating circuit is fractionally related to the base current and thus can be supplied to an operational circuit comprising the BJT to compensate the base current. In a preferred embodiment, the BJT is operated between BVCEO and BVCBO and the base current to be compensated flows from the BJT.

Abstract: An integrated detector circuit (20) includes first and second gain stages (GS1, GS2). The first gain stage has an input (82) that monitors a high frequency signal (VRFDET) for routing a first detection current (IS1) to a node (60). The second gain stage includes a first current source (PF1) that supplies a bias current (IMAX1) indicative of a predefined amplitude of the high frequency signal. An input of the second gain stage monitors the high frequency signal to route a portion of the bias current to the node as a second detection current (IS2), which is limited to the bias current when the high frequency signal is greater than the predefined amplitude to compensate for a nonlinearity in a transconductance of the second gain stage.

Abstract: The invention involves systems and methods of providing energy to land-based telemetry devices wherein the energy storage and power conditioning system is comprised of an input power supply, an energy storage element, an output supply and a control system. The input power supply provides energy to the output power supply and charges the energy storage element. The energy storage element is comprised of one or more UltraCaps and supplies energy to the output power supply at times of peak need and when the primary energy source to the input power supply is removed. The control system adjusts the voltage supplied to the energy storage element by the input power supply according to changes in the ambient temperature to compensate for changes in the internal equivalent series resistance of the UltraCaps caused by the change in ambient temperature. The output power supply provides energy to the land-based telemetry device.

Abstract: A circuit for matching an amplifier to a radio-frequency line is described. In order to minimize the number of components required for matching the amplifier to different frequency bands, the circuit has a first capacitance for outputting the negative half-cycle of the transmission signal, which is rectified by a diode and is stored in a second capacitance. The stored negative voltage is, if required, fed back via two resistors and an inductance to a further diode.

Abstract: A method and apparatus for delaying a clock signal involves a first clock path arranged to propagate a first clock signal; a second clock path arranged to propagate a second clock signal; and an interpolator arranged as a unity gain operational amplifier. An amount of delay between the first and second clock signals is determined by a control voltage potential.

Abstract: In a transmitter circuit designed to operate over a specified transmit frequency range, information as to the specific frequency within the specified transmit frequency range at which the transmit up-converter of the transmitter circuit is to be operated, is used to generate a control signal for a high-power amplifier within the transmitter circuit, where the high-power amplifier automatically optimizes its operations based on the frequency indicated by the control signal. For example, for the transmitter circuit of a PCS base station transmitter, control signals received by the transmit up-converter from an alarm control board identify the particular 5-MHZ or 15-MHZ PCS frequency block for the base station transmitter. The up-converter uses that frequency information to generate a two-bit control signal identifying one of three 20-MHZ frequency sub-ranges within the 60-MHZ PCS forward-link transmit frequency range.

Abstract: A system for varying output power of variable-gain amplifiers (VGA) allows for varying the output power transfer function, thus varying the gain, and, hence, the resolution of the output power of the VGA. The preferred embodiment comprises a variable-slope VGA (VSVGA) circuit configured to operate within a closed-loop power-controlled CDMA handset. The VSVGA circuit manipulates the input control voltage of the VGA, thereby, adjusting the gain of the amplifier by varying the slope of a line which models the amplifier output transfer function. Varying gain of the VGA provides for a varying resolution in the VGA amplifier output transfer function. This variation allows for compatibility of a single CDMA handset with different industry standards.

Abstract: An amplifier, for use in regulator circuits and other applications, having dynamic input stage biasing includes an input stage operatively coupled to an input of the amplifier. A controlled current source coupled to the input stage is responsive to a control signal for at least partially controlling an input bias current generated by the controlled current source. The amplifier further includes a sense circuit operatively connected in a feedback arrangement between an output of the amplifier and the controlled current source. The sense circuit measures an output load current from the amplifier and generates the control signal in response thereto, whereby the input bias current is a function of the output load current of the amplifier. In this manner, parasitic poles associated with the amplifier are pushed out in frequency so as to provide superior amplifier stability while dissipating low quiescent current, particularly at low output load current levels.

Abstract: It is an object of the present invention to provide a portable terminal which reduces an antenna standing-wave ratio and absorbs reflected waves without inserting an isolator so that a stable operation can be obtained efficiently with a compact, low-price body.

Abstract: An integrated circuit includes a single pole double throw switch including a transmitting and receiving port, a transmitting port, and a receiving port. A transmission switch is coupled between the transmitting port and the transmitting and receiving port. A reception switch is coupled between the receiving port and the transmitting and receiving port. The reception switch includes a field effect transistor having a gate, a drain and a source. A voltage generating circuit receives first and second power supply voltages. The first power supply voltage is greater than the second power supply voltage. The voltage generating circuit generates a third voltage lower than the second power supply voltage and applies the third voltage to the gate of the field effect transistor of the reception switch during transmission.

Abstract: A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of an intermittent radio-frequency signal. The control circuit includes a bias voltage setting circuit for supplying a bias voltage of a predetermined value to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supplied to the power amplifying element, and for setting the idle current of the power amplifying element to a predetermined value. The control circuit further includes a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supplied to the power amplifying element.

Abstract: An output level control circuit for radio-frequency transmitter which intermittently transmits radio-frequency carrier waves such as seen in the TDMA radio communication system and the digital cellular mobile telephone system. The variable gain amplifier unit of this transmitter amplifies the transmitting signal to a predetermined output power level in response to a control signal, the output power level is detected by a detecting diode which receives the application of a temperature-compensated bias voltage, and the sum of the detected output and the bias voltage becomes the detection output to the control loop.

Abstract: In a mobile radio communication device, a gain of a GaAs FET for high frequency power amplification is controlled by a negative voltage based on a clock signal generated by a microcomputer in the device.

Abstract: The power amplifying circuit embodied by the invention is composed of a single-unit circuit capable of varying own bias condition, and yet, more than two kinds of amplifying modes can selectively be activated merely by applying a single-unit power amplifying circuit. Concretely, the power amplifying circuit embodied by the invention comprises the following, a power amplifying transistor, a base-side transmission line, a resistance element connected to the base-side transmission line, the first switching element accommodating current path formed in series against the resistance element so that the first potential can be delivered to the resistance element, the second switching element which is inserted between the base-side transmission line and the second potential, and a circuit means for varying the value of a base potential of the power amplifying transistor by means of opposite switching operations performed by the first and second switching elements.

Abstract: A C-band transmit-receive module for an active aperture radar is provided employing gallium arsenide chips preferably manufactured by the Multifunction Self-Aligned Gate process and employing both open and closed loop error correction for both phase and amplitude to correct for errors due to temperature, power supply variations, operating bandwidth and phase states.In a second embodiment a power output amplifier is provided employing predriver, driver and power amplifier stages wherein the power amplifier or the power amplifier and the driver may be switched out of the circuit if not needed. The bias on the amplifier may also be lowered if not needed. This is done to increase efficiency and reduce temperature.In both embodiments class B amplifier are preferred.

Abstract: This amplifier is equipped with a digital bias control apparatus to provide precise, dynamic control over the operating point of a plurality of amplifying elements in the ampliifer. A processor optimizes the operating point of each individual amplifying element as a function of the amplifying element characteristics, the operating environment and the applied input signal. The use of a processor also enables the user to remotely program the operating point of each individual amplifying element in the amplifier. The processor further enables dynamic changes in the operating characteristics of the amplifier as the operating environment of these amplifing elements changes. The processor also generates an alarm signal if any particular amplifying element is operating out of its nominal specifications. This digital bias control apparatus can function in class A, AB, B or C type of amplifiers whether they are tuned or untuned and whether the amplifier operates in a pulsed or continuous mode.

Abstract: The present invention is directed to an automatic power control circuit for a signal power amplifier which maintains the output power to one of a plurality of output power levels. The output power level is controlled by an externally-generally level control signal which is used by a square wave signal generating circuitry for controlling the duty cycle of the generated square wave. The square wave is integrated by a filter network to produce a reference voltage level. The output voltage level of the RF amplifier is compared with the reference voltage level, and the difference between the two signals is used to control a drive circuit for generating the proper control voltage for controlling the RF amplifier so that the desired output power level is maintained.

Abstract: A pulse modulated amplifier is described comprising a power transistor having a grounded base, an emitter for receiving a drive signal to be amplified, and a collector for emitting a high frequency pulse, the power transistor operating over a substantially 360.degree. conduction angle variation during which the drive signal is amplified. The pulse modulated amplifier preferably includes a pulse modulator for generating a modulation drive voltage, and a current driver circuit responsive to the modulation drive voltage for generating a control current. The control current is applied to the emitter of the power transistor to control the output power of the emitted high frequency pulse. For a given drive signal the conduction angle of the power transistor is proportional to the control current, and for a given control current the conduction angle of the power transistor is inversely proportional to the drive signal.

Abstract: An R.F. signal generator is arranged to provide an output signal having a controlled level, by means of a feedback loop into which an additional frequency dependent control signal is injected. This additional control signal is derived from a resistor network in which particular resistors, or combinations thereof, are selected in dependence on the output frequency of the signal generator.

Abstract: An electronic organ in which a manually adjustable potentiometer varies the control voltage supplied to a voltage controlled amplifier interposed between a source of tone signals and an organ output circuit with the potentiometer being connected to the amplifier by a circuit which eliminates scratching and discontinuity in the potentiometer output. The amplifier can be bypassed by circuitry for supplying lower frequency bass signals to the amplifier output under conditions of high attenuation of the incoming signal in the amplifier.

Abstract: For sleep promotion and for sleeper awakening an audio system including a wide band audio frequency generator is provided with an output speaker, volume and tone selectors, a time-alarm signalling system, and means for connection with a house alarm system to sound the time-alarm when the house alarm system is actuated; operation is suspended when the alarm system is actuated for any reason; volume control in response to ambient noise is also provided.

Abstract: An electrical musical instrument amplifier is disclosed in which a signal which has been provided by an instrument to a second one of two different preamplifiers for amplification therein is passed to one of the inputs of a summing amplifier together with the output of the first preamplifier, the output of the summing amplifier being coupled through a tube driven power amplifier to a loudspeaker system. The amplified signal from the second preamplifier is applied to a second input of the summing amplifier via a circuit arranged as a voltage divider and having a variable resistance provided by a field effect transistor driven by an oscillator. The modulation provided by the field effect transistor and associated oscillator can be adjusted to provide total phase reversal as well as amplitude modulation when combined with the signal at the output of the second preamplifier, to provide a tremolo or vibrato effect.