With Control Of Power Supply Or Bias Voltage Patents (Class 330/127)
  • Patent number: 11342894
    Abstract: A method for using driver circuitry to drive a load having an unknown impedance magnitude includes (a) in a configuration mode of the driver circuitry, determining a required power supply voltage for a driver stage to drive the load, and (b) in a driving mode of the driver circuitry, (1) driving the load via the driver stage in response to an input signal, and (2) controlling a power supply to provide the required power supply voltage to the driver stage as a static voltage, while driving the load via the driver stage in response to the input signal.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: May 24, 2022
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Arman Hematy, Kenneth Jay Helfrich
  • Patent number: 11309840
    Abstract: A circuit includes a transformer having a primary coil coupled to a first power amplifier (PA) and a second PA, and a secondary coil. The secondary coil supplies a current to an antenna based on a first direction of a first phase of a first amplified constant-envelope signal in the primary coil with respect to a second phase of a second amplified constant-envelope signal in the primary coil. The circuit further includes load impedance coupled between a median point of the primary coil and ground. The load impedance dissipates the current based on a second direction of the first phase of the first amplified constant-envelope signal in the primary coil with respect to the second phase of the second amplified constant-envelope signal in the primary coil, which results in improved power efficiency.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: April 19, 2022
    Assignee: Movandi Corporation
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran, Sam Gharavi
  • Patent number: 11290964
    Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: March 29, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kiichiro Takenaka, Takayuki Tsutsui, Taizo Yamawaki, Shun Imai
  • Patent number: 11272459
    Abstract: Generally, the described techniques provide for efficiently transmitting uplink signals to a base station using shared antennas associated with different power classes. A first device may be in communications with a base station using local antennas and may identify a second device having auxiliary antennas available for transmitting uplink signals to the base station. The local and auxiliary antennas may be associated with different power classes, and the first device may transmit a message to a base station indicating that the first device is capable of transmitting using antennas associated with different power classes. The first device may then receive configurations from a base station of different transmit powers to transmit on the antennas associated with the different power classes, and the first device may transmit uplink signals to the base station in accordance with the different transmit power configurations.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: March 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Yi Huang, Prashanth Haridas Hande, Jay Kumar Sundararajan, Gokul Sridharan, Wei Yang, Wanshi Chen, Krishna Kiran Mukkavilli, Allen Minh-Triet Tran, Joseph Patrick Burke, Naga Bhushan
  • Patent number: 11258409
    Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: February 22, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Justin Philpott, Xiaocheng Jing, Jingxue Lu, Iulian Mirea
  • Patent number: 11239857
    Abstract: An open-loop digital-to-analog converter (DAC) circuit may include a delta-sigma modulator, a decode block responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, an analog output driver responsive to the plurality of DAC elements, a test signal generator configured to generate a test signal that is responsive to inputs of the plurality of DAC elements, and a synchronizer configured to enable replication of the test signal at an external test system coupled to the open-loop DAC circuit in order to generate a matching test signal at the external test system that matches the test signal generated by the test signal generator.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: February 1, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John L. Melanson
  • Patent number: 11159159
    Abstract: A method of controlling a headroom voltage of a transistor stage of an electroplating system to maintain a target power dissipation across the transistor stage may include maintaining a headroom voltage in the transistor stage for a load in the electroplating system. The method may also include measuring an instantaneous power dissipation in the transistor stage and generating a difference output representing a difference between the instantaneous power dissipation in the transistor stage and the target power dissipation in the transistor stage. A voltage across the transistor stage and the load may then be adjusted using the difference output such that the headroom voltage in the transistor stage is adjusted to maintain the target power dissipation in the transistor stage.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: October 26, 2021
    Assignee: Applied Materials, Inc.
    Inventor: Mikael R. Borjesson
  • Patent number: 11128261
    Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: September 21, 2021
    Assignee: pSemi Corporation
    Inventors: Tero Tapio Ranta, Christopher C. Murphy, Jeffrey A. Dykstra
  • Patent number: 11121731
    Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: September 14, 2021
    Assignee: Intel Corporation
    Inventors: Ashoke Ravi, Benjamin Jann, Satwik Patnaik, Elan Banin, Igal Kushnir, Ofir Degani, Alexandros Margomenos
  • Patent number: 11114989
    Abstract: A power amplifying circuit includes an amplifier that amplifies a radio-frequency signal and a bypass capacitor section connected to a power supply terminal for supplying a power supply voltage to the amplifier. The bypass capacitor section includes a first capacitor, a second capacitor, and a first switch circuit. The first capacitor includes a first end connected to a power supply path, and a second end. The second capacitor includes a first end connected to the second end of the first capacitor and a second end connected to ground. The first switch circuit includes a first terminal connected to the second end of the first capacitor and the first end of the second capacitor, and a second terminal connected to the ground. The first switch circuit switches between connection and non-connection between the second end of the first capacitor and the ground.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: September 7, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Goto, Hideyuki Satou, Satoshi Tanaka
  • Patent number: 11108359
    Abstract: A multi-amplifier envelope tracking (ET) circuit and related apparatus are provided. The multi-amplifier ET circuit includes a number of amplifier circuits configured to amplify concurrently a radio frequency (RF) signal to generate a number of amplified RF signals for concurrent transmission, for example, in a millimeter wave (mmWave) spectrum. The amplifier circuits are configured to amplify the RF signal based on a number of ET voltages and a number of low-frequency currents, respectively. A number of driver circuits is provided in the multi-amplifier ET circuit to generate the ET voltages and the low-frequency currents for the amplifier circuits, respectively. In examples discussed herein, the driver circuits are co-located with the amplifier circuits to help improve efficiency and maintain linearity in the amplifier circuits, particularly when the RF signal is modulated at a higher modulation bandwidth (e.g., >80 MHz).
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: August 31, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11099032
    Abstract: A drive-sense circuit includes a signal source circuit and a signal change detection circuit. The signal source circuit is operably coupled to a sensor. When enabled, the signal source circuit provides a signal to the sensor. When the sensor is exposed to a condition, an electrical characteristic of the sensor affects the signal, which includes a DC component and/or an oscillating component. When enabled, the signal change detection circuit is operably coupled to detect an effect on the signal as a result of the electrical characteristic of the sensor. The signal change detection circuit is further operable to generate a signal representative of change to the signal based on the detected effect on the signal.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: August 24, 2021
    Assignee: SIGMASENSE, LLC.
    Inventors: Patrick Troy Gray, Gerald Dale Morrison, Daniel Keith Van Ostrand, Richard Stuart Seger, Jr.
  • Patent number: 11057012
    Abstract: A distributed envelope tracking (ET) amplifier circuit and related apparatus are provided. The distributed ET amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on a modulated voltage. In examples discussed herein, the amplifier circuit is co-located with an ET voltage circuit configured to supply the modulated voltage such that a trace inductance between the amplifier circuit and the ET voltage circuit can be reduced to below a defined threshold. By co-locating the amplifier circuit with the ET voltage circuit to reduce a coupling distance between the amplifier circuit and the ET voltage circuit and thus the trace inductance associated with the coupling distance, it may be possible to reduce degradation in the modulated voltage. As a result, it may be possible to improve efficiency and maintain linearity in the amplifier circuit, particularly when the RF signal is modulated at a higher modulation bandwidth.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: July 6, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11031910
    Abstract: A power amplifier module includes a power amplifier circuit and a control IC. The power amplifier circuit includes a bipolar transistor that amplifies power of an RF signal and outputs an amplified signal. The control IC includes an FET, which serves as a bias circuit that supplies a bias signal to the bipolar transistor. The FET is operable at a threshold voltage lower than that of the bipolar transistor, thereby making it possible to decrease the operating voltage of the power amplifier module.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: June 8, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shota Ishihara, Yasuhisa Yamamoto
  • Patent number: 11031911
    Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC is configured to generate an ET voltage based on a supply voltage(s) and provide the ET voltage to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s). Notably, the RF signal(s) may be modulated in different modulation bandwidths and the amplifier circuit(s) may correspond to different load-line impedances. Accordingly, the ETIC may need to adapt the ET voltage such that the ETIC and the amplifier circuit(s) can operate at higher efficiencies. In examples discussed herein, the ETIC is configured to determine a time-variant peak of the ET voltage and adjust the supply voltage(s) accordingly. As a result, it may be possible to improve operating efficiency of the ETIC in face of a wide range of bandwidth and/or load-line requirements.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: June 8, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11025206
    Abstract: Provided is a power supply for envelope tracking, comprising: a first driving unit for finally providing a first current based on a preset and variably-set first high-frequency threshold or threshold interval; a second driving unit for finally providing a second current based on a preset and variably-set second low-frequency threshold or threshold interval; a third driving unit for providing a third current based on a delayed signal; and a superimposing unit for superimposing the first current, the second current, and the third current to provide a supply voltage of a radio-frequency power amplifier. A new power supply for envelope tracking is provided, which is capable of more efficiently providing a supply voltage of the radio frequency power amplifier by superimposing a first current to a third current.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: June 1, 2021
    Inventors: Qin Xia, Shihong Yang
  • Patent number: 11025458
    Abstract: An adaptive frequency equalizer for wide modulation bandwidth envelope tracking (ET) is provided. In this regard, an ET integrated circuit (ETIC) provides an ET power signal for one or more power amplifiers (PAs). A voltage error can occur in the ET power signal due to variable impedance sources, such as a variable load impedance at the PA and a variable trace inductance between the ETIC and the PA. The adaptive frequency equalizer disclosed herein works to adaptively correct for such voltage errors to provide improved overall power signal tracking at the PA, especially where there is a large trace inductance from the ETIC being located several centimeters (cm) away from the PA. Thus, embodiments of the adaptive frequency equalizer enhance ET performance for radio frequency (RF) systems having a modulation bandwidth of 100 megahertz (MHz) or above.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: June 1, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10992265
    Abstract: In a discrete supply modulation system, a circuit includes a multi-stage pulse shaping network (PSN) having a first PSN stage having an input configured to receive variable bias supply signals from a power management circuit (PMC) and having an output coupled to one or more second PSN stages with each of the one or more second PSN stages having an output configured to be coupled to a supply (or bias) terminal of a respective one of one or more radio frequency amplifiers. Such an arrangement is suitable for use with transmit systems in mobile handsets operating in accordance with 5th generation (5G) communications and other connectivity protocols such as 802.11 a/b/g/n/ac/ax/ad/ay and is suitable for use with multiple simultaneous transmit systems including multiple-input, multiple-output (MIMO), uplink carrier aggregation (ULCA) and beamforming.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 27, 2021
    Assignee: ETA Wireless, Inc.
    Inventors: John R. Hoversten, Yevgeniy A. Tkachenko, Sri Harsh Pakala, James Garrett
  • Patent number: 10985466
    Abstract: The present disclosure discloses a terahertz detector based on a N×M dielectric resonant antenna array, wherein a N×M on-chip dielectric resonant terahertz antenna array is connected to a matching network, the matching network is connected to a source of a NMOSFET, a gate of the NMOSFET is sequentially connected to a first bias resistor and a first bias voltage, a third transmission line is connected between the first bias resistor and the gate, a drain of the NMOSFET is connected to a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to a low noise preamplifier, a second bias resistor and a second bias voltage are further connected between the first DC blocking capacitor and the low noise preamplifier, and the low noise preamplifier is further provided with a voltage feedback loop. The present disclosure also discloses a design method for the same.
    Type: Grant
    Filed: March 10, 2019
    Date of Patent: April 20, 2021
    Assignee: Guangdong University of Technology
    Inventors: Jianguo Ma, Shaohua Zhou
  • Patent number: 10985702
    Abstract: An envelope tracking system is disclosed having an envelope tracking integrated circuit (ETIC) with a first tracker having a first supply output and a second tracker having a second supply output, wherein the ETIC has a first mode in which only one of the first and second trackers supplies voltage and a second mode in which the first and second trackers both supply voltage. A first notch filter is coupled to the first supply output and a second notch filter is coupled to the second supply output. A mode switch coupled between the first supply output and the second supply output is configured to couple the first notch filter and the second notch filter in parallel in the first mode and open the mode switch to decouple the first notch filter from the second notch filter in the second mode in response to first and second switch control signals, respectively.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: April 20, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay
  • Patent number: 10978997
    Abstract: An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC includes a number of ET circuits configured to generate a number of ET voltages based on a number of ET target voltages, respectively. In examples discussed herein, a selected ET circuit among the ET circuits is configured to generate a respective ET voltage based on a maximum ET target voltage among the ET target voltages. In this regard, the respective ET voltage generated by the selected ET circuit can be used as a reference ET voltage for the rest of the ET circuits in the ETIC. As a result, it may be possible to opportunistically turn off or reduce functionality of one or more other ET circuits in the ETIC, thus helping to reduce peak battery current and improve heat dissipation in an ET amplifier apparatus incorporating the ETIC.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: April 13, 2021
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 10903796
    Abstract: A voltage generation circuit and related envelope tracking (ET) amplifier apparatus is provided. In examples discussed herein, a voltage generation circuit can be provided in an ET amplifier apparatus to provide a supply voltage to a voltage amplifier(s) that is configured to generate an ET voltage for an amplifier circuit(s). In a non-limiting example, the voltage amplifier(s) receives an ET target voltage signal corresponding to a time-variant target voltage envelope and generates the ET voltage conforming to the time-variant target voltage envelope. The voltage generation circuit is configured to generate one or more supply voltages and selectively provide one of the supply voltages to the voltage amplifier(s) in accordance to the time-variant target voltage envelope. By selectively providing the supply voltage based on the time-variant target voltage envelope, it may be possible to improve efficiency of the voltage amplifier, thus helping to improve efficiency and linearity of the amplifier circuit(s).
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: January 26, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay, Philippe Gorisse
  • Patent number: 10879850
    Abstract: Disclosed are a radio frequency power amplifier for inhibiting a harmonic wave and stray, a chip and a communication terminal. The radio frequency power amplifier comprises a power source, an LDO circuit, a harmonic inhibition unit, a stray inhibition unit, an amplifying unit, and a low-pass matching network. On the one hand, by means of the power source being connected to the harmonic inhibition unit, harmonic waves and stray of the power source at a resonant frequency are inhibited. Additionally, by means of the stray inhibition unit reducing the gain of the amplifying unit at a resonant frequency, output of stray is reduced. On the other hand, by means of the low-pass matching network being embedded at an output end of the radio frequency power amplifier, harmonic waves and the stray of a radio frequency signal amplified by the amplifying unit at different frequencies is effectively inhibited.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 29, 2020
    Assignee: VANCHIP (TIANJIN) TECHNOLOGY CO., LTD.
    Inventors: Jinxin Zhao, Yunfang Bai, Sheng Lin
  • Patent number: 10879852
    Abstract: A power management circuit and related radio frequency (RF) front-end circuit are provided. In examples discussed herein, a power management circuit can be incorporated into an RF front-end circuit to support RF beamforming in millimeter wave spectrum(s). In this regard, the power management circuit is configured to generate multiple output voltages to drive multiple power amplifier subarrays in the RF front-end circuit. More specifically, the power management circuit is configured to generate the output voltages based on a voltage scaling factor(s) such that each of the output voltages corresponds proportionally to a battery voltage received by the power management circuit. As such, the output voltages can be dynamically controlled based on the voltage scaling factor(s) to maximize operating efficiency of the power amplifier subarrays. As a result, it is possible to reduce heat dissipation of the power amplifier subarrays and improve overall thermal performance of the RF front-end circuit.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: December 29, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Alexander Wayne Hietala
  • Patent number: 10873297
    Abstract: Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: December 22, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventors: Sabah Khesbak, Serge Francois Drogi, Florinel G. Balteanu
  • Patent number: 10868499
    Abstract: An envelope tracking (ET) voltage tracker circuit is provided. The ET voltage tracker circuit is configured to generate a time-variant voltage based on a time-variant target voltage, which further corresponds to a time-variant power envelope of a radio frequency (RF) signal. The time-variant voltage may be provided to an amplifier circuit(s) for amplifying the RF signal. The ET voltage tracker circuit includes a target voltage processing circuit configured to pre-process the time-variant target voltage. More specifically, the target voltage processing circuit is configured to pre-process the time-variant target voltage based on a high-order transfer function when the time-variant target voltage corresponds to a higher modulation bandwidth (e.g., >80 MHz). As a result, it may be possible to improve temporal alignment between the time-variant voltage and the time-variant target voltage at the amplifier circuit(s), thus allowing the amplifier circuit(s) to operate with improved efficiency and linearity.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: December 15, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Philippe Gorisse, Nadim Khlat, Jean-Frederic Chiron
  • Patent number: 10862428
    Abstract: An envelope tracking system for controlling a power amplifier supply voltage includes envelope circuitry and a feed forward digital to analog converter (DAC) circuitry. The envelope circuitry is configured to generate a target envelope signal based on a selected power amplifier supply voltage. The feed forward DAC circuitry includes a voltage source circuitry and a selector circuitry. The voltage source circuitry is configured to generate a plurality of voltages. The selector circuitry is configured to select one of the plurality of voltages based at least on the target envelope signal. The feed forward DAC circuitry is configured to provide the selected voltage to a supply voltage input of a power amplifier that amplifies a radio frequency (RF) transmit signal.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: December 8, 2020
    Assignee: Apple Inc.
    Inventors: Stephan Henzler, Andreas Menkhoff, Thomas Eichler, Wolfgang Walthes, Alexander Belitzer, Yifan Wang
  • Patent number: 10862432
    Abstract: A power control circuit includes a voltage control circuit and a current control circuit. The voltage control circuit is configured to detect an output power control signal that is inputted, convert the output power control signal into a control voltage and output the control voltage to the driver stage of a power amplifier connected to the power control circuit. The current control circuit is configured to detect an output power control signal that is inputted, convert the output power control signal into a control current and output the control current to the amplification stage of the power amplifier.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 8, 2020
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Qiang Su, Baiming Xu, Jiangtao Yi, Yang Li
  • Patent number: 10819036
    Abstract: The present disclosure discloses a dielectric resonant antenna based NMOSFET terahertz detector, comprising an on-chip dielectric resonant terahertz antenna, wherein the on-chip dielectric resonant terahertz antenna is connected to a matching network, the matching network is connected to a source of an NMOSFET, and a gate of the NMOSFET is sequentially connected to a first bias resistor and a first bias voltage, a third transmission line is connected between the first bias resistor and the gate, a drain of the NMOSFET is connected to a first DC blocking capacitor, the other end of the first DC blocking capacitor is connected to a low noise preamplifier, a second bias resistor and a second bias voltage are connected in parallel between the first DC blocking capacitor and the low noise preamplifier, and the low noise preamplifier is further provided with a voltage feedback loop. The present disclosure also discloses a design method for the same.
    Type: Grant
    Filed: March 10, 2019
    Date of Patent: October 27, 2020
    Assignee: Guangdong University of Technology
    Inventors: Jianguo Ma, Shaohua Zhou
  • Patent number: 10790749
    Abstract: A system may include a first capacitor, a first switched-mode power supply configured to deliver energy from a power source to the first capacitor at an output load of the first switched-mode power supply, a second capacitor having a capacitance larger than the first capacitor, a second switched-mode power supply configured to deliver energy from the power source or a second power source to the second capacitor and one or more switching elements coupled between the first capacitor and the second capacitor. The system may operate in a plurality of modes, including a first mode in which the first switched-mode power supply transfers energy to the first capacitor and the second capacitor, a second mode in which the second capacitor transfers energy to the first capacitor, and a third mode in which first switched-mode power supply transfers energy to the first capacitor and the second capacitor and the second switched-mode power supply transfers energy to the first capacitor and the second capacitor.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: September 29, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Eric J. King, Eric B. Smith, Mark May
  • Patent number: 10763867
    Abstract: In one embodiment, a filter circuit is formed to include a transconductance amplifier. The filter circuit has one pair of capacitors connected between at least one input of the amplifier and an input signal that is to be filtered.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: September 1, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Masayuki Kanematsu
  • Patent number: 10763790
    Abstract: Techniques are described for using valley detection for supply voltage modulation in power amplifier circuits. Embodiments operate in context of a power amplifier circuit configured to be driven by a supply voltage generated by a supply modulator and to receive an amplitude-modulated (AM) signal at its input. The output of the power amplifier circuit can be fed to a valley detector that can detect a valley level corresponding to the bottom of the envelope of the AM signal. The detected valley level can be fed back to the supply modulator and compared to a constant reference. In response to the comparison, the supply modulator can vary the supply voltage to the power amplifier circuit in a manner that effectively tracking the envelope of the power amplifier circuit's output signal, thereby effectively seeking a flat valley for the output signal's envelope.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: September 1, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ahmed Emira, Siavash Yazdi, Kaveh Moazzami
  • Patent number: 10707822
    Abstract: A dynamic power supply (DPS) for polar modulation transmitters and envelope tracking (ET) transmitters includes a direct current (DC)-DC converter, a linear amplitude modulator (LAM) connected in series with the DC-DC converter, and a controller that dynamically controls both the switching of the DC-DC converter and the magnitude of the LAM's reference voltage, depending on time-varying changes in an input envelope voltage Venv. The DC-DC converter includes a high-power buck switching stage and an output energy storage network having a third-order or higher low-pass filter (LPF). The third-order or higher LPF filters out switching noise and ripple from the switching voltage produced by the high-power buck switching stage, and in one embodiment of the invention is augmented by a damping network that eliminates undesirable ringing at the power supply input of the LAM, thereby increasing efficiency and DPS conversion precision.
    Type: Grant
    Filed: September 7, 2019
    Date of Patent: July 7, 2020
    Assignee: Eridan Communications, Inc.
    Inventor: Waclaw Godycki
  • Patent number: 10686414
    Abstract: The present invention provides a class-G amplifier, wherein the class-G amplifier includes an amplifier stage, an impedance detector and a power source. In the operations of the class-G amplifier, the amplifier stage is supplied by a supply voltage, and amplifies an input audio signal to generate an output audio signal, and the impedance detector is configured to detect an output impedance of the amplifier stage to generate a detection result, and the power source refers to the detection result to determine a level and a switching frequency of the supply voltage.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: June 16, 2020
    Assignee: MEDIATEK INC.
    Inventors: Sung-Han Wen, Chien-Ming Chen, Chuan-Hung Hsiao
  • Patent number: 10651876
    Abstract: An example method according to some embodiments includes receiving, from a modulator, a phase-modulated carrier output signal having a carrier center frequency that is a non-integer multiple of a desired carrier center frequency; generating, by an injection-locked ring oscillator (ILRO), a plurality of phases of the phase-modulated carrier output signal at a plurality of outputs of the ILRO; generating a decoupled fractional frequency output signal by sequentially selecting, using a multiplexer, successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases, the decoupled fractional frequency output signal having a center frequency equal to an integer multiple of the desired carrier center frequency; and generating, based on the decoupled fractional frequency output signal, a desired phase-modulated carrier output signal that is decoupled from the modulator, the desired phase-modulated carrier output signal having a generated carrier center frequency equal to the
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: May 12, 2020
    Assignee: Innophase Inc.
    Inventors: Roc Berenguer Perez, Yang Xu
  • Patent number: 10622957
    Abstract: An integrated circuit, a circuit assembly and a method for operation the integrated circuit are disclosed. In embodiments an integrated circuit includes at least one supply voltage terminal configured to receive a supply voltage for operation of the integrated circuit, at least one input terminal configured to receive an analog input signal corresponding to an audio signal, at least one output terminal configured to provide an analog output signal, a signal strength detector configured to detect a signal strength of the analog input signal provided at the at least one input terminal and a signaling circuit configured to indicate an amplification setting of the integrated circuit at the at least one output terminal, wherein the integrated circuit is configured to amplify the audio signal based on the detected signal strength and to output a corresponding amplified signal at the at least one output terminal.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: April 14, 2020
    Assignee: TDK CORPORATION
    Inventors: Pirmin Hermann Otto Rombach, Gino Rocca, Anton Leidl, Armin Schober
  • Patent number: 10574199
    Abstract: The purpose of the present invention is to provide an amplifier having high signal-to-noise ratio of a transmitted signal and high electrical efficiency. Another purpose is to suppress complexity of amplifier's wiring connecting a signal generator that generates a binary digital signal and an amplification unit that amplifies the same. This amplifier generates a binary digital signal. The amplifier further generates a K-value digital signal (K is an integer greater than or equal to 3) from the binary digital signal and generating a plurality of binary digital signals from the K-value digital signal. The amplifier amplifies each of the plurality of binary digital signals, and combines the plurality of amplified binary digital signals and generating a combined signal having a substantially proportional relationship with the K-value digital signal.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: February 25, 2020
    Assignee: NEC CORPORATION
    Inventors: Shinichi Hori, Tomoyuki Yamase, Masaaki Tanio
  • Patent number: 10566935
    Abstract: An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: February 18, 2020
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Margaret A. Szymanowski
  • Patent number: 10523164
    Abstract: A semiconductor integrated circuit including a differential amplifier circuit, a first output circuit, a second output circuit, a selection circuit, and a feedback circuit. The differential amplifier circuit is configured to operate at a first source voltage. The first output circuit is configured to receive an output of the differential amplifier circuit, output a first output, and operate at the first source voltage. The second output circuit is configured to receive an output of the differential amplifier circuit, output a second output, and operate at a second source voltage lower than the first source voltage. The selection circuit is configured to select one of the first output from the first output circuit and the second output from the second output circuit according to an operating phase determined by an external control signal. The feedback circuit is connected between the differential amplifier circuit and the selection circuit.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: December 31, 2019
    Assignee: RICOH COMPANY, LTD.
    Inventors: Sho Kamezawa, Tohru Kanno
  • Patent number: 10491162
    Abstract: An envelope tracking (ET) amplifier circuit is provided. In examples discussed herein, an amplifier circuit(s) is configured to amplify a radio frequency (RF) signal based on an ET modulated voltage. A tracker circuit is configured to generate the ET modulated voltage based on a number of target voltage amplitudes derived from a time-variant signal envelope of the RF signal. However, the tracker circuit can cause the ET modulated voltage to deviate from the target voltage amplitudes due to various impedance variations. In this regard, a voltage memory digital pre-distortion (mDPD) circuit digitally pre-distorts the target voltage amplitudes based on the time-variant signal envelope such that the ET modulated voltage can closely track the target voltage amplitudes. As such, it is possible to mitigate ET modulated voltage deviation, thus helping to improve overall linearity performance of the ET amplifier circuit.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: November 26, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Jean-Frederic Chiron, Nadim Khlat, Andrew F. Folkmann, Michael R. Kay
  • Patent number: 10469042
    Abstract: Apparatus and associated methods relating to the amplification of an audio signal. In particular, such application is performed by using an audio to pulse train converter configured to convert an analog audio signal to a complementary train of pulses having a duty cycle indicative of the level of the analog audio signal. The audio to pulse train converter can be a class-D amplifier, a sigma-delta amplifier, self-oscillating amplifier, or any other audio amplifier that is configured to provide complementary pulse trains each having a duty cycle that is representative of the input audio signal. The complementary pulse trains are directed to a circlotron that is configured to provide an amplified version of the audio signal at two output nodes. The amplifier circuit may further include one or more low pass filters and/or output reference resistors. Two similar circuits can be configured together to provide stereo audio amplification.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: November 5, 2019
    Inventor: Ralph R. Karsten
  • Patent number: 10425049
    Abstract: A wireless electric power transmitter for transmitting electric power for a charging function to a wireless electric power receiver is provided. The wireless electric power transmitter includes an electric power supply unit which supplies electric power; an amplifier which amplifies and outputs the electric power supplied from the electric power supply unit by a preset gain as a magnitude of measured impedance increases; and a transmitter which transmits the amplified electric power to the wireless electric power receiver.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: September 24, 2019
    Assignees: Samsung Electronics Co., Ltd, Korea Advanced Institute of Science and Technology
    Inventors: Sung-Ku Yeo, Song-Cheol Hong, Duk-Ju Ahn, Gwang-Hyeon Jeong, Se-Ho Park, Min-Cheol Ha
  • Patent number: 10411661
    Abstract: An apparatus for power amplifier control is provided, applied to a multi-stage power amplifier. The apparatus controls an input voltage of an amplification triode in the first amplification stage, by using a detected current change at a base of an amplification triode in the last amplification stage, achieving control of output power and a maximum output current of the multi-stage power amplifier, greatly reducing an influence of current detection on maximum output power and maximum output efficiency of the power amplifier.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: September 10, 2019
    Assignee: BEIJING HUNTERSUN ELECTRONIC CO., LTD.
    Inventors: Hao Meng, Yongxue Qian, Tin Wai Kwan
  • Patent number: 10396716
    Abstract: An amplifier may include control circuitry that may track a first input signal parameter and, in response, adjust a value of a second input parameter. Input parameter tracking and adjustment may facilitate control of output parameters for the amplifier. For example, an envelope-tracking amplifier may track input signal amplitude and adjust other input parameters in response. The adjustments may facilitate control of output parameters, such as gain or efficiency. The amplifier may further include calibration circuitry to determine adjustment responses to various tracked input parameters.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: August 27, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Ali Afsahi, Debopriyo Chowdhury, Rethnakaran Pulikkoonattu, Sraavan Mundlapudi
  • Patent number: 10298191
    Abstract: In a power amplifier module for performing slope control of a transmitting signal, a gain variation due to a variation in battery voltage is suppressed while suppressing an increase in circuit size. The power amplifier module includes: a first regulator for outputting a first voltage corresponding to a control voltage for controlling a signal level; a second regulator for outputting a second voltage that rises as a battery voltage drops; a first amplifier supplied with the first voltage as a power-supply voltage to amplify an input signal and output an amplified signal; and a second amplifier for amplifying the amplified signal, wherein the second amplifier includes a first amplification unit supplied with the second voltage as the power-supply voltage to amplify the amplified signal, and a second amplification unit supplied with the battery voltage as the power-supply voltage to amplify the amplified signal.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: May 21, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takayuki Tsutsui, Tadashi Matsuoka, Satoshi Tanaka
  • Patent number: 10277177
    Abstract: A variable load power amplifier that improves the performance of a power amplifier that provides both envelope tracking (ET) and average power tracking (APT). The variable load power amplifier can include a plurality of amplifiers that are each selectively connectable into one of a plurality of parallel combinations, each of the plurality of parallel combinations characterized by a corresponding load line. The variable load power amplifier can also include a plurality of control elements arranged to selectively connect one or more of the plurality of amplifiers into one of the plurality of parallel combinations, each of the plurality of control elements having a respective input terminal provided to receive a respective control signal, each of the plurality of control elements responsive to the respective control signal.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 30, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Sabah Khesbak, Florinel G. Balteanu, Hardik Bhupendra Modi
  • Patent number: 10270345
    Abstract: An efficient power supply with fast, wideband response has been disclosed. In one implementation, two switching regulators with different frequency responses are combined to provide wideband, efficient power.
    Type: Grant
    Filed: July 23, 2017
    Date of Patent: April 23, 2019
    Inventor: Sridhar Kotikalapoodi
  • Patent number: 10250190
    Abstract: A method for biasing a power amplifier using a transmission signal having a time-varying envelope is provided. The method comprises producing a time-varying signal indicative of an amplitude of the envelope of the transmission signal and comparing the time-varying signal to a plurality of distinct threshold voltages. The method further comprises, for each of the plurality of distinct threshold voltages exceeded by the time-varying signal, providing a respective bias voltage to a respective input of a summing device and producing, using the summing device, an output bias voltage that is at least a sum of the respective bias voltages provided to the respective inputs of the summing device. The method further comprises biasing the power amplifier with the output bias voltage and amplifying the transmission signal using the power amplifier biased at the output bias voltage.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: April 2, 2019
    Assignee: ZTE CORPORATION
    Inventors: Andrey Kochetkov, Ying Shen, Shawn Walsh, Thanh Nguyen, Aleksandr Semenyshev, Zhiping Feng
  • Patent number: 10243476
    Abstract: A power conversion device includes a switching circuit and a switch driver. The switching circuit includes a plurality of switching elements including a first switching element and a second switching element that are electrically coupled in series. The switch driver includes a first, a second, and a third switching pattern controller. The first switching pattern controller executes a first switching pattern which is set such that a current in a reverse direction flows through the first switching element and the second switching element is off. The second switching pattern controller executes a second switching pattern which is set such that a direction of the current flowing through the first switching element is switched to a forward direction from the reverse direction. The third switching pattern controller executes a third switching pattern which is set such that the first switching element is off and the second switching element is on.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: March 26, 2019
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Tetsumi Narita, Sadao Ishii, Takashi Kuboyama, Shinsuke Kajiwara
  • Patent number: 10230340
    Abstract: A wide modulation bandwidth radio frequency (RF) circuit is provided. In examples discussed herein, the RF front-end circuit includes a tracker circuit configured to generate a modulated voltage at a wide modulation bandwidth. The modulated voltage can be used by an amplifier circuit(s) for amplifying an RF signal(s). Notably, the tracker circuit may have inherent frequency-dependent impedance that can interact with a load current of the amplifier circuit(s) to cause degradation in the modulated voltage, which can further lead to distortions in an RF offset spectrum. In this regard, a notch circuit is provided and configured to operate at an appropriate notch frequency and a notch bandwidth to filter the modulated voltage in the RF offset spectrum. As a result, it may be possible to reduce the distortions caused by the modulated voltage degradation in the RF offset spectrum, thus helping to improve linearity and efficiency of the amplifier circuit(s).
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: March 12, 2019
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Michael R. Kay