Oscillator Supplies Or Controls Bias Patents (Class 330/137)
  • Patent number: 10090811
    Abstract: A system for power amplifier over-voltage protection includes a power amplifier configured to receive a system voltage, a bias circuit configured to provide a bias signal to the power amplifier, and a power amplifier over-voltage circuit configured to interrupt the bias signal when the system voltage exceeds a predetermined value, while the system voltage remains coupled to the power amplifier.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: October 2, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventors: David Steven Ripley, Joel Anthony Penticoff
  • Patent number: 9601077
    Abstract: A circuit includes a reference signal generating part configured to generate a plurality of reference signals having levels different from each other, a comparing part configured to compare a ripple signal with the reference signals to determine a level of the ripple signal, a compensating signal generating part configured to generate a compensation ripple signal corresponding to the level of the ripple signal, where the compensation ripple signal has a phase opposite to the ripple signal, and a push-pull circuit configured to stabilize the compensation ripple signal.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: March 21, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Woon-Yong Lim, Tong-Ill Kwak, Min-Ho Park, Yong-Jin Shin, Tae-Gwang Jung, Bong-Kyun Jo, Ki-Hyun Pyun
  • Patent number: 9453909
    Abstract: An ultrasonic pulse-echo ranging device includes a piezo-electric transducer, a transmitter, a receiver, a first transformer having a primary winding coupled to an output of the transmitter and a secondary winding connected to the transducer, and a second transformer having a primary winding coupled to an input of the receiver and a secondary winding connected to the transducer, where the secondary windings of the first and second transformers are in series with the transducer, a first switching element is parallel with the primary winding of the first transformer and controlled to short-circuit this primary winding when the receiver receives the signals from the transducer, and where a second switching element is parallel with the primary winding of the second transformer and controlled to short-circuit this primary winding of when the transmitter drives the transducer to optimize the signal transfer to and from the piezo-electric transducer.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: September 27, 2016
    Assignee: Siemens Aktiengesellschaft
    Inventor: George Burcea
  • Patent number: 8928423
    Abstract: A narrow band receiver or transceiver for processing electrical signals. The narrow band receiver or transceiver includes an amplifier, a voltage controlled oscillator and a tuning assembly comprising at least one control loop for tuning of the voltage controlled oscillator. At least a gain control of the amplifier is coupled to the control loop for simultaneously tuning the output amplitude of the voltage controlled oscillator and the gain of the amplifier. A compensation of the effect of variation on the gain of the amplifier, which includes an LC tank circuit, is performed by using an information in another LC tank circuit of the voltage controlled oscillator in the control loop.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: January 6, 2015
    Assignee: EM Microelectronic-Marin S.A.
    Inventors: Armin Tajalli, Marc Morin
  • Patent number: 8704607
    Abstract: The pulse modulated RF power control method includes an output amplitude control step for controlling amplitude of a pulse output, and a duty control step for controlling a duty ratio of the pulse output. The output amplitude control step performs a constant amplitude control to control an amplitude value of the pulse output so that the amplitude value becomes equal to a set amplitude value. The constant amplitude control according to the output amplitude control, for instance, gives a feedback of the amplitude value of the pulse output outputted by the power control, obtains a difference value between the feedback value and the set amplitude value, and controls the amplitude value of the pulse output so that the difference value becomes zero.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: April 22, 2014
    Assignee: Kyosan Electric Mfg. Co., Ltd.
    Inventors: Itsuo Yuzurihara, Yoshihisa Hata
  • Patent number: 8624669
    Abstract: An apparatus and method for DC offset compensation. An amplifier receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) and a counter. The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer so as to sequentially produce the first and second VCO output signals.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: January 7, 2014
    Assignee: Wolfson Microelectronics plc
    Inventor: John Paul Lesso
  • Publication number: 20130249630
    Abstract: An illustrative system includes an amplifier operably connected to a phase shifter. The amplifier is configured to amplify a voltage from an oscillator. The phase shifter is operably connected to a driving amplitude control, wherein the phase shifter is configured to phase shift the amplified voltage and is configured to set an amplitude of the phase shifted voltage. The oscillator is operably connected to the driving amplitude control. The phase shifted voltage drives the oscillator. The oscillator is at an internal resonance condition, based at least on the amplitude of the phase shifted voltage, that stabilizes frequency oscillations in the oscillator.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 26, 2013
    Inventors: Omar Daniel Lopez, Dario Antonio
  • Patent number: 8416019
    Abstract: A digitally-controlled analog gain circuit supports a plurality of gain settings in which gain changes are made from a first setting to a new setting in response to a clocking signal. Large changes in gain are interpolated in small gain steps or increments. The clocking signal can be generated by an oscillator, or as a sequence of pulses output by a zero crossing detector. The gain circuit can apply positive gain to the signal. Alternatively, the gain circuit can apply a negative gain (attenuation) to the signal. The clocking signal can be provided in a pseudo-randomized manner to minimize unwanted signal effects such as discernable sound transients.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: April 9, 2013
    Assignee: THAT Corporation
    Inventors: Robert W. Moses, Leslie B. Tyler, Christopher Hanna
  • Patent number: 8258870
    Abstract: A digitally-controlled analog gain circuit supports at plurality of gain settings in which gain changes are made from a first setting to a new setting in response to a clocking signal of a non-uniform rate. The non-uniform rate clocking signal can be created pseudo randomly by applying a periodic sequence of clock pulses to a linear feedback shift register. Alternatively, the non-uniform rate clock signal can be created by applying a noise source to a phase detector input of a phase locked loop. The clocking signal can be generated by an oscillator, or as a sequence of pulses output by a zero crossing detector. Finally, the gain circuit can apply positive gain to the signal. Alternatively, the gain circuit can apply a negative gain (attenuation) to the signal.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: September 4, 2012
    Assignee: THAT Corporation
    Inventors: Robert W. Moses, Christopher M. Hanna
  • Patent number: 8145149
    Abstract: Embodiments for at least one method and apparatus of a wireless transceiver are disclosed. For one embodiment, the wireless transceiver includes a transmit chain, wherein the transmit chain includes a power amplifier. The wireless transceiver additionally includes a receiver chain that is tunable to receive wireless signals over at least one of multiple channels, wherein the multiple channels are predefined. Further, the wireless transceiver includes a voltage converter. The voltage converter provides a supply voltage to the power amplifier, and operates at a single switching frequency, wherein the single switching frequency and all harmonics of the single switching frequency fall outside of the multiple channels.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: March 27, 2012
    Assignee: R2 Semiconductor, Inc
    Inventors: Ravi Ramachandran, Frank Sasselli
  • Patent number: 7567641
    Abstract: Because of the natural ability to reject clock jitter, the SRC circuits include an internal oscillator to provide an operating clock signal. The internal oscillator can be operated independently of any external frequency control signal, including input and output frame clocks. The internal oscillator can be implemented as a relatively low-cost fixed frequency oscillator. The use of a relatively low precision, inexpensive internal oscillator in an SRC circuit reduces the overall cost of SRC circuits while providing acceptable performance. Accordingly, reducing costs of SRC circuits also has a positive cost/benefit affect on the digital signal processing systems that use SRC circuits.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: July 28, 2009
    Assignee: Cirrus Logic, Inc.
    Inventor: Gautham D. Kamath
  • Patent number: 7512387
    Abstract: A system for controlling a power supplied to a load from a radio frequency amplifier system includes a radio frequency signal generator adapted for generating a radio frequency signal, an amplifier to which the radio frequency signal is supplied and that amplifies the radio frequency signal into a radio frequency power signal, a power coupler connected to the amplifying member for coupling the radio frequency power signals, where the power coupler includes a summing connection adapted for connection to the load and a compensating connection adapted for connection to a dissipative element. A first control value generating member is adapted for receiving a signal proportional to a power output from the power coupler at the summing connection and is adapted for generating a first control signal for controlling the amplifier or a current supply that supplies current to the amplifier.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: March 31, 2009
    Assignee: Huettinger Elektronik GmbH + Co. KG
    Inventor: Michael Glueck
  • Publication number: 20040192234
    Abstract: An amplifier for arbitrary waveforms, including a chaotic oscillator circuit having a coupling element for receiving an information signal. A load is connected to the chaotic oscillator circuit. The oscillation of the chaotic oscillator circuit synchronizes to the information signal and delivers an output signal substantially identical to the information signal and dissipates a power in the load amplified with respect to the information signal. The chaotic oscillator optionally uses an active element such that when synchronized it is in a non-linear operating region. Optionally, the error between the information signal and output voltage is minimized by controlling the volume of the chaotic oscillator in response to the error.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Inventors: Chance Michael Glenn, Scott T. Hayes
  • Patent number: 6750708
    Abstract: A buffer amplifier is provided which includes an amplifying transistor, an inductance element for feeding power to the collector of the amplifying transistor from a power supply, a resistance attenuator having an input end, an output end, and a ground end, and an output terminal connected to the resistance attenuator. The input end of the resistance attenuator is directly connected to the collector of the amplifying transistor. The ground end is connected to the power supply. The output end is connected to the output terminal through a coupling capacitor.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: June 15, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventor: Yasuhiro Ikarashi
  • Patent number: 6608524
    Abstract: In a state where a PLL circuit is not locked, a gain control signal according to the difference between a peak value of a reproduced signal and the upper or lower limit value of the dynamic range of an A/D converter is given to a variable gain amplifier. In a state where the PLL circuit is locked, a gain control signal according to the difference between the reproduced signal and a reference value that corresponds to a level to which the reproduced signal belongs is given to the variable gain amplifier for each sampling point of the A/D converter. The variable gain amplifier amplifies the reproduced signal with a gain according to the gain control signal.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: August 19, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Kawabe, Kouji Okamoto
  • Patent number: 6570443
    Abstract: There is described an amplitude-controlled electronic device (1) intended to generate at an output (11; 11a) an alternating output signal (S1; Sosc) of substantially constant amplitude. This electronic device includes a measuring branch (20; 20*; 201) for generating a measuring voltage (Vout) representative of the amplitude of the output signal (S1; Sosc) and means for generating a reference voltage (Vref) including a reference branch (40; 40*; 400) matched with the measuring branch and at the input (A) of which a voltage reference (U0) is selectively switched. A comparator (30; 300) is arranged for comparing the measuring and reference voltages and generating in response a control signal (Sc) which is applied on a control terminal (12) of the electronic device. According to the invention, the matching of the measuring and reference branches allows the sensitivity of the control signal to temperature and manufacturing process variations to be substantially cancelled.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 27, 2003
    Assignee: Asulab S.A.
    Inventor: Arnaud Casagrande
  • Publication number: 20020186081
    Abstract: In a state where a PLL circuit is not locked, a gain control signal according to the difference between a peak value of a reproduced signal and the upper or lower limit value of the dynamic range of an A/D converter is given to a variable gain amplifier. In a state where the PLL circuit is locked, a gain control signal according to the difference between the reproduced signal and a reference value that corresponds to a level to which the reproduced signal belongs is given to the variable gain amplifier for each sampling point of the A/D converter. The variable gain amplifier amplifies the reproduced signal with a gain according to the gain control signal.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 12, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Kawabe, Kouji Okamoto
  • Patent number: 6087901
    Abstract: A tuning amplifier 1 is provided with an oscillation circuit 10 incorporating an amplifier circuit 11 and a feedback circuit 12, an input circuit 14 which inputs signals to the oscillation circuit 10, and an automatic gain control (AGC) circuit 16 which controls the output amplitude of the oscillation circuit 10. When signals are inputted to the oscillation circuit 10 through the input circuit 14, such tuning that only signals having frequencies near the oscillation frequency of the oscillation circuit 10 are allowed to pass through is possible.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: July 11, 2000
    Assignee: T.I.F. Co., Ltd
    Inventors: Tsutomu Nakanishi, Akira Okamoto
  • Patent number: 5963087
    Abstract: The present invention provides for a gain control circuit (10) and method for providing gain control of a variable amplification circuit (16) using a pilot signal. A pilot signal is added to the received signal. The pilot signal has at least a minimum signal level which when added to the signal received insures the sampled input signal has a level above the point where offset or low power errors are experienced. Preferably the pilot signal will be a sinusoidal signal having a frequency within the operational bandwidth of the amplifier (16), but outside the frequency range of the input signal.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: October 5, 1999
    Assignee: Motorola, Inc.
    Inventor: Mark Brian Anderson
  • Patent number: 5960333
    Abstract: A method and circuitry for improved output power level calibration/compensation/control is disclosed. A single RF detector diode is employed, to which a bias current is applied prior to applying a coupled amount of the transmitted radio frequency signal to be measured during a level calibration or automatic level control function. The initial (pre-RF) voltage out of the detector circuit is stored and later subtracted from the detector's output voltage after application of the RF signal. This results in a voltage proportional only to the detected RF signal, independent of any circuit-dependent voltages and variations due to environmental conditions such as temperature fluctuation, and allowing precise control of the output power levels.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: September 28, 1999
    Assignee: Ericsson Inc.
    Inventors: Joe Repke, Cornelius Adrianus Henricus Maria Van Puijenbroek
  • Patent number: 5874860
    Abstract: A monolithic RF amplifier circuit (10) suitable for use in the 0.8-2 GHz frequency range comprises, on-chip (12'), a gateable oscillator (24) running at about 2-5 times the amplifier input frequency or higher, coupled to a rectifier (30) and a low pass filter (34) for producing a DC signal which is fed via a bias/gain control circuit (46) to a bias/gain inputs (56, 58) of one or more amplification stages (60, 62) (e.g. GaAs FET) to provide bias therefore to ensure safe operation, and a priority control circuit (42) responsive to the bias. The priority control circuit (42) operates a power switch (18) that couples the amplification stages (60,62) to a power supply, only when bias is present on their bias/gain inputs (56,58) This protects the amplification stages (60,62) against overcurrent operation. A separate external port (68) to the bias/gain control circuit (46) adjusts the magnitude of the bias to permit amplifier gain and power output to be adjusted.
    Type: Grant
    Filed: December 4, 1996
    Date of Patent: February 23, 1999
    Assignee: Motorola, Inc.
    Inventors: Dominique Brunel, Jacques Trichet
  • Patent number: 5784689
    Abstract: A higher output of two outputs from a trapezoidal wave generating circuit 4 and a pulse generating circuit 5 is produced. The control voltage signal is formed by combining the trapezoidal wave signal and the pulse signal. Sharp rising and falling edges of the pulse voltage are selected for controlling the transmission power amplifying circuit 1 in a voltage range below a predetermined voltage level, whereas gentle rising and falling edges of the trapezoidal wave signal are used for controlling the circuit 1 in a voltage range above that voltage level.
    Type: Grant
    Filed: December 26, 1995
    Date of Patent: July 21, 1998
    Assignee: NEC Corporation
    Inventor: Takeshi Kobayashi
  • Patent number: 5714908
    Abstract: An amplifier amplifies a signal derived from the output of a voltage-controlled oscillator. The frequency control voltage applied to the voltage-controlled oscillator is also applied, after suitable level conversion, to the amplifier as a gain control signal, to correct frequency-dependent power deviation of the amplifier.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: February 3, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Chusei Takahashi
  • Patent number: 5327583
    Abstract: In a mobile radio communication device, a gain of a GaAs FET for high frequency power amplification is controlled by a negative voltage based on a clock signal generated by a microcomputer in the device.
    Type: Grant
    Filed: August 12, 1991
    Date of Patent: July 5, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Shinji Yamada, Akira Masuda
  • Patent number: 5196806
    Abstract: An output level control circuit for a high frequency power amplifier for amplifying high frequency signals having the "on" and "off" periods of transmit signals in a fixed recurrent cycle such as in a TDMA radio communication system or a GSM system. The high frequency detecting circuit for the output level control circuit is responsive to part of the output of the high frequency power amplifier and a control signal corresponding to said "on" and "off" periods of transmission power for generating an output level control signal for the high frequency power amplifier. The high frequency detecting circuit has detecting means for detecting the wave height of the high frequency signals and differential voltage generating means for generating, for each of said recurrent cycles, a differential voltage between the detection output during the "on" period and the detection output during the "off" period immediately preceding it.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: March 23, 1993
    Assignee: NEC Corporation
    Inventor: Masaki Ichihara
  • Patent number: 5194823
    Abstract: Modulation device for an RF power amplifier. A correction of the modulation pulse is defined from the non-linear control characteristic of the RF power amplifier (2) such that the influence on the desired output pulse shape caused by the non-linear control characteristic is first compensated for without involvement of a controller. When, due to disturbances acting on the amplifier, changes of the control characteristics or of the RF gain and, consequently deviations in the pulse shape and power occur, then the controller corrects these deviations during the pulse transmission. The modulation device is used in RF transistor power amplifiers having a pulse modulation input.
    Type: Grant
    Filed: December 3, 1991
    Date of Patent: March 16, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventors: Peter Wendt, Gerold Friedrich
  • Patent number: 5175749
    Abstract: An apparatus automatically corrects for DC offset in a multi-level packet-switched receiver. A reference carrier frequency is used during the receiver's idle mode to establish a DC offset exiting a discriminator (302). The DC offset is amplified by a video amplifier (315) and fed into an error amplifier (320) which generates the negative of the DC offset. The DC offset and the negative of the DC offset are input into a summing network (330) resulting in a zero DC offset exiting the video amplifier (315).
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: December 29, 1992
    Assignee: Motorola, Inc.
    Inventors: David A. Ficht, Gary D. Schulz
  • Patent number: 4996500
    Abstract: An automatic power control system compensates for temperature variable components in a broadband signal generator by providing a reference signal generating circuit that is temperature matched with an automatic level control feedback circuit. The temperature matched components are either monolithic or placed in substantial thermal contact with one another. The signals from the matched signal paths are input to a summing circuit such that the effect of any temperature variation in one path is exactly offset by the corresponding temperature variation in the other path.
    Type: Grant
    Filed: October 24, 1989
    Date of Patent: February 26, 1991
    Assignee: Hewlett-Packard Company
    Inventors: Ronald K. Larson, John L. Imperato
  • Patent number: 4994757
    Abstract: Circuitry changes the magnitude of power supply voltages to correspond to the desired level of a variable output power. This maximizes the electrical power efficiency of amplifiers. The circuitry also provides for automatic control of the amplitude of the amplifier output signal.
    Type: Grant
    Filed: November 1, 1989
    Date of Patent: February 19, 1991
    Assignee: Motorola, Inc.
    Inventors: Robert H. Bickley, Richard A. Bory
  • Patent number: 4873492
    Abstract: An automatic gain control circuit for an amplifier operating over a prescribed frequency range detects the output level of the amplifier; and couples a repeated predetermined waveform occurring at a rate greater than the reciprocal of twice the upper frequency of the prescribed frequency range to the output level signal. The waveform varying level signal is compared to a reference threshold to control the gain of the amplifier through a switched resistive elemement in the amplifier feedback path. The repeated waveform variations about the amplifier output level causes the value of the switched resistance to vary as a function of the output level. A low pass filter connected to the amplifier output removes switching transients resulting from the high frequency changes in the switched resistive element. The gains of a plurality of amplifiers may be determined by a common control for accurate tracking over a wide dynamic range.
    Type: Grant
    Filed: December 5, 1988
    Date of Patent: October 10, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Robert E. Myer
  • Patent number: 4670719
    Abstract: An automatic gain control circuit includes a gain controllable amplifier, a sampling circuit sampling the output of the amplifier, a rewritable memory storing a contrast digital value, an analog/digital converter converting the sampled signal into a digital signal, a comparator comparing the digital signal with the contrast digital value and producing a comparator output when the digital signal and the contrast digital value are a predetermined relationship, the memory changing the storing content with the digital signal as a new contrast digital value in response to the comparator output, a digital/analog converter converting the contrast digital value into an analog value to be applied to the amplifier to produce a constant level output from the amplifier. The automatic gain control circuit may include a first counter and a second counter to determine the attack time and the recovery time.
    Type: Grant
    Filed: December 5, 1985
    Date of Patent: June 2, 1987
    Assignee: NEC Corporation
    Inventor: Toyoaki Sakurai
  • Patent number: 4591809
    Abstract: A power source consisting of a low power high frequency oscillator section driving a high power high gain amplifier section. The amplifier section includes one or more SIT's. The dc operating potential is applied to the drain electrode of one of the SIT's and is supplied to the other through a dc path from the source electrode of the one SIT to the drain electrode of the other. Operating potential from the dc biasing network between the gate and source electrodes of an SIT in the amplifier section is conducted through a dc path to a transistor in the oscillator section to provide operating power for the oscillator section. The oscillator output is connected through a high frequency coupling dc blocking path to the amplifier input to provide a drive signal to be amplified and extracted at the amplifier output.
    Type: Grant
    Filed: December 24, 1984
    Date of Patent: May 27, 1986
    Assignee: GTE Laboratories Incorporated
    Inventors: Robert J. Regan, Scott J. Butler, Zvi Ben-Aharon
  • Patent number: 4570127
    Abstract: An AGC circuit for amplifying burst signals has output power which does not vary, regardless of variations in the burst time. This automatic gain control (AGC) circuit has an amplifier for receiving a burst signal input and providing an amplified burst output. The level of amplification is controlled in response to a control signal applied to the amplifier. A negative feedback circuit includes an envelope detector for receiving the burst output and a circuit for providing a comparison signal in response to a comparison between the voltage leads of the detected envelope signal and a reference voltage. The comparison signal is converted into a binary signal which is counted down to provide the amplifier control signal.
    Type: Grant
    Filed: January 9, 1984
    Date of Patent: February 11, 1986
    Assignee: NEC Corporation
    Inventors: Yoshio Tanimoto, Masaaki Atobe
  • Patent number: 4514701
    Abstract: An amplitude control circuit of the invention includes a vector composition circuit (18) for composing a cosine-wave signal (e3) from a sine-wave signal (e1) and a control signal generation circuit (20) for providing a control signal (e4) from the sine- and cosine-wave signals (e1, e3) which the control signal (e4) has substantially no ripples. DC level of the control signal (e4) is varied proportional to the amplitude of the sine-wave signal (e1) regardless of the frequency of the sine-wave signal (e1). The amplitude of an amplification control circuit (12) is controlled by the control signal (e4) so that the amplitude of the oscillation output signal (e1) derived from the oscillation circuit (16) is constant.
    Type: Grant
    Filed: April 4, 1983
    Date of Patent: April 30, 1985
    Inventor: Kenji Machida
  • Patent number: 4350962
    Abstract: An amplifier circuit incorporating a valve or vacuum tube in the grounded grid configuration is disclosed. The anode D.C. potential is greater than the cathode D.C. potential which is in turn greater than the grid D.C. potential. The cathode is switched at an R.F. rate to a further D.C. potential below that of the grid. Preferably the grid potential substantially cuts off cathode current flow with the switch open. The amplifier finds particular application as an output amplifier in an A.M. R.F. transmitter with the modulation being provided by high level anode modulation. The tube or valve can be a triode, tetrode, or pentode.
    Type: Grant
    Filed: September 4, 1980
    Date of Patent: September 21, 1982
    Assignee: T.B.C. Pty. Limited
    Inventor: Ian L. Hill
  • Patent number: 4194164
    Abstract: An R.F. signal generator is arranged to provide an output signal having a controlled level, by means of a feedback loop into which an additional frequency dependent control signal is injected. This additional control signal is derived from a resistor network in which particular resistors, or combinations thereof, are selected in dependence on the output frequency of the signal generator.
    Type: Grant
    Filed: November 7, 1978
    Date of Patent: March 18, 1980
    Assignee: Marconi Instruments Limited
    Inventor: David P. Owen