Abstract: Compression control through amplitude adjustment of a radio frequency input signal. A power amplifier module can include a power amplifier. The power amplifier can include a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a power amplifier bias controller. The power amplifier bias controller can include a current comparator, a saturation controller, and a radio frequency (RF) attenuator. The current comparator can be configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The saturation controller can be configured to supply a reference signal to the RF attenuator based on the comparison value. The RF attenuator can be configured to modify the amplitude of an RF input signal supplied to the power amplifier based at least in part on the reference signal.

Abstract: A power amplifier comprising a power stage comprises a voltage detection circuit configured to detect an output voltage of the power stage, a current detection circuit configured to detect an output current of the power stage, a control voltage generation circuit configured to generate a control voltage substantially proportional to the detected output voltage and the detected output current, and a control circuit configured to decrease an output power of the power stage when the control voltage exceeds a predetermined value.

Abstract: Compression control through power amplifier load adjustment. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a power amplifier bias controller including a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

Abstract: A variable gain amplifier circuit comprises a main amplifier, a current sensing circuit, a variable loading and a control amplifier. The main amplifier is configured for amplifying an input signal to generate an output signal. The current sensing circuit is coupled to the main amplifier, and is configured for generating a sensed current related to a current flowing through the main amplifier. The variable loading is coupled to the current mirror via a node, wherein the sensed current flows through the node and the variable loading. The control amplifier is coupled to the node and the main amplifier, and is configured for receiving a control voltage and a voltage of the node to generate an adjustment signal to control a gain of the main amplifier, wherein a resistance of the variable loading has a nonlinear relationship with the control voltage.

Abstract: A method of processing a signal is disclosed. The method comprises generating a digital signal, converting the digital signal to an analog signal, and generating an amplified analog signal having distortions. The method further comprises converting the amplified analog signal to a feedback digital signal at a sample rate and updating a model of the distortions based on the feedback digital signal.

Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.

Abstract: Constant setting time is achieved in automatic gain control (AGC) circuits having a variable gain amplifier (VGA) and a feedback loop with a loop filter, where the VGA has a non-exponential gain characteristic and the loop filter is allowed to be non-linear. This design differs from traditional AGC circuits in which the VGA had an exponential gain characteristic and the loop filter was linear. Relaxation of these requirements as provided by the invention permits AGC circuits to be implemented in MOS and other technologies in which AGC circuits of traditional designs are difficult to implement.

Abstract: A circuit for controlling the output level of a power amplifier is disclosed. A current comparator (230) compares a reference current with a sensed current which is representative of the power amplifier current state. The reference current is used not only for comparison with the sensed current but also for setting the power amplifier (104). The current comparator (230) provides an output, based on the comparison, that is coupled to the power amplifier so that the power amplifier current is maintained at an optimum level for minimizing temperature dependent variations and substantially leveling the power of the power amplifier.

Abstract: Disclosed is a control circuit which provides a control signal to a control terminal of a voltage controlled amplifier (VCA), such as a SSM-2018 VCA manufactured by Analog Devices, such that a signal input to the VCA is amplified between full gain and full attenuation. The VCA is characterized by a predetermined control attenuation relationship which determines the gain of the input signal. The control circuit includes: a DC voltage source, preferably a linear potentiometer, which provides a voltage in a fixed range; an operational amplifier for rescaling the fixed range of voltages to a second range; a pair of curve-shaping circuits which adjust the second range; a scaling circuit, including an amplifier circuit, a voltage divider and a zener diode, which adapts the signal from the DC voltage source to a range of voltages calculated from the control attenuation relationship.

Abstract: Disclosed is a control circuit which provides a control signal to a control terminal of a voltage controlled amplifier (VCA), such as a SSM-2018 VCA manufactured by Analog Devices, such that a signal input to the VCA is amplified between +12 dB gain and full attenuation. The VCA is characterized by a predetermined control attenuation relationship which determines the gain of the input signal. The control circuit includes: a DC voltage source, preferably a linear potentiometer, which provides a voltage in a fixed range; an operational amplifier for rescaling the fixed range of voltages to a second range; a pair of curve-shaping circuits which adjust the second range; and a circuit, including an amplifier circuit, a voltage divider and a zener diode, which adds a DC offset and adapts the signal from the DC voltage source to a range of voltages calculated from the control attenuation relationship.

Abstract: A differential amplifier is connected to an amplifier for comparing an amplifier input signal with the signal fed back by the amplifier feedback circuit. The output of the differential amplifier is coupled to a full wave rectifier the output of which controls an attenuator connected between a source of electrical input signals and the amplifier. When the amplifier is operating in its linear range, the differential amplifier inputs are identical and it does not produce an output. Under this condition, the input signal is not attenuated. However, in the presence of amplifier clipping, the differential amplifier produces an output which, after full wave rectification, operates to increase the attenuation, and thus reduce the amplitude of the signal applied to the amplifier; clipping is limited.

Abstract: This disclosure is directed to an Automatic Gain Control (AGC) circuit wherein the AGC loop which generates the gain control signal is separate from and not closed through the amplifier whose gain is controlled. Such arrangement permits design of the AGC loop to follow a sampled data reference signal and yet have a response time much shorter than the period between samples.

Abstract: A fast-attack circuit is employed in an A.C. amplifier automatic gain control circuit to temporarily apply a D.C. gain control signal immediately to the amplifier circuit in response to a sudden signal increase in excess of a predetermined threshold level to avoid the problems of over-attack and pinch-down which might otherwise arise during the period required for the AGC loop to achieve stabilized control following the inception of the signal increase.

Abstract: The amplification of periodic or aperiodic pulses is varied by envelope detecting the received pulses and passing the resulting envelope waveform to a latching comparator which, when enabled, provides an output pulse whenever the input waveform has an amplitude which exceeds a predetermined value. An itegrator coupled to the output of the comparator is continuously operative to increase or decrease the gain of the amplifier according to the absence or presence respectively of the output comparator pulse. In this manner the amplitude of signals or pulses is automatically controlled despite circuit and transmission vagaries.

Abstract: Automatic gain control is provided in a two stage amplifier in which the first stage has a signal voltage gain related to its supply voltage and the second, or output, stage comprises an output transistor. The load of the output stage comprises an earphone in series with the supply. The supply for the first stage is taken from the junction of the output transistor and the earphone such that the gain varies inversely with the output of the earphone. The amplifier stages may be formed as a monolithic integrated circuit and contained in the housing of the earphone.

Abstract: A bistatic velocity detector system for underwater detection of objects of redetermined magnitude wherein the water may be capable of continual variations in velocity. The system includes a compensator that has an automatic gain controlled amplifier whose controlled output signal is applied first to an a.c./d.c. converter and then to an integrator circuit. A first voltage comparator receives the integrated signal to drive a relay for activating an alarm when a threshold is exceeded. A second voltage comparator having a lower reference voltage applied thereto drives an RC timer circuit whose output signal is applied to the gate of a field effect transistor of variable impedance for varying the gain of the operational amplifier. An alternative embodiment includes a dual gate transistor for use in the gain controlled amplification of the loop.