Output Networks Patents (Class 330/192)
  • Patent number: 10211779
    Abstract: A voltage controlled oscillator comprises a negative resistance, a first inductor, a fixed capacitor, and a frequency control component. The frequency control component comprises at least one varactor and at least a second inductor connected in series with the at least one varactor. A magnitude of an inductance of the second inductor is selected such that the frequency control component has an effective capacitance range larger than a capacitance range of the at least one varactor.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: February 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Mark A. Ferriss, Daniel J. Friedman, Bodhisatwa Sadhu, Alberto Valdes-Garcia
  • Patent number: 9041611
    Abstract: An automatic antenna impedance matching method for a radiofrequency transmission circuit. An impedance matching network is inserted between an amplifier and an antenna. The output current and voltage of the amplifier and their phase difference are measured by a variable measurement impedance, and the complex load impedance of the amplifier is deduced from this; the impedance of the antenna is calculated as a function of this complex impedance and as a function of the known current values of the impedances of the matching network. Starting from the value found for the impedance of the antenna, new values of the matching network are calculated that allow the load to be matched to the nominal impedance of the amplifier. The measurement impedance has a value controllable by the calculation processor according to the application and notably as a function of the operating frequency and of the nominal impedance of the amplifier.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: May 26, 2015
    Assignee: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francis Chan Wai Po, Emeric De Foucauld
  • Patent number: 8976981
    Abstract: A circuit, device and method for controlling an output signal of an amplifier are provided. The output signal may be controlled through a first stage located before a digital to analog converter and/or a second stage located after it. The first stage boosts the digital signal to match with the full signal range of the converter. For the second stage, the circuit comprises: a first resistor coupled to an output of the amplifier in series, the first resistor having a resistance value Rs; a second resistor coupled to the first resistor in series, the second resistor having a resistance value Rp; and an output terminal for a transducer connected to the electronic device, the output terminal connected in parallel to the second resistor. In the circuit, the resistance values Rs and Rp are related by an inversely proportional relationship.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: March 10, 2015
    Assignee: BlackBerry Limited
    Inventors: Jens Kristian Poulsen, Mohamad El-Hage
  • Publication number: 20140368268
    Abstract: A pulse width modulated/pulse modulated PWM/PPM power amplification circuit includes a load modulation circuit coupled between an output of the amplification circuit and a load. In one embodiment, the load modulation circuit comprises a plurality of capacitor elements switchably coupled such that in response to a control signal provided the load modulation circuit presents one of a plurality of different capacitance values at a terminal thereof. By changing capacitance values associated with the plurality of capacitor elements in accordance with the output of the amplification circuit and the load, improved (and “optimum”) power levels that exhibit a desired (and best) efficiency can be selected. Such results in an amplification circuit having an efficiency level which is relatively high compare with efficiency levels of conventional amplifier circuits over a wide dynamic range of output power.
    Type: Application
    Filed: June 18, 2014
    Publication date: December 18, 2014
    Applicant: AURIGA MEASUREMENT SYSTEMS, LLC
    Inventors: Yusuke Tajima, John Muir
  • Publication number: 20140103997
    Abstract: It is presented a power amplifier assembly comprising; a radio frequency multi-order power amplifier comprising a circuit board; a grounding structure connected to the radio frequency multi-order power amplifier and comprising a recess; a combining network connected to a plurality of outputs of the radio frequency multi-order power amplifier. The combining network comprises: a plurality of input connection points, wherein each of the plurality of input connection points is connected to a respective output of the plurality of outputs of the radio frequency multi-order power amplifier; an output connection point; and a conductor arrangement comprising a plurality of conductive paths arranged between the plurality of input connection points and the output connection point; wherein at least one of the plurality of conductive paths is at least partly formed by a suspended conductor positioned in the recess of the grounding structure.
    Type: Application
    Filed: June 7, 2011
    Publication date: April 17, 2014
    Applicant: Telefonaktiebolaget L M Ericsson (PUBL)
    Inventors: Joakim Plahn, Andrzej Sawicki, Martin Schoon
  • Publication number: 20140070881
    Abstract: Apparatus, systems, and fabrication methods are provided for biasing amplifier arrangements inside device packages to a target quiescent current. In one embodiment, an amplifier device has an output interface and includes an amplifier arrangement having an amplifier output and impedance matching circuitry coupled between the amplifier output and the output interface. A method for biasing the amplifier arrangement involves measuring or otherwise obtaining a voltage between the amplifier output and the output interface, determining an estimated quiescent current through the amplifier arrangement based on that voltage, and adjusting a bias voltage provided to the input of the amplifier arrangement based on a difference between the estimated quiescent current. In exemplary embodiments, the bias voltage is adjusted until the estimated quiescent current is substantially equal to a target quiescent current.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 13, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Justin N. Annes, Mario M. Bokatius, Paul R. Hart, Joseph Staudinger
  • Publication number: 20140062817
    Abstract: An antenna device includes an impedance-matching switching circuit connected to a feeding circuit, and a radiating element. The impedance-matching switching circuit matches the impedance of the radiating element as a second high frequency circuit element and the impedance of the feeding circuit as a first high frequency circuit element. The impedance-matching switching circuit includes a transformer matching circuit and a series active circuit. The transformer matching circuit matches the real parts of the impedance and matches the imaginary parts of the impedance in the series active circuit. Thus, impedance matching is performed over a wide frequency band at a point at which high frequency circuits or elements having different impedances are connected to each other.
    Type: Application
    Filed: November 6, 2013
    Publication date: March 6, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenichi ISHIZUKA, Noriyuki UEKI, Noboru KATO, Koji SHIROKI
  • Publication number: 20140022015
    Abstract: This disclosure is directed to devices and integrated circuits for instrumentation amplifiers. In one example, an instrumentation amplifier device uses two non-inverted outputs of a first multiple-output transconductance amplifier, and a non-inverted output and an inverted output of a second multiple-output transconductance amplifier. Both multiple-output transconductance amplifiers have a non-inverted output connected to an inverting input, and a non-inverting input connected to a respective input voltage terminal. A first resistor is connected between the inverting inputs of both multiple-output transconductance amplifiers. The outputs of both multiple-output transconductance amplifiers are connected together, connected through a second resistor to ground, and connected to an output voltage terminal. In other examples, two pairs of outputs from triple-output transconductance amplifiers are connected to provide two voltage output terminals, and may also be connected to buffers or a differential amplifier.
    Type: Application
    Filed: July 19, 2012
    Publication date: January 23, 2014
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventor: Paul M. Werking
  • Publication number: 20130278334
    Abstract: Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor.
    Type: Application
    Filed: August 21, 2012
    Publication date: October 24, 2013
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Saravanan V. Murugesan, Paul Walsh, Gerard Baldwin, Kaveh Hosseini
  • Publication number: 20130244606
    Abstract: A receiving apparatus in a wireless communication system includes: an antenna configured to receive a wireless frequency signal including a first frequency band signal and a second frequency band signal; a low noise amplifier (LNA) configured to amplify the wireless frequency signal, output the first frequency band signal as a differential phase signal, and output the second frequency band signal as a common phase signal; a differentiator configured to pass only the differential phase signal between the signals outputted from the LNA; and a combiner configured to pass only the common phase signal between the signals outputted from the LNA.
    Type: Application
    Filed: March 19, 2012
    Publication date: September 19, 2013
    Inventors: Sang-Gug Lee, Yuna Shim
  • Publication number: 20130222060
    Abstract: An impedance matching circuit is disclosed. The impedance matching circuit includes two or more mutually coupled inductors. A total self inductance of the impedance matching circuit is less than a corresponding impedance matching circuit that includes inductors that are not mutually coupled. The two or more mutually coupled inductors may have known current ratios that match current ratios in the corresponding impedance matching circuit.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 29, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Chi Shun Lo, Jonghae Kim, Wesley Nathaniel Allen, Chengjie Zuo, Changhan Yun, Thomas Andrew Myers, Prasad Srinivasa Siva Gudem, Matthew Michael Nowak
  • Publication number: 20130207732
    Abstract: Techniques for reducing undesired source degeneration inductance are disclosed. In an exemplary design, an apparatus includes first and second connections. The first connection includes a first parasitic inductance acting as a source degeneration inductance of an amplifier. The second connection includes a second parasitic inductance magnetically coupled to the first parasitic inductance to reduce the source degeneration inductance of the amplifier. The amplifier (e.g., a single-ended power amplifier) may be coupled to circuit ground via the first connection. An impedance matching circuit may be coupled to the amplifier and may include a circuit component coupled to circuit ground via the second connection. The first connection may be located sufficiently close to (e.g., within a predetermined distance of) the second connection in order to obtain the desired magnetic coupling between the first and second parasitic inductances.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 15, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jose Cabanillas, Calogero D. Presti, Norman L. Frederick, JR.
  • Publication number: 20130187712
    Abstract: An impedance matching circuit with at least one tunable notch filter for a power amplifier is disclosed. The power amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The impedance matching circuit performs output impedance matching for the power amplifier and includes at least one tunable notch filter. Each tunable notch filter has a notch that can be varied in frequency to provide better attenuation of an undesired signal. The at least one tunable notch filter attenuates at least one undesired signal in the amplified RF signal. The at least one tunable notch filter may include (i) a first tunable notch filter to attenuate a first undesired signal at a second harmonic of the amplified RF signal and/or (ii) a second tunable notch filter to attenuate a second undesired signal at a third harmonic of the amplified RF signal.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 25, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jose Cabanillas, Calogero D. Presti, Babak Nejati, Guy Klemens
  • Publication number: 20130169359
    Abstract: A radio frequency system includes a power amplifier that outputs a radio frequency signal to a matching network via a transmission line between the power amplifier and the matching network. A sensor monitors the radio frequency signal and generates first sensor signals based on the radio frequency signal. A distortion module determines a first distortion value according to at least one of (i) a sinusoidal function of the first sensor signals and (ii) a cross-correlation function of the first sensor signals. A first correction circuit (i) generates a first impedance tuning value based on the first distortion value and a first predetermined value, and (ii) provides feedforward control of impedance matching performed within the matching network including outputting the first impedance tuning value to one of the power amplifier and the matching network.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: MKS INSTRUMENTS, INC.
    Inventor: David J. Coumou
  • Publication number: 20130154735
    Abstract: The present invention reduces the size of a power detection circuit. An RF power amplifier includes an RF amplifier circuit and a power detection circuit. The RF amplifier circuit subjects an RF input signal having a predetermined frequency band to power amplification and generates an RF amplifier output signal. The input terminal of the power detection circuit is coupled to the output of the RF amplifier circuit. The power detection circuit detects a harmonic component having a harmonic frequency that is a whole number multiple of the frequency of a fundamental wave component of the RF amplifier output signal, and generates at an output terminal a detected signal indicative of the signal level of the fundamental wave component of the RF amplifier output signal. The power detection circuit includes an input circuit, which detects the harmonic component, and an output circuit, which generates the detected signal at the output.
    Type: Application
    Filed: December 5, 2012
    Publication date: June 20, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: RENESAS ELECTRONICS CORPORATION
  • Publication number: 20130106510
    Abstract: An audio-output amplifier circuit for an audio device includes an output amplifier and a switching element connected between an amplifier-output terminal of the output amplifier and ground, to short-circuit the amplifier-output terminal of the output amplifier after transition to ground-level voltage is finished.
    Type: Application
    Filed: October 16, 2012
    Publication date: May 2, 2013
    Inventor: Ryuichi Araki
  • Publication number: 20130076359
    Abstract: An output stage module for a power amplifier device (e.g., for a power amplifier device of a transmit unit of a magnetic resonance device) includes a housing and a carrier that is arranged within the housing. The carrier is made of a non-electrically-conducting, thermally-conducting material with low electrical losses (e.g., a ceramic carrier). At least two transistor dies are arranged on the carrier. At least one transistor, in each case, is assigned to a phase of a symmetrical input signal. In and/or on the carrier, a first conductor structure connecting (e.g., inductively) a drain output of the at least two transistor dies to an output signal and to second conductor structures each conducting an input signal to at least one gate input of the at least two transistor dies are provided. At least one cooling channel routed adjacent to at least one transistor die of the at least two transistor dies is provided.
    Type: Application
    Filed: March 23, 2012
    Publication date: March 28, 2013
    Inventor: Adam Albrecht
  • Publication number: 20130027132
    Abstract: The embodiments disclosed in the detailed description include a power amplifier having a low power mode amplifier, a medium power mode amplifier, and a high power mode amplifier in communication with a radio frequency (RF) output load. The exemplary embodiments of the power amplifier permit a wireless device to select the most power efficient means to transmit an RF signal based upon the desired output power level.
    Type: Application
    Filed: October 3, 2012
    Publication date: January 31, 2013
    Applicant: RF MICRO DEVICES, INC.
    Inventors: James M. Retz, Ruediger Bauder
  • Publication number: 20120280750
    Abstract: The switching arrangement is used for the redundant power supply for a power amplifier, especially a high-frequency power amplifier. The power amplifier in this context provides several output-stage components and several power-supply units. The power-supply units are connected together at their load-end connections and supply the output-stage components jointly with energy. If a power-supply unit fails, at least two output-stage components are actively switched off, so that the power amplifier can continue to operate although with reduced output power.
    Type: Application
    Filed: December 1, 2010
    Publication date: November 8, 2012
    Applicant: ROHDE & SCHWARZ GMBH & CO. KG
    Inventors: Bernhard Kaehs, Ludwig Moll
  • Publication number: 20120243580
    Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 27, 2012
    Applicant: TRIQUINT SEMICONDUCTOR, INC.
    Inventor: Peter V. Wright
  • Publication number: 20120146723
    Abstract: The invention relates to high power radiofrequency amplifiers, in particular to amplifiers having output impedance matching networks, exemplary embodiments of which include a radiofrequency amplifier having an active device mounted on a substrate within a device package, the amplifier having an output impedance matching network comprising a high pass network provided at least partly on the active device and a low pass network having a first inductive shunt connection between an output of the active device and a first output lead and a second inductive shunt connection between the output of the active device and a second output lead, wherein part of the second output lead forms an inductance contributing to the inductance of the low pass network.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 14, 2012
    Applicant: NXP B.V.
    Inventors: Igor Blednov, Iouri Volokhine
  • Publication number: 20120146722
    Abstract: Power amplifier (PA), regardless of the process used for the manufacturing of its devices, suffers from a nonlinear output capacitance that has significant impact on various aspects of the PA performance. This output capacitance is dependent on the large output voltage swing. Accordingly a compensation capacitance is added at the output of the PA that has a behavior that is inverse respective of the output voltage of that of the output capacitance of the PA. Connecting the compensation capacitor in parallel to the PA output capacitance, results in a total capacitance that is the sum of the output capacitance and its compensation capacitance. The total output capacitance is therefore essentially stable throughout the output voltage swing.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 14, 2012
    Applicant: AMALFI SEMICONDUCTOR, INC.
    Inventors: Baker Scott, George Maxim, Chu Hsiung Ho, Stephen Franck, Tom Biedka
  • Publication number: 20120087515
    Abstract: A circuit, device and method for controlling an output signal of an amplifier are provided. The output signal may be controlled through a first stage located before a digital to analog converter and/or a second stage located after it. The first stage boosts the digital signal to match with the full signal range of the converter. For the second stage, the circuit comprises: a first resistor coupled to an output of the amplifier in series, the first resistor having a resistance value Rs; a second resistor coupled to the first resistor in series, the second resistor having a resistance value Rp; and an output terminal for a transducer connected to the electronic device, the output terminal connected in parallel to the second resistor. In the circuit, the resistance values Rs and Rp are related by an inversely proportional relationship.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 12, 2012
    Inventors: Jens Kristian Poulsen, Mohamad El-Hage
  • Publication number: 20120013401
    Abstract: A device includes: a power amplifier, including a supply voltage terminal, an input port and an output port, and the power amplifier being configured to receive a supply voltage at the supply voltage terminal, an input signal through the input port, to amplify the received input signal, and to output an amplified output signal through the output port; a variable impedance matching circuit having an input terminal connected to the output port of the power amplifier, and having an output terminal for being connected to a load; and a controller including a voltage measuring unit configured to measure the supply voltage, to compare the measured supply voltage with a threshold voltage, and to control the variable impedance matching circuit based on a result of the comparison so as to adjust a load impedance seen by the power amplifier at its output port.
    Type: Application
    Filed: July 14, 2010
    Publication date: January 19, 2012
    Applicant: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventors: Moon-Suk JEON, Chan Hoe KOO, Hyung Bin LEE, Sang Hwa JUNG
  • Publication number: 20110309205
    Abstract: There is provided a track current suppression device. An exemplary device includes an input coupled between rails of a railway track and configured to receive an input voltage corresponding to a track current. The exemplary device also includes an amplifier configured to receive the input voltage and generate a cancellation current. The exemplary device also includes an output coupled between the rails of the railway track and configured to deliver the cancellation current to the rails with reversed polarity compared to the track current.
    Type: Application
    Filed: June 18, 2010
    Publication date: December 22, 2011
    Inventors: Larry J. Anderson, Forrest H. Ballinger
  • Patent number: 8054128
    Abstract: A current control mechanism for use in low power consumption circuits with limited headroom includes a differential transistor pair from whose collectors a current output is taken. The current output is a function of a reference voltage provided at bases of a reference transistor pair having emitters that are coupled to the bases of the differential pair. The reference voltage is controlled by a pair of control transistors that control current through a load. A pair of tracking transistors can be provided to track supply voltage. A single-ended topology can also be implemented.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: November 8, 2011
    Assignee: GigOptix, Inc.
    Inventor: Vikas Manan
  • Publication number: 20110234316
    Abstract: In accordance with a representative embodiment, an impedance matching circuit for use at an output stage of a power amplifier is disclosed. The impedance matching circuit comprises: an input port for receiving a frequency band signal; and a plurality of paths, each path being allocated with a principal band signal to be transmitted therethrough and including a path on-off network and a fixed-value impedance matching network. Depending on a type of the received frequency band signal, the path on-off network is configured to activate a selected one of the plurality of paths by rendering an input impedance of the selected path to have a lower absolute magnitude so that the signal is transmitted therethrough, and to deactivate the remaining paths of the plurality of paths by rendering the input impedance thereof to have a higher absolute magnitude so that the signal is not transmitted therethrough.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 29, 2011
    Applicant: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventors: Jung Hyun Kim, Un Ha Kim, Sang Hwa Jung, Young Kwon
  • Publication number: 20110187456
    Abstract: A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result.
    Type: Application
    Filed: April 14, 2010
    Publication date: August 4, 2011
    Inventors: Ju-Lin Huang, Chia-Wei Su, Po-Yu Tseng
  • Publication number: 20110187457
    Abstract: An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to forma signal output path and for adjusting impedance of the signal output path when the signal output path is formed.
    Type: Application
    Filed: January 26, 2011
    Publication date: August 4, 2011
    Inventors: Xie-Ren Hsu, Ji-Ting Chen, Yao-Hung Kuo
  • Publication number: 20110128075
    Abstract: Audio amplifiers are used in many known forms in music systems, for example for domestic use or for playing music in cinemas, discos etc., but also in public address systems, as are known, for example, in public buildings, schools, universities etc. for making announcements. The invention proposes an audio amplifier (1) for amplifying an input signal into an output signal using an output amplifier stage (6), wherein the output amplifier stage (6) is designed to amplify an intermediate signal into the output signal, and wherein the output amplifier stage (6) is in the form of an amplifier which operates in switching mode, and having a limiter device (4) which is designed, from a program and/or circuit point of view, to generate the intermediate signal on the basis of the input signal, wherein the level of the intermediate signal is always limited as a function of an adjustable maximum level in such a way that the output signal does not exceed the maximum level independently of the input signal.
    Type: Application
    Filed: June 10, 2009
    Publication date: June 2, 2011
    Inventors: Martin Maier, Josef Taffner, Josef Plager
  • Publication number: 20110063028
    Abstract: A power amplifier comprises a plurality of primary inductors provided on a substrate in a circular geometry as a whole; a plurality of amplifier pairs; a secondary inductor; and a connection wiring. Each amplifier pair is coupled to two ends of a corresponding primary inductor, and amplifies and output to the corresponding primary inductor a pair of first and second signals given as differential input signals, respectively. The secondary inductor is provided adjacent to the primary inductors in a circular geometry, further combines and outputs signals made by combining first and second signals in each primary inductor. The connection wiring is provided inside the primary inductors on the substrate and electrically couples middle points of respective primary inductors with each other.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 17, 2011
    Inventors: Tsuyoshi KAWAKAMI, Akihiko Furukawa, Satoshi Yamakawa
  • Publication number: 20110032036
    Abstract: A multi-chip system in which at least one of the chips includes a performance parameter encoded thereon. After system assembly, the performance parameter can be obtained by a companion chip and used to automatically or semi-automatically fine tune the companion chip to the specific parameters of the at least one chip.
    Type: Application
    Filed: October 20, 2010
    Publication date: February 10, 2011
    Applicants: STMicroelectronics, Inc., STMicroelectronics S.r.l.
    Inventors: Giorgio Pedrazzini, Sandro Cerato, Alberto Salina
  • Publication number: 20110018632
    Abstract: Exemplary embodiments are directed to a transmitter with a power amplifier and a switched output matching circuit implementing a plurality of output paths for a plurality of operating modes is described. The power amplifier receives an input RF signal and provides an amplified RF signal. An output matching network performs impedance transformation from low impedance at the power amplifier output to higher impedance at the matching network output. The plurality of output paths are coupled to the output matching network. Each output path provides a different target output impedance for the power amplifier and routes the amplified RF signal from the power amplifier to an antenna when that output path is selected. Each output path may include a matching network coupled in series with a switch. The matching network provides the target output impedance for the power amplifier when the output path is selected. The switch couples or decouples the output path to/from the power amplifier.
    Type: Application
    Filed: November 20, 2009
    Publication date: January 27, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventors: Nathan Pletcher, Aristotele Hadjichristos, Yu Zhao, Babak Nejati
  • Publication number: 20100283544
    Abstract: The present invention provides a harmonic processing circuit capable of miniaturizing a circuit, and an amplifier circuit using this harmonic processing circuit. A first impedance adjustment section and a second impedance adjustment section are provided. The first impedance adjustment section is provided with a coupled distributed constant line CT. The coupled distributed constant line CT receive as input the output of an amplification transistor S, and have a length of ¼ the wavelength (?) of the fundamental wave at the output of the amplification transistor S. Further, the first impedance adjusting section is configured to adjust input impedance with respect to the even harmonics to one of effectively infinity or zero. The first impedance adjusting section and the second impedance adjustment section are configured to adjust input impedance with respect to the odd harmonics to the other of effectively infinity or zero.
    Type: Application
    Filed: August 1, 2007
    Publication date: November 11, 2010
    Inventors: Ryo Ishikawa, Kazuhiko Honjo
  • Patent number: 7825731
    Abstract: An RF amplifying device includes a transmission line transformer coupled to an output electrode of a power transistor for generating transmission power to be fed to an antenna. The transmission power from the output electrode of the power transistor is fed to one end of a main line of the transmission line transformer, and one end of a secondary line of the transmission line transformer is coupled to an AC grounding node. The other end of the secondary line is coupled to the one end of the main line, thereby generating the transmission power. Coupling energy is transmitted from the secondary line to the main line. Coupling members electrically coupled to the output electrode of the power transistor are electrically coupled to a joint formed in either the main line, or the secondary line, at part of the energy coupling part.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: November 2, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Masami Ohnishi, Ryouichi Tanaka
  • Publication number: 20100244956
    Abstract: A current control mechanism for use in low power consumption circuits with limited headroom includes a differential transistor pair from whose collectors a current output is taken. The current output is a function of a reference voltage provided at bases of a reference transistor pair having emitters that are coupled to the bases of the differential pair. The reference voltage is controlled by a pair of control transistors that control current through a load. A pair of tracking transistors can be provided to track supply voltage. A single-ended topology can also be implemented.
    Type: Application
    Filed: June 7, 2010
    Publication date: September 30, 2010
    Applicant: GigOptix, Inc.
    Inventor: Vikas Manan
  • Publication number: 20100237939
    Abstract: A buffer varies the size of its output stage in response to a varying capacitive load. The capacitive load may vary in a predictable or a random manner. The buffer includes an operational amplifier having an output stage of multiple transistors, selectively connected in parallel. During operation, data regarding the size of the capacitive load is obtained and used to determine the size of the output stage. In general, as the capacitive load increases, the number of transistors connected in parallel at the output stage also increases.
    Type: Application
    Filed: June 1, 2010
    Publication date: September 23, 2010
    Applicant: Micron Technology, Inc.
    Inventor: Robert Johansson
  • Publication number: 20100231296
    Abstract: A system and method are provided for delivering power to a dynamic load. The system includes a power supply providing DC power having a substantially constant power open loop response, a power amplifier for converting the DC power to RF power, a sensor for measuring voltage, current and phase angle between voltage and current vectors associated with the RF power, an electrically controllable impedance matching system to modify the impedance of the power amplifier to at least a substantially matched impedance of a dynamic load, and a controller for controlling the electrically controllable impedance matching system. The system further includes a sensor calibration measuring module for determining power delivered by the power amplifier, an electronic matching system calibration module for determining power delivered to a dynamic load, and a power dissipation module for calculating power dissipated in the electrically controllable impedance matching system.
    Type: Application
    Filed: May 25, 2010
    Publication date: September 16, 2010
    Applicant: MKS INSTRUMENTS, INC.
    Inventors: Siddharth P. Nagarkatti, Michael Kishinevsky, Ali Shajii, Timothy E. Kalvaitis, William S. McKinney, JR., Daniel Goodman, William M. Holber, John A. Smith
  • Publication number: 20100060357
    Abstract: A power amplifier controller circuit controls an adjustable impedance matching network at the output of a power amplifier to vary its load line to improve the efficiency of the RF PA. The PA controller circuit comprises an amplitude control loop that determines an amplitude correction signal. The amplitude loop is configured to control or correct for distortion from the adjustable matching network based upon the amplitude correction signal.
    Type: Application
    Filed: February 5, 2009
    Publication date: March 11, 2010
    Applicant: Quantance, Inc.
    Inventors: Serge Francois Drogi, Vikas Vinayak
  • Patent number: 7583140
    Abstract: An output circuit of a vacuum-tube amplifier is disclosed. An output circuit of a conventional vacuum-tube amplifier has shortcomings that a front end amplification unit uses a coupling condenser or a transformer to output an AC signal to an output node, a bias voltage of a cathode of a vacuum tube is varied in response to an input signal in an output buffer and, when the bias voltage is higher than a voltage set by a bias resistor, signal attenuation by the difference between the bias voltage and the set voltage is generated. To solve these shortcomings, the output circuit of the vacuum-tube amplifier includes a front end amplification unit for amplifying an input signal using a vacuum tube and an output amplification unit for power-amplifying the output signal of the front end amplification unit using a vacuum tube.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: September 1, 2009
    Assignee: AVERD Labs Co., Ltd.
    Inventor: Soung Whan Chung
  • Patent number: 7583141
    Abstract: An output circuit of a vacuum-tube amplifier is disclosed. An output circuit of a conventional vacuum-tube amplifier has shortcomings that a front end amplification unit uses a coupling condenser or a transformer to output an AC signal to an output node, a bias voltage of a cathode of a vacuum tube is varied in response to an input signal in an output buffer and, when the bias voltage is higher than a voltage set by a bias resistor, signal attenuation by the difference between the bias voltage and the set voltage is generated. To solve these shortcomings, the output circuit of the vacuum-tube amplifier includes a front end amplification unit for amplifying an input signal using a vacuum tube and an output amplification unit for power-amplifying the output signal of the front end amplification unit using a vacuum tube.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: September 1, 2009
    Assignee: AVERD Labs Co., Ltd.
    Inventor: Soung Whan Chung
  • Patent number: 7576619
    Abstract: An integrated circuit arrangement is disclosed. In one embodiment, the integrated circuit arrangement includes an output circuit having at least one first output connection which can provide a data signal, at least one first data output connection; and at least one first inductance connected between the at least one first output connection and the at least one data output connection.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: August 18, 2009
    Assignee: Infineon Technologies AG
    Inventors: Daniel Kehrer, Herbert Knapp
  • Publication number: 20080180179
    Abstract: A radio frequency (RF) generator for applying RF power to a plasma chamber includes a DC power supply (B+). A radio frequency switch generates the RF power at a center frequency f0. A low-pass dissipative terminated network connects between the DC power supply (B+) and the switch and includes operates at a first cutoff frequency. The switch outputs a signal to an output network which improves the fidelity of the system. The output network generates an output signal fed to a high-pass subharmonic load isolation filter that passes RF power above a predetermined frequency. A low-pass harmonic load isolation filter may be inserted between the output network and the high-pass subharmonic load isolation filter, and a high-pass terminated network may connect to the output of the output network. The high-pass terminated network dissipates RF power above a predetermined frequency.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Applicant: MKS INSTRUMENTS, INC.
    Inventor: Salvatore Polizzo
  • Patent number: 7355475
    Abstract: An output circuit of a vacuum-tube amplifier is disclosed. An output circuit of a conventional vacuum-tube amplifier has shortcomings that a front end amplification unit uses a coupling condenser or a transformer to output an AC signal to an output node, a bias voltage of a cathode of a vacuum tube is varied in response to an input signal in an output buffer and, when the bias voltage is higher than a voltage set by a bias resistor, signal attenuation by the difference between the bias voltage and the set voltage is generated. To solve these shortcomings, the output circuit of the vacuum-tube amplifier includes a front end amplification unit for amplifying an input signal using a vacuum tube and an output amplification unit for power-amplifying the output signal of the front end amplification unit using a vacuum tube.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: April 8, 2008
    Assignee: AVERD Labs Co., Ltd.
    Inventor: Soung Whan Chung
  • Patent number: 7202734
    Abstract: A circuit and method for electronically tuning an RF power amplifier. The output filter includes at least one electronically variable reactance. The electronically tuned power amplifier may be tuned rapidly to a selected frequency, to a selected impedance, or to produce a selected output amplitude. An optional controller translates frequency, impedance, or modulation inputs into tuning signals. High-efficiency, wideband amplitude modulation is produced by varying the amplifier load impedance along preferred loci.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: April 10, 2007
    Inventor: Frederick Herbert Raab
  • Patent number: 7080185
    Abstract: An access destination determining section determines whether an access is directed to region 1 or region 2. A region 1 drive capability register and a region 2 drive capability register set drive capabilities of output buffers when accesses to region 1 and region 2 generate, respectively. For example, if “1” is set to region 1 drive capability register, when an access to region 1 generates, a Buf2 output enable signal is output at high level to enable outputs of Buf2s. Therefore, a drive capability of a bus can be altered according to a region to which an access is made by a CPU or the like, thereby enabling prevention of unnecessary power consumption and generation of noise.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: July 18, 2006
    Assignee: Renesas Technology Corp.
    Inventor: Takashi Kurafuji
  • Patent number: 4718100
    Abstract: Cabling (10) is provided for interconnecting amplifier (12) having a positive side (14) and a return side (16) to a load (18) having a positive side (20) and a return side (22). The cabling comprises a first open circuited conductor (24) having a first end (26) connected to a selected one of the amplifier positive side (14) and the amplifier return side (16) and having a second end (28) extending towards and terminating free from connection to the load (18). A second open circuited conductor (30) is provided which has a first end (32) connected to a respective one of the load positive side (20) and the load return side (22), said respective one being of a different polarity than the polarity of the selected one of the amplifier positive side (14) and amplifier return side (16) to which the first open circuited conductor (24) is connected and having a second end (34) extending towards and terminating free from connection to the amplifier (12).
    Type: Grant
    Filed: March 15, 1985
    Date of Patent: January 5, 1988
    Inventor: Bruce A. Brisson
  • Patent number: 4048578
    Abstract: An R.F. amplifier circuit having a high selectivity with a simple and inexpensive construction is provided. An R.F. choke coil acting as a bias supplying element is connected to a collector of an amplifying transistor to supply it with an optimum biasing current for a high electric field strength. A first capacitor is connected in parallel, at a high frequency, with the R.F. choke coil, which is connected to an LC tuning circuit through a second capacitor. A resonance frequency of the R.F. choke coil and the first capacitor is chosen to be sufficiently lower than that of the LC tuning circuit to maintain a single tuned circuit while at the same time an output impedance of the amplifying transistor is stepped up by the first and second capacitors to insure a high quality factor.
    Type: Grant
    Filed: October 27, 1976
    Date of Patent: September 13, 1977
    Assignee: Hitachi, Ltd.
    Inventor: Hiroshi Kimura