Including Class D Amplifier Patents (Class 330/251)
  • Patent number: 11882640
    Abstract: An induction heating apparatus is configured to determine a third driving frequency corresponding to a third required power value when the required power value of the first working coil or the second working coil is changed to the third required power value, to calculate a difference value between the driving frequency of the working coil (the required power value of which is not changed) and the third driving frequency, to change an operation mode or a power control mode of the first inverter circuit or the second inverter circuit when the difference value is included in a predetermined first reference range, and to change an output power value of the working coil (the required power value of which is changed) to the third required power value.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: January 23, 2024
    Assignee: LG ELECTRONICS INC.
    Inventors: Sihoon Jeong, Kyelyong Kang, Hanna Kim
  • Patent number: 11817833
    Abstract: This application relates to an amplifier selectively operable in first or second modes. The first mode is a BTL mode with first and second output drivers (103p, 103n) both active to generate respective driving signals that vary with an input signal. The second mode is an SE mode, where the first output driver (103p) is active to generate a driving signal at and the output of the second driver (103n) is held constant. A controller (201) selectively controls the mode based on an indication of output signal amplitude. In the first mode, a ratio of magnitude of the two driving signals varies with the indication of output signal amplitude, i.e. the magnitudes of the two driving signals may vary so as to be not equal.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: November 14, 2023
    Assignee: Cirrus Logic Inc.
    Inventor: John P. Lesso
  • Patent number: 11811370
    Abstract: A system for sensing an electrical quantity may include a sensing stage configured to sense the electrical quantity and generate a sense signal indicative of the electrical quantity, wherein the electrical quantity is indicative of an electrical signal generated by a Class-DG amplifier configured to drive a load wherein the Class-DG amplifier has multiple signal-level common modes and a common-mode compensator configured to compensate for changes to a common-mode voltage of a differential supply voltage of the driver occurring when switching between signal-level common modes of the Class-DG amplifier.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Ramin Zanbaghi, Lingli Zhang, Wei Xu, Justin Richardson, John L. Melanson
  • Patent number: 11804809
    Abstract: In the field of audio amplifiers, the prior art for high output power levels is now to use class D technology. In this technology, audio signals are converted into a pulsed signal. An audio amplifier 1 is proposed, with a modulator section 4 for accepting an input signal and outputting two intermediate signals, wherein the modulator section 4 is designed to generate the intermediate signals by modulating the input signal, with an amplifier section 8 for accepting the two intermediate signals and outputting two amplified signals, wherein the amplifier section 8 is designed to generate the two amplified signals by amplifying the two intermediate signals, the amplifier section having two power stages 11;12, with an end section 21 for accepting the two amplified signals and for outputting an output signal for a loudspeaker device 2, wherein the audio amplifier 1 can be switched between parallel operation and bridge operation.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: October 31, 2023
    Assignee: Robert Bosch GmbH
    Inventors: Markus Mandl, Gregor Sauer, Thomas Stein
  • Patent number: 11759822
    Abstract: Embodiments include a primary short circuit (PSC) coupled to a primary side of a transformer and a dampening element, coupled to a transducer coupled to a secondary side of the transformer, configured to dampen a received signal during a portion of a reverberation period. The PSC and the dampening element may be activated substantially simultaneously. Activation of the PSC circuit mitigates a parallel resonance otherwise arising, in part, in the transducer, but, increases the received signal by a DC shift voltage. The dampening element dampens the DC shift voltage. The received signal may be dampened prior to amplification of the received signal by an amplifier. The dampening facilitates earlier and more precise measurement, during the reverberation period, of at least one operating characteristic for the PAS sensor. Another embodiment prevents the DC shift voltage by selectively activating the PSC within a determined time of a zero-crossing of a given signal.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: September 19, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Zdenek Axman, Tomas Suchy, Petr Kamenicky
  • Patent number: 11750163
    Abstract: In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: September 5, 2023
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Ru Feng Du, Qi Yu Liu
  • Patent number: 11750164
    Abstract: Methods and systems are provided for controlling rail-voltages for amplifier output stages. In some examples, a method may include receiving sets of data values (e.g., at a power-supply control circuitry) for control of a rail voltage of an amplifier output stage. The method may also include determining that the receipt of a pending set of data values has been interrupted. Then, upon the determination that the receipt of the pending plurality of data values has been interrupted, the method may include decreasing the rail voltage to a non-boosted rail-voltage level.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 5, 2023
    Assignee: Harman International Industries, Incorporated
    Inventors: Jeffrey Michael Brockmole, Matthew Ryan Parnell
  • Patent number: 11736082
    Abstract: According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: August 22, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Takayuki Takida
  • Patent number: 11724724
    Abstract: A system for controlling one or more vital wayside devices of a railway network, comprising one or more vital switches, each vital switch being comprised in or operatively connected to an associated device of the one or more vital wayside devices, and a controller which is configured to control the one or more vital wayside devices. The controller is connected to each of the one or more vital switches by means of at least one optical fiber cable and is configured to output one or more light command signals over the at least one optical fiber cable, and each vital switch is configured to switch from an open status to a closed status to provide power and ground to the associated vital wayside device upon receiving at least one corresponding light command signal outputted by the controller for commanding an action of the associated vital wayside device.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: August 15, 2023
    Assignee: ALSTOM TRANSPORT TECHNOLOGIES
    Inventors: Nicholas Nagrodsky, James Frisbie, Richard Lawson, Chris Schuchmann
  • Patent number: 11699950
    Abstract: A fast-switching power management circuit operable to prolong battery life is provided. The power management circuit includes a voltage circuit that can generate an output voltage for amplifying an analog signal in a number of time intervals and a pair of hybrid circuits each causing the output voltage to change in any of the time intervals. A control circuit is configured to activate any one of the hybrid circuits during a preceding one of the time intervals to cause the output voltage to change in an immediately succeeding one of the time intervals. By starting the output voltage change earlier in the preceding time interval, it is possible to complete the output voltage change within a switching window in the succeeding time interval while concurrently reducing rush current associated with the output voltage change, thus helping to prolong battery life in a device employing the power management circuit.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: July 11, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11699979
    Abstract: Example embodiments provide a process that includes one or more of receiving an audio signal at a feedback compressor circuit, multiplying the received audio signal with a power feedback signal to create a product audio signal, wherein the feedback signal comprises a low-pass filtered signal, applying a power amplifier to the product audio signal, and providing the amplified product audio signal as an output signal to a speaker.
    Type: Grant
    Filed: October 30, 2021
    Date of Patent: July 11, 2023
    Assignee: Biamp Systems, LLC
    Inventor: Aaron Faulstich
  • Patent number: 11695325
    Abstract: The invention relates to a method for setting a dead time between the opening of a first switching element (31) of a half bridge (2) and the closing of a second switching element (32) of the half bridge (2), comprising the steps: reducing the dead time of a switching cycle relative to the dead time of a preceding switching cycle, and determining a temperature of at least one of the switching elements (31, 32); wherein the steps of reducing the dead time and of determining the temperature are repeated for subsequent switching cycles until a critical dead time is reached, in the case of which a termination condition, which depends on the determined temperature, is fulfilled; and wherein the dead time is set using the critical dead time.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: July 4, 2023
    Assignee: Robert Bosch GmbH
    Inventor: Hans Geyer
  • Patent number: 11683017
    Abstract: According to one embodiment, a class-D amplifier including: a PWM modulator that outputs a PWM modulation signal in response to an input signal; and a drive circuit that amplifies the PWM modulation signal, and supplies it to an output end. The drive circuit includes: a first output transistor whose main current path is connected between a power source supplying end and the output end; a second output transistor having a size larger than a size of the first output transistor; and a resistance element that is connected between the main current path of the first output transistor and the output end.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: June 20, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Takayuki Takida
  • Patent number: 11671062
    Abstract: A sense amplifier circuit comprising a first-, second-, third- and fourth-amplification-blocks, each amplification-block comprising: an amplification-block-transistor comprising and an amplification-block-resistor. The amplification-block-transistor includes: a first-conduction-channel-terminal, a second-conduction-channel-terminal that is connected to an amplification-block-output-node, and a control-terminal that is connected to an amplification-block-control-node. The sense amplifier circuit also comprises: an amplification-block-resistor connected in series between an amplification-block-input-node and the first-conduction-channel-terminal; a first-bias-voltage-source connected to the amplification-block-control-nodes of the first- and third-amplification-blocks, a second-bias-voltage-source connected to the amplification-block-control-nodes of the second- and fourth-amplification-blocks.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: June 6, 2023
    Assignee: NXP B.V.
    Inventors: Marco Berkhout, Quino Sandifort, Gayatri Agarwal
  • Patent number: 11588452
    Abstract: Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 21, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, David P. Singleton
  • Patent number: 11581757
    Abstract: In accordance with an embodiment, a wireless power transmitter includes a charging surface, a transmitting antenna configured to generate an electromagnetic field extending above the charging surface, a sensing array disposed between the transmitting antenna and the charging surface, and a controller coupled to the sensing array. The sensing array includes a plurality of sensors. Each sensor of the plurality of sensors is configured to generate a respective signal indicative of a strength of the electromagnetic field. The controller is configured to detect a presence of a metallic object, other than a receiving antenna of a power receiver, in the electromagnetic field based on the respective signal generated by one or more sensors of the plurality of sensors.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: February 14, 2023
    Assignee: SPARK CONNECTED LLC
    Inventors: Petru Emanuel Stingu, Kenneth Moore
  • Patent number: 11581801
    Abstract: A switched-capacitor converter has a first and second terminal; a switched-capacitor ladder network having a plurality of serially connected first capacitors defining a plurality of flying capacitor nodes; a plurality of serially connected second capacitors defining a plurality of output capacitor nodes, wherein nodes of the flying capacitor nodes can be connected to nodes of the output capacitor nodes in a plurality of ladder converter configurations to perform a switched-capacitor ladder power conversion; and a switch matrix to connect the first terminal to different flying capacitor nodes and/or to connect any flying capacitor node to any other flying capacitor node or output capacitor node according to different switch configurations. Also, a switched-capacitor converter assembly may have a plurality of serially and/or parallel connected switched-capacitor reconfigurable switched-capacitor ladder converters.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: February 14, 2023
    Assignee: DANMARKS TEKNISKE UNIVERSITET
    Inventors: Pere Llimos Muntal, Ivan Harald Holder Jorgensen
  • Patent number: 11552602
    Abstract: A class-D amplifier with good signal-to-noise ratio (SNR) performance is shown. The class-D amplifier includes a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit, which are configured to establish a closed amplification loop. The feedback circuit is configured to establish a feedback path. The class-D amplifier further includes a feedback breaker. The feedback breaker breaks the feedback path in response to conditions in which there no-signal information in the class-D amplifier.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: January 10, 2023
    Assignee: MEDIATEK INC.
    Inventors: Fong-Wen Lee, Wen-Chieh Wang, Yu-Hsin Lin
  • Patent number: 11545942
    Abstract: Example embodiments relate to push-pull class E amplifiers. One example push-pull class E amplifier includes an input configured for receiving a signal to be amplified. The push-pull class E amplifier also includes an output configured for outputting the signal after amplification. Additionally, the push-pull class E amplifier includes a printed circuit board having a first dielectric layer and a second dielectric layer. Further, the push-pull class E amplifier includes a first amplifying unit and a second amplifying unit. Yet further, the push-pull class E amplifier includes a balun, a capacitive unit, a first line segment, a second line segment, a third line segment, and a fourth line segment. The first line segment and the second line segment are arranged on the first dielectric layer. A combined length of the third line segment and the fourth line segment corresponds to a quarter wavelength of an operational frequency of the amplifier.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: January 3, 2023
    Assignee: Ampleon Netherlands B.V.
    Inventor: Yevhen Tymofieiev
  • Patent number: 11534226
    Abstract: An electrosurgical generator includes a processor and a memory storing instructions executable by the processor. The instructions when executed, cause the generator to provide an indicated treatment energy to the instrument, where the indicated treatment energy is set by a user and having a corresponding current limit, receive signals from the instrument over time relating to a load impedance between the active electrode and the return electrode of the instrument, determine based on the signals that the active electrode and the return electrode are currently shorted together, and prior to the short, the instrument was grasping tissue between the active electrode and the return electrode, and based on the determination, reduce a current limit of treatment energy being provided to the instrument to below the corresponding current limit.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: December 27, 2022
    Assignee: Covidien LP
    Inventors: Donald L. Tonn, James E. Dunning, William D. Faulkner, Jennifer R. McHenry, Devon E. Scott-Drechsel, Eric M. Westra
  • Patent number: 11522572
    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: December 6, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Kshitij Yadav, Vijayakumar Dhanasekaran
  • Patent number: 11504184
    Abstract: Apparatus, systems, and methods of controlling energy delivered to electrodes used in electrically and/or thermally induced neuromodulation are provided to improve neuromodulation. In particular, a catheter treatment device having a control algorithm that regulates current or current density delivered to an electrode is provided. The electrode may maintain a known and consistent electrode contact surface area with the vessel. The control algorithm controls energy delivery to provide consistent current or current density to the treatment site, even though the tissue impedance Z may vary from patient to patient and vessel to vessel, and despite changes in impedance of the treatment, site during the course of the treatment. The controlled delivery of energy can be used to control and maintain placement of the zone of thermal treatment and reduce undesirable energy delivery to unwanted locations near the treatment site.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: November 22, 2022
    Assignee: MEDTRONIC ARDIAN LUXEMBOURG S.A.R.L.
    Inventor: Hadar Cadouri
  • Patent number: 11509272
    Abstract: This application describes time-encoding modulator circuitry (200), and in particular a PWM modulator suitable for use for a class-D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (101). A feedback path provides feedback to an input of the first PWM modulator (101). The feedback path includes an ADC (203) which receive a first PWM signal (Sa) derived from the output PWM signal. The ADC (203) includes a second PWM modulator (401) which generates a second PWM signal (Sb) based on the first PWM signal. A controller (201) controls the second PWM modulator such that a PWM carrier of the second PWM signal is phase and frequency matched to a PWM carrier of the output PWM signal.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: November 22, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Toru Ido
  • Patent number: 11489444
    Abstract: An embodiment switching converter comprises an input stage; an output stage for providing an output voltage; a capacitive coupling stage for coupling the input stage to the output stage; a first switching stage configured to switch between a first state where an input voltage is provided to the input stage, and a second state where the input voltage is not provided to the input stage; a second switching stage configured to switch between a first state in which a reference voltage is provided to the output stage, and a second state in which the reference voltage is not provided to the output stage; and a voltage regulation stage configured to set, after the second switching stage switches from the first state to the second state and before the first switching stage switches from the second state to the first state, a target voltage across the input stage.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: November 1, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventor: Edoardo Botti
  • Patent number: 11476821
    Abstract: An electronic apparatus is described. The apparatus includes a circuit element configured to output a signal comprising a modulated frequency component. The apparatus also includes a filter arrangement comprising first, second and third notch filter arrangements, wherein each of the first and second notch filter arrangements comprise a first series inductor, and a series shunt configuration comprising a second inductor and a capacitor coupled in series and the third notch filter arrangement comprises a series inductor and a shunt capacitor, wherein each of the notch filter arrangements are configured to generate a notch in a frequency response to attenuate the output signal at a frequency of the modulated frequency component.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: October 18, 2022
    Assignee: REID ACOUSTIC DESIGNS LTD.
    Inventor: Laurence Reid
  • Patent number: 11463052
    Abstract: In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 4, 2022
    Assignees: STMicroelectronics S.r.l., STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Hong Wu Lin, Giovanni Gonano, Edoardo Botti
  • Patent number: 11433403
    Abstract: An electronic driving circuit for a microfluidic device, having a number of synchronized driving stages to generate a respective driving signal for each electrode or group of electrodes of the microfluidic device, the driving signals having a desired amplitude, frequency and phase-shift. Each driving stage has a switching-mode amplifier stage to receive a clock signal and a target signal and to generate, at an output thereof, an output signal defining a respective driving signal. The amplifier stage has: a switching module, coupled to a first internal node and controlled by the clock signal for selectively bringing the first internal node to a control signal; a filter module, coupled between the first internal node and the output, to provide the output signal; and a feedback module.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: September 6, 2022
    Assignee: Menarini Silicon Biosystems S.p.A.
    Inventors: Mauro Ucelli, Andrea Tommasi, Gianni Medoro
  • Patent number: 11418153
    Abstract: This application relates to amplifier circuitry and, in particular, to class-D amplifier circuits. The application describes amplifier circuitry (400) for receiving an input signal (Sin) and generating first and second driving signals (SoutP, SoutN) for driving a bridge-tied-load. The amplifier circuitry includes first and second class-D output stages (403p, 403n) for generating the first and second driving signals based on the input signal. A controller (406) controllably varies a common-mode component of the first and second driving signals based on an indication of amplitude of the first and second driving signals. The controller varies the common-mode component, at lower signal amplitudes, so the common-mode level of the first and second driving signals is moved away from an operating region that leads to distortion.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: August 16, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Andrew J. Howlett
  • Patent number: 11418186
    Abstract: An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: August 16, 2022
    Assignee: pSemi Corporation
    Inventors: Ethan Prevost, Michael Conry
  • Patent number: 11400708
    Abstract: the ejection amount per ejection from the nozzle when the distance between the nozzle and the recording medium is the first distance is equal to the ejection amount per ejection from the nozzle when the distance between the nozzle and the recording medium is the second distance.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: August 2, 2022
    Assignee: Seiko Epson Corporation
    Inventors: Kazuaki Uchida, Shunya Fukuda
  • Patent number: 11387797
    Abstract: Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker is provided for a power amplifier that amplifies an RF signal. The envelope tracker includes an error amplifier that controls a voltage level of a power amplifier supply voltage of the power amplifier based on amplifying a difference between a reference signal and an envelope signal indicating an envelope of the RF signal. The envelope tracker further includes a multi-level switching circuit that generates an error amplifier supply voltage based on sensing a current of the error amplifier, and uses the error amplifier supply voltage to power the error amplifier.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: July 12, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Florinel G. Balteanu, David Richard Pehlke
  • Patent number: 11326917
    Abstract: A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: May 10, 2022
    Assignee: Rohm Co., Ltd.
    Inventors: Isao Niwa, Yuji Kaneda, Yuzo Mizushima
  • Patent number: 11303269
    Abstract: Some embodiments of the invention include a pre-pulse switching system. The pre-pulsing switching system may include: a power source configured to provide a voltage greater than 100 V; a pre-pulse switch coupled with the power source and configured to provide a pre-pulse having a pulse width of Tpp; and a main switch coupled with the power source and configured to provide a main pulse such that an output pulse comprises a single pulse with negligible ringing. The pre-pulse may be provided to a load by closing the pre-pulse switch while the main switch is open. The main pulse may be provided to the load by closing the main switch after a delay Tdelay after the pre-pulse switch has been opened.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: April 12, 2022
    Assignee: Eagle Harbor Technologies, Inc.
    Inventors: Kenneth E. Miller, James R. Prager, Ilia Slobodov, Julian F. Picard
  • Patent number: 11296624
    Abstract: An electronic control device of the invention having a multiple of power supply system lines, with an object of providing a device such that no circulation path is formed in a ground line, includes a power supply in which a multiple of power supply system lines are provided, a multiple of drive units to which the power is independently supplied from the power supply system lines, and at least one controller that outputs control signals to the multiple of drive units, and is configured so that negative side lines of the power supply system lines are connected by one ground line in the controller.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: April 5, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shunsuke Fushie, Yu Kawano, Rei Araki
  • Patent number: 11296663
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: April 5, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
  • Patent number: 11271529
    Abstract: A Class-F power amplifier includes a harmonic matching network topology comprised of circuit elements configured relative to an output network of the power amplifier. The harmonic matching network topology suppresses higher-order harmonics in such a power amplifier and includes coupled-line capacitors and open-stubs that introduce harmonic terminations in the output network, and quarter-wavelength transmission lines to match an overall network to a 50-ohm output load. The harmonic matching network topology enables the power amplifier to exhibit desired performance characteristics in specific frequency ranges for high-power applications.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 8, 2022
    Assignee: QUINSTAR TECHNOLOGY, INC.
    Inventor: Yon-Lin Kok
  • Patent number: 11218122
    Abstract: A supply modulator is provided, having a first amplifier circuit configured to generate a first electrical signal, a second amplifier circuit configured to generate a second electrical signal, the first and second electrical signals being for driving an electrical load, and a control circuit electrically coupled to the first and second amplifier circuits wherein the control circuit is configured to generate a pulsed electrical signal and to supply an output control signal to the second amplifier circuit for controlling generation of the second electrical output signal, wherein the supply modulator is configured to operate in two modes of operation, for the first amplifier circuit to generate the first electrical signals in response to quiescent current of the first amplifier circuit, for the control circuit to generate a modulated electrical signal in accordance with a clock signal in one mode, and, for the second amplifier circuit to operate.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: January 4, 2022
    Assignee: Nanyang Technological University
    Inventors: Joseph Sylvester Chang, Tong Ge, Huiqiao He, Linfei Guo
  • Patent number: 11211907
    Abstract: A Class D amplifier comprising a control circuit configured to receive an audio input signal and derive first, second and third PWM switching control signals therefrom, being supplied to respectively first, second and third switches of a driver, the first and second switches being serially arranged between first and second supply voltages, and having a common node coupled to an output terminal. The driver comprises a DC level shifter being configured to provide a reference voltage to a reference terminal in at least first and second states of operation, said reference voltage including a DC component at least substantially equidistant between the first and second supply voltages. Said third switch being included in a shunt path between the output and the reference terminal.
    Type: Grant
    Filed: May 30, 2020
    Date of Patent: December 28, 2021
    Assignee: Semiconductor Ideas to the Market (ITOM) B.V.
    Inventor: Wolfdietrich Georg Kasperkovitz
  • Patent number: 11166106
    Abstract: A hearable has an audio amplifier circuit coupled to a speaker as a load. The amplifier circuit has current source drive, which attenuates electromagnetically coupled noise of the speaker. In other instances, the amplifier circuit has a first amplifier mode and a second amplifier mode, wherein in the first amplifier mode the amplifier circuit becomes configured to drive the speaker as a voltage source, and in the second amplifier mode the amplifier circuit becomes configured to drive the speaker as a current source. Control logic varies the amplifier circuit between i) the first amplifier mode for larger amplitudes of the audio signal, and ii) the second amplifier mode for smaller amplitudes of the audio signal. Other aspects are also described and claimed.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 2, 2021
    Assignee: APPLE INC.
    Inventors: Michael B. Nussbaum, Roderick B. Hogan, Todd K. Moyer
  • Patent number: 11152892
    Abstract: A method and a system of calibrating a DC offset voltage on a resistor load are provided. The system may include a first operational amplifier, a second operational amplifier, a comparator, a digital signal processor, and a digital to analog convertor. At a calibration mode, under control of the digital signal processor, the system may utilize open-loop high gain characteristics of the first operational amplifier and the comparator to automatically detect and calibrate the DC offset voltage. At an operation mode, the system may automatically compensate the DC offset voltage based on the calibration of the DC offset voltage. In this way, the system and the method can automatically detect, calibrate, and compensate the DC offset voltage with reduced cost and technical complexity.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: October 19, 2021
    Assignee: Beken Corp Shenzhen
    Inventors: Desheng Hu, Donghui Gao, Jiazhou Liu, Dawei Guo
  • Patent number: 11144742
    Abstract: A fingerprint sensor and a terminal device are provided. The fingerprint sensor includes a plurality of integration circuits (110) and a negative feedback circuit (120); the negative feedback circuit (120) is connected to the plurality of integration circuits (110) for respectively fixing an input common mode voltage of each of the integration circuits (110) as a reset bias voltage when the plurality of integration circuits (110) are in a reset phase; and each of the integration circuits (110) corresponds to a fingerprint capacitor respectively, and the integration circuit (110) is configured to perform integration processing on a charge of the corresponding fingerprint capacitor when in an integration phase, and output an output voltage related to the fingerprint capacitor. A fingerprint sensor and a terminal device of the present application could improve an SNR of a fingerprint image without increasing resources of a main control RAM.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: October 12, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Mengwen Zhang
  • Patent number: 11133843
    Abstract: An integrated-circuit output driver generates, in response to an input signal constrained to a first voltage range, a control signal at one of two voltage levels according to a data bit conveyed in the input signal, the two voltages levels defining upper and lower levels of a second voltage range substantially larger than the first voltage range. The output driver generates an output-drive signal constrained to a third voltage range according to the one of the two voltage levels of the control signal, the third voltage range being substantially smaller than the second voltage range.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: September 28, 2021
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Carl W. Werner
  • Patent number: 11105872
    Abstract: According to one embodiment, a magnetic resonance imaging apparatus includes an amplifier, a gradient coil, and adjusting circuitry. The amplifier includes pulse width modulation circuitry modulating a pulse width of a driving signal, which is input to switching elements, in accordance with an input of a control signal corresponding to a waveform of a gradient magnetic field. The gradient coil generates the gradient magnetic field by an electric current supplied in accordance with an output voltage which is output from the amplifier. The adjusting circuitry executes adjustment of a gain of the amplifier, which is included in the control signal, or adjustment of the pulse width of the driving signal, in accordance with a dead time included in a switching cycle of the switching elements.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: August 31, 2021
    Assignee: Canon Medical Systems Corporation
    Inventors: Sho Kawajiri, Motohiro Miura, Masashi Hori, Takahiro Kobayashi
  • Patent number: 11063565
    Abstract: An amplifier having one or more channels where each channel includes a two half bridges (a master and slave sub-channel). The sub-channels can be connected either in parallel or in a full-bridge configuration via internal switches that route signals to a pair of speaker jacks. One switch in the amplifier has a first position that selectively connects the outputs of the master and slave sub-channel to the same input of the speaker load so that the two sub-channels will drive the speaker load in parallel and a second position where the output of the slave sub-channel is connected to another input of the speaker load so that the master sub-channel and the slave sub-channel will drive the speaker load in a Full-bridge configuration.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 13, 2021
    Assignee: QSC, LLC
    Inventors: Anders Lind, Matthew Skogmo
  • Patent number: 11062965
    Abstract: Various embodiments disclose a method for fabricating vertical transistors. In one embodiment, a structure is formed comprising at least a first substrate, an insulator layer on the substrate, a first doped layer on the insulator layer, at least one fin structure in contact with the doped layer, a dielectric layer surrounding a portion of the fin structure, a gate layer on the dielectric layer, a second doped layer in contact with the fin structure, a first contact area in contact with the second doped layer, and at least a first interconnect in contact with the first contact area. The structure is flipped bonded to a second substrate. The first substrate and the insulator layer are removed to expose the first doped layer. A second contact area is formed in contact with the first doped layer. At least a second interconnect is formed in contact with the second contact area.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Xin Miao, Wenyu Xu, Chen Zhang
  • Patent number: 11038468
    Abstract: A circuit arrangement for generating a supply voltage with a controllable ground potential level includes a voltage source that provides the supply voltage ungrounded, a control unit that generates an adjustable control d.c. voltage to ground, and an operational amplifier that is connected via its voltage supply terminals to the supply voltage source, where the control d.c. voltage is applied to the inverting input of the operational amplifier, the non-inverting input of the operational amplifier is connected via a resistor network to the voltage source and to a ground terminal and the output of the operational amplifier is fed back to the inverting input via a capacitor.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: June 15, 2021
    Assignee: Siemens Aktiengesellschaft
    Inventors: Walter Kreb, Ulrich Lehmann, Wilhelm Griesbaum
  • Patent number: 11032878
    Abstract: A method for managing a microwave heating device able to operate based on a first signal having a first fundamental harmonic frequency that is within the microwave range, wherein operation of the microwave heating device (1) is interrupted or modified when, inside the microwave heating device (1), the presence of a second signal is detected, the latter having harmonic components which have frequencies that are different from a fundamental harmonic frequency and an intensity higher than a critical reference value.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: June 8, 2021
    Assignee: ILLINOIS TOOL WORKS INC.
    Inventors: Marco Carcano, Michele Sclocchi
  • Patent number: 10998901
    Abstract: An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: May 4, 2021
    Assignee: pSemi Corporation
    Inventors: Ethan Prevost, Michael Conry
  • Patent number: 10951180
    Abstract: Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit is an output pre-match impedance conditioning shunt circuit, which includes a first shunt inductance, a second shunt inductance, and a shunt capacitor coupled in series. The first shunt inductance comprises a plurality of bondwires coupled between the first current carrying terminal and the second shunt inductance, and the second shunt inductance comprises an integrated inductor coupled between the first shunt inductance and a first terminal of the shunt capacitor. The shunt capacitor is configured to provide capacitive harmonic control of an output of the transistor.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: March 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Pascal Peyrot, Olivier Lembeye, Enver Krvavac
  • Patent number: RE49633
    Abstract: Systems and methods for adaptive modulation of MOSFET driver key parameters for improved voltage regulator efficiency and reliability in a voltage regulator may include a power stage. The power stage may include a high side switch including a high side gate, a peak voltage detection circuit, and a high side driver strength modulator circuit. The high side driver strength modulator circuit may determine a high side driver strength level. The high side driver strength modulator circuit may also connect a subset of the set of high side gate drivers to the high side gate based on the high side driver strength level. The high side driver strength modulator circuit may also disconnect a remaining subset of the set of high side gate drivers from the high side gate.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: August 29, 2023
    Assignee: Dell Products L.P.
    Inventors: Kejiu Zhang, Shiguo Luo, Ralph H. Johnson