Including Class D Amplifier Patents (Class 330/251)
  • Patent number: 11433403
    Abstract: An electronic driving circuit for a microfluidic device, having a number of synchronized driving stages to generate a respective driving signal for each electrode or group of electrodes of the microfluidic device, the driving signals having a desired amplitude, frequency and phase-shift. Each driving stage has a switching-mode amplifier stage to receive a clock signal and a target signal and to generate, at an output thereof, an output signal defining a respective driving signal. The amplifier stage has: a switching module, coupled to a first internal node and controlled by the clock signal for selectively bringing the first internal node to a control signal; a filter module, coupled between the first internal node and the output, to provide the output signal; and a feedback module.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: September 6, 2022
    Assignee: Menarini Silicon Biosystems S.p.A.
    Inventors: Mauro Ucelli, Andrea Tommasi, Gianni Medoro
  • Patent number: 11418186
    Abstract: An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: August 16, 2022
    Assignee: pSemi Corporation
    Inventors: Ethan Prevost, Michael Conry
  • Patent number: 11418153
    Abstract: This application relates to amplifier circuitry and, in particular, to class-D amplifier circuits. The application describes amplifier circuitry (400) for receiving an input signal (Sin) and generating first and second driving signals (SoutP, SoutN) for driving a bridge-tied-load. The amplifier circuitry includes first and second class-D output stages (403p, 403n) for generating the first and second driving signals based on the input signal. A controller (406) controllably varies a common-mode component of the first and second driving signals based on an indication of amplitude of the first and second driving signals. The controller varies the common-mode component, at lower signal amplitudes, so the common-mode level of the first and second driving signals is moved away from an operating region that leads to distortion.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: August 16, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Andrew J. Howlett
  • Patent number: 11400708
    Abstract: the ejection amount per ejection from the nozzle when the distance between the nozzle and the recording medium is the first distance is equal to the ejection amount per ejection from the nozzle when the distance between the nozzle and the recording medium is the second distance.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: August 2, 2022
    Assignee: Seiko Epson Corporation
    Inventors: Kazuaki Uchida, Shunya Fukuda
  • Patent number: 11387797
    Abstract: Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker is provided for a power amplifier that amplifies an RF signal. The envelope tracker includes an error amplifier that controls a voltage level of a power amplifier supply voltage of the power amplifier based on amplifying a difference between a reference signal and an envelope signal indicating an envelope of the RF signal. The envelope tracker further includes a multi-level switching circuit that generates an error amplifier supply voltage based on sensing a current of the error amplifier, and uses the error amplifier supply voltage to power the error amplifier.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: July 12, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Florinel G. Balteanu, David Richard Pehlke
  • Patent number: 11326917
    Abstract: A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: May 10, 2022
    Assignee: Rohm Co., Ltd.
    Inventors: Isao Niwa, Yuji Kaneda, Yuzo Mizushima
  • Patent number: 11303269
    Abstract: Some embodiments of the invention include a pre-pulse switching system. The pre-pulsing switching system may include: a power source configured to provide a voltage greater than 100 V; a pre-pulse switch coupled with the power source and configured to provide a pre-pulse having a pulse width of Tpp; and a main switch coupled with the power source and configured to provide a main pulse such that an output pulse comprises a single pulse with negligible ringing. The pre-pulse may be provided to a load by closing the pre-pulse switch while the main switch is open. The main pulse may be provided to the load by closing the main switch after a delay Tdelay after the pre-pulse switch has been opened.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: April 12, 2022
    Assignee: Eagle Harbor Technologies, Inc.
    Inventors: Kenneth E. Miller, James R. Prager, Ilia Slobodov, Julian F. Picard
  • Patent number: 11296663
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: April 5, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
  • Patent number: 11296624
    Abstract: An electronic control device of the invention having a multiple of power supply system lines, with an object of providing a device such that no circulation path is formed in a ground line, includes a power supply in which a multiple of power supply system lines are provided, a multiple of drive units to which the power is independently supplied from the power supply system lines, and at least one controller that outputs control signals to the multiple of drive units, and is configured so that negative side lines of the power supply system lines are connected by one ground line in the controller.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: April 5, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shunsuke Fushie, Yu Kawano, Rei Araki
  • Patent number: 11271529
    Abstract: A Class-F power amplifier includes a harmonic matching network topology comprised of circuit elements configured relative to an output network of the power amplifier. The harmonic matching network topology suppresses higher-order harmonics in such a power amplifier and includes coupled-line capacitors and open-stubs that introduce harmonic terminations in the output network, and quarter-wavelength transmission lines to match an overall network to a 50-ohm output load. The harmonic matching network topology enables the power amplifier to exhibit desired performance characteristics in specific frequency ranges for high-power applications.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 8, 2022
    Assignee: QUINSTAR TECHNOLOGY, INC.
    Inventor: Yon-Lin Kok
  • Patent number: 11218122
    Abstract: A supply modulator is provided, having a first amplifier circuit configured to generate a first electrical signal, a second amplifier circuit configured to generate a second electrical signal, the first and second electrical signals being for driving an electrical load, and a control circuit electrically coupled to the first and second amplifier circuits wherein the control circuit is configured to generate a pulsed electrical signal and to supply an output control signal to the second amplifier circuit for controlling generation of the second electrical output signal, wherein the supply modulator is configured to operate in two modes of operation, for the first amplifier circuit to generate the first electrical signals in response to quiescent current of the first amplifier circuit, for the control circuit to generate a modulated electrical signal in accordance with a clock signal in one mode, and, for the second amplifier circuit to operate.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: January 4, 2022
    Assignee: Nanyang Technological University
    Inventors: Joseph Sylvester Chang, Tong Ge, Huiqiao He, Linfei Guo
  • Patent number: 11211907
    Abstract: A Class D amplifier comprising a control circuit configured to receive an audio input signal and derive first, second and third PWM switching control signals therefrom, being supplied to respectively first, second and third switches of a driver, the first and second switches being serially arranged between first and second supply voltages, and having a common node coupled to an output terminal. The driver comprises a DC level shifter being configured to provide a reference voltage to a reference terminal in at least first and second states of operation, said reference voltage including a DC component at least substantially equidistant between the first and second supply voltages. Said third switch being included in a shunt path between the output and the reference terminal.
    Type: Grant
    Filed: May 30, 2020
    Date of Patent: December 28, 2021
    Assignee: Semiconductor Ideas to the Market (ITOM) B.V.
    Inventor: Wolfdietrich Georg Kasperkovitz
  • Patent number: 11166106
    Abstract: A hearable has an audio amplifier circuit coupled to a speaker as a load. The amplifier circuit has current source drive, which attenuates electromagnetically coupled noise of the speaker. In other instances, the amplifier circuit has a first amplifier mode and a second amplifier mode, wherein in the first amplifier mode the amplifier circuit becomes configured to drive the speaker as a voltage source, and in the second amplifier mode the amplifier circuit becomes configured to drive the speaker as a current source. Control logic varies the amplifier circuit between i) the first amplifier mode for larger amplitudes of the audio signal, and ii) the second amplifier mode for smaller amplitudes of the audio signal. Other aspects are also described and claimed.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 2, 2021
    Assignee: APPLE INC.
    Inventors: Michael B. Nussbaum, Roderick B. Hogan, Todd K. Moyer
  • Patent number: 11152892
    Abstract: A method and a system of calibrating a DC offset voltage on a resistor load are provided. The system may include a first operational amplifier, a second operational amplifier, a comparator, a digital signal processor, and a digital to analog convertor. At a calibration mode, under control of the digital signal processor, the system may utilize open-loop high gain characteristics of the first operational amplifier and the comparator to automatically detect and calibrate the DC offset voltage. At an operation mode, the system may automatically compensate the DC offset voltage based on the calibration of the DC offset voltage. In this way, the system and the method can automatically detect, calibrate, and compensate the DC offset voltage with reduced cost and technical complexity.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: October 19, 2021
    Assignee: Beken Corp Shenzhen
    Inventors: Desheng Hu, Donghui Gao, Jiazhou Liu, Dawei Guo
  • Patent number: 11144742
    Abstract: A fingerprint sensor and a terminal device are provided. The fingerprint sensor includes a plurality of integration circuits (110) and a negative feedback circuit (120); the negative feedback circuit (120) is connected to the plurality of integration circuits (110) for respectively fixing an input common mode voltage of each of the integration circuits (110) as a reset bias voltage when the plurality of integration circuits (110) are in a reset phase; and each of the integration circuits (110) corresponds to a fingerprint capacitor respectively, and the integration circuit (110) is configured to perform integration processing on a charge of the corresponding fingerprint capacitor when in an integration phase, and output an output voltage related to the fingerprint capacitor. A fingerprint sensor and a terminal device of the present application could improve an SNR of a fingerprint image without increasing resources of a main control RAM.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: October 12, 2021
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Mengwen Zhang
  • Patent number: 11133843
    Abstract: An integrated-circuit output driver generates, in response to an input signal constrained to a first voltage range, a control signal at one of two voltage levels according to a data bit conveyed in the input signal, the two voltages levels defining upper and lower levels of a second voltage range substantially larger than the first voltage range. The output driver generates an output-drive signal constrained to a third voltage range according to the one of the two voltage levels of the control signal, the third voltage range being substantially smaller than the second voltage range.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: September 28, 2021
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Carl W. Werner
  • Patent number: 11105872
    Abstract: According to one embodiment, a magnetic resonance imaging apparatus includes an amplifier, a gradient coil, and adjusting circuitry. The amplifier includes pulse width modulation circuitry modulating a pulse width of a driving signal, which is input to switching elements, in accordance with an input of a control signal corresponding to a waveform of a gradient magnetic field. The gradient coil generates the gradient magnetic field by an electric current supplied in accordance with an output voltage which is output from the amplifier. The adjusting circuitry executes adjustment of a gain of the amplifier, which is included in the control signal, or adjustment of the pulse width of the driving signal, in accordance with a dead time included in a switching cycle of the switching elements.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: August 31, 2021
    Assignee: Canon Medical Systems Corporation
    Inventors: Sho Kawajiri, Motohiro Miura, Masashi Hori, Takahiro Kobayashi
  • Patent number: 11062965
    Abstract: Various embodiments disclose a method for fabricating vertical transistors. In one embodiment, a structure is formed comprising at least a first substrate, an insulator layer on the substrate, a first doped layer on the insulator layer, at least one fin structure in contact with the doped layer, a dielectric layer surrounding a portion of the fin structure, a gate layer on the dielectric layer, a second doped layer in contact with the fin structure, a first contact area in contact with the second doped layer, and at least a first interconnect in contact with the first contact area. The structure is flipped bonded to a second substrate. The first substrate and the insulator layer are removed to expose the first doped layer. A second contact area is formed in contact with the first doped layer. At least a second interconnect is formed in contact with the second contact area.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Xin Miao, Wenyu Xu, Chen Zhang
  • Patent number: 11063565
    Abstract: An amplifier having one or more channels where each channel includes a two half bridges (a master and slave sub-channel). The sub-channels can be connected either in parallel or in a full-bridge configuration via internal switches that route signals to a pair of speaker jacks. One switch in the amplifier has a first position that selectively connects the outputs of the master and slave sub-channel to the same input of the speaker load so that the two sub-channels will drive the speaker load in parallel and a second position where the output of the slave sub-channel is connected to another input of the speaker load so that the master sub-channel and the slave sub-channel will drive the speaker load in a Full-bridge configuration.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 13, 2021
    Assignee: QSC, LLC
    Inventors: Anders Lind, Matthew Skogmo
  • Patent number: 11038468
    Abstract: A circuit arrangement for generating a supply voltage with a controllable ground potential level includes a voltage source that provides the supply voltage ungrounded, a control unit that generates an adjustable control d.c. voltage to ground, and an operational amplifier that is connected via its voltage supply terminals to the supply voltage source, where the control d.c. voltage is applied to the inverting input of the operational amplifier, the non-inverting input of the operational amplifier is connected via a resistor network to the voltage source and to a ground terminal and the output of the operational amplifier is fed back to the inverting input via a capacitor.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: June 15, 2021
    Assignee: Siemens Aktiengesellschaft
    Inventors: Walter Kreb, Ulrich Lehmann, Wilhelm Griesbaum
  • Patent number: 11032878
    Abstract: A method for managing a microwave heating device able to operate based on a first signal having a first fundamental harmonic frequency that is within the microwave range, wherein operation of the microwave heating device (1) is interrupted or modified when, inside the microwave heating device (1), the presence of a second signal is detected, the latter having harmonic components which have frequencies that are different from a fundamental harmonic frequency and an intensity higher than a critical reference value.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: June 8, 2021
    Assignee: ILLINOIS TOOL WORKS INC.
    Inventors: Marco Carcano, Michele Sclocchi
  • Patent number: 10998901
    Abstract: An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: May 4, 2021
    Assignee: pSemi Corporation
    Inventors: Ethan Prevost, Michael Conry
  • Patent number: 10951180
    Abstract: Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit is an output pre-match impedance conditioning shunt circuit, which includes a first shunt inductance, a second shunt inductance, and a shunt capacitor coupled in series. The first shunt inductance comprises a plurality of bondwires coupled between the first current carrying terminal and the second shunt inductance, and the second shunt inductance comprises an integrated inductor coupled between the first shunt inductance and a first terminal of the shunt capacitor. The shunt capacitor is configured to provide capacitive harmonic control of an output of the transistor.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: March 16, 2021
    Assignee: NXP USA, Inc.
    Inventors: Pascal Peyrot, Olivier Lembeye, Enver Krvavac
  • Patent number: 10938359
    Abstract: A power amplifier includes an operational amplifier, a ramp generator communicatively coupled to both a first comparator and a second comparator; the first comparator further communicatively coupled to a negative output port of the operational amplifier; the second comparator further communicatively coupled to a positive output port of the operational amplifier; a first inverter communicatively coupled to the first comparator; a second inverter communicatively coupled to the second comparator; wherein the first inverter is communicatively coupled to both a positive input port of the operational amplifier via a first resistor and coupled to a negative input port of the operational amplifier via a fourth resistor; and the second inverter is communicatively coupled to both the positive input port of the operational amplifier via a second resistor and connected to the negative input port of the operational amplifier via a third resistor.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: March 2, 2021
    Assignee: Beken Corporation
    Inventors: Jiazhou Liu, Donghui Gao
  • Patent number: 10923074
    Abstract: A receiving circuit includes a first capacitor connected to a first signal line, a second capacitor connected to a second signal line. A first bias control circuit may convert a common mode voltage of a first received signal provided through the first capacitor to a first voltage level to output a first biased signal. A second bias control circuit may convert a common mode voltage of a second received signal provided through the second capacitor to a second voltage level to output a second biased signal. A balance compensation circuit may receive the first biased signal and the second biased signal, compensate for an offset voltage of the first biased signal based on the second biased signal, and compensate for an offset voltage of the second biased signal based on the first biased signal to output a first differential signal and a second differential signal.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: February 16, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kihyun Pyun, Seung-woon Shin, Eui-myeong Cho
  • Patent number: 10910714
    Abstract: A signal processing circuit reduces die size and power consumption for each antenna element. The signal processing circuit includes a first set of ports, a third port, a first path, a second path and a first transistor. The first path is between a first port of the first set of ports and the third port. The second path is between a second port of the first set of ports and the third port. The first transistor is coupled between the first path and the second path. The first transistor is configured to receive a control signal to control the first transistor to adjust an impedance between the first path and the second path.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: February 2, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Bon-Hyun Ku, Jeremy Dunworth
  • Patent number: 10901296
    Abstract: Embodiments of the present invention are directed to an electro-optical device that comprises a substrate, a waveguide structure, and two contact layer portions. The contact layer portions extend side-by-side along a direction of light propagation that is parallel to the substrate. The waveguide structure may guide light along said direction of light propagation. The waveguide structure comprises an optically nonlinear material and interdigitated crosspieces. The crosspieces extend parallel to the substrate from each of said two contact layer portions and transversely to such portions. The optically nonlinear material is in contact with at least portions of the interdigitated crosspieces. Said crosspieces are not in direct contact with each other, forming a composite waveguide core involving an alternating sequence of distinct materials along said propagation direction.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Karl Felix Sebastian Eltes, Darius Urbonas
  • Patent number: 10855237
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for adjusting an audio signal to avoid undesirable system behavior under low alternating-current (AC) line voltage and high volume conditions. For example, certain aspects provide an apparatus for audio amplification. The apparatus generally includes an amplifier, a supply voltage generation circuit having an input coupled to an input voltage node of the apparatus and an output coupled to a supply voltage terminal of the amplifier, the supply voltage generation circuit having a transformer, a primary winding of the transformer being coupled to the input voltage node, a peak voltage detector circuit configured to detect a peak voltage at a secondary winding of the transformer, and a controller circuit configured to adjust an input audio signal of the amplifier based on the detected peak voltage.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: December 1, 2020
    Assignee: BOSE CORPORATION
    Inventors: Andrew W. Clark, Frank Walter Thomas
  • Patent number: 10841137
    Abstract: It is described a modulator apparatus (3) comprising: an input terminal (23) structured to receive an analog electrical signal (x(t)) having an information content to be transmitted; a loop filter structured to receive an error signal (?(t) and provide a filtered signal (s(t)), the loop filter being configured to minimize said error signal (?(t)); a modulator device (10) configured to module the filtered signal (s(t)) and provide a Pulse Width Modulated, PWM, signal (y(t)) to be transmitted including a plurality of pulses having corresponding widths correlated to non-quantized amplitudes of the filtered signal (s(t)); a first pulse width demodulator (11) configured to receive the PWM, signal (y(t)) and provide a demodulated signal (?(t)) and a difference module (12) configured to receive the analog electrical signal (x(t)) and the demodulated signal (?(t)) and provide the error signal (?(t)).
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: November 17, 2020
    Assignee: POLITECNICO DI MILANO
    Inventors: Umberto Spagnolini, Lorenzo Combi
  • Patent number: 10840866
    Abstract: An amplifier circuit arrangement and a method for calibrating the same. In an embodiment an amplifier circuit arrangement includes a desired signal path including a differential amplifier for an analog signal having an input side and an output side and an analog-to-digital converter having an output terminal, a first feedback path to calibrate an offset of the desired signal path coupled to differential signal lines at the output side of the differential amplifier and to differential signal lines at the input side of the differential amplifier, the first feedback path including a comparator and at least one counter controlled by an output of the comparator and a second feedback path to calibrate a drift of the desired signal path coupled to the output terminal of the analog-to-digital converter and to the differential signal lines at the input side of the differential amplifier, the second feedback path including an average filter.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: November 17, 2020
    Assignee: TDK CORPORATION
    Inventors: Lei Zou, Pia Sho Garbarsch
  • Patent number: 10812022
    Abstract: A power supply apparatus including a signal generator circuit configured to generate a plurality of power supply signals via at least one DC-to-DC converter, the plurality of power supply signals including a first power supply signal on a first output path and a second power supply signal on a second output path that is independent of the first output path, the first power supply signal being different from the second power supply signal. The apparatus includes a switching circuit to provide during a first operating mode, a first combined power supply signal on the first output path based on the first power supply signal and a third power supply signal of the plurality of power supply signals. The switching circuit provides during a second operating mode, a second combined power supply signal on the second output path based on the second power supply signal and the third power supply signal.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 20, 2020
    Assignee: Intel IP Corporation
    Inventors: Stephan Henzler, Johannes Harrebek, Christian Kranz, Holger Wenske
  • Patent number: 10804886
    Abstract: Some embodiments of the invention include a pre-pulse switching system. The pre-pulsing switching system may include: a power source configured to provide a voltage greater than 100 V; a pre-pulse switch coupled with the power source and configured to provide a pre-pulse having a pulse width of Tpp; and a main switch coupled with the power source and configured to provide a main pulse such that an output pulse comprises a single pulse with negligible ringing. The pre-pulse may be provided to a load by closing the pre-pulse switch while the main switch is open. The main pulse may be provided to the load by closing the main switch after a delay Tdelay after the pre-pulse switch has been opened.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: October 13, 2020
    Assignee: EAGLE HARBOR TECHNOLOGIES, INC.
    Inventors: Kenneth E. Miller, James R. Prager, Ilia Slobodov, Julian F. Picard
  • Patent number: 10700679
    Abstract: An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: June 30, 2020
    Assignee: pSemi Corporation
    Inventors: Ethan Prevost, Michael Conry
  • Patent number: 10686410
    Abstract: A rail balancing circuit is described herein for use with a power supply, the RBC comprising: a circuit adapted to respond to over-voltage and under-voltage conditions in the power supply that comprises a positive rail voltage source and a negative rail voltage source, such that any deviation from a balanced condition between the positive rail voltage source and the negative rail voltage source is substantially instantaneously corrected to bring both the positive and negative rail voltage sources back to the balanced condition.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: June 16, 2020
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 10674280
    Abstract: A hearable has an audio amplifier circuit coupled to a speaker as a load. The amplifier circuit has current source drive, which attenuates electromagnetically coupled noise of the speaker. In other instances, the amplifier circuit has a first amplifier mode and a second amplifier mode, wherein in the first amplifier mode the amplifier circuit becomes configured to drive the speaker as a voltage source, and in the second amplifier mode the amplifier circuit becomes configured to drive the speaker as a current source. Control logic varies the amplifier circuit between i) the first amplifier mode for larger amplitudes of the audio signal, and ii) the second amplifier mode for smaller amplitudes of the audio signal. Other aspects are also described and claimed.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: June 2, 2020
    Assignee: APPLE INC.
    Inventors: Michael B Nussbaum, Roderick B Hogan, Todd K Moyer
  • Patent number: 10666300
    Abstract: Described herein are systems configured for inter-band carrier aggregation. Systems include a multiplexing circuit having a switching network and diplexers wherein the switching network is configured to share inductors between multiple paths of the multiplexing circuit. The filters can be designed so that when operated simultaneously (e.g., during multi-band operation) the same inductance can be used allowing the switching network to switch in a particular inductance into the path. The described systems can include an inductance that is coupled to an output port so that when operating in single-band mode, the different paths share the same inductance. Relative to other solutions, the described systems can improve performance (e.g., reduce insertion loss), reduce the number of components in the associated module, reduce manufacturing costs, and the like.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: May 26, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Stephane Richard Marie Wloczysiak, Phi Nguyen Dang
  • Patent number: 10637409
    Abstract: A power amplifier circuit includes a power amplifier that amplifies an input signal and outputs the amplified signal from an output terminal thereof, a first filter circuit that has a frequency characteristic that attenuates an Nth-order harmonic of the amplified signal, N that is an integer greater than or equal to 2, and a second filter circuit that has a frequency characteristic that attenuates the Nth-order harmonic of the amplified signal. The first filter circuit includes a first capacitor and a first inductor. The first capacitor and the first inductor are connected in series between the output terminal and ground. The second filter circuit includes a second capacitor and a second inductor. The second capacitor and the second inductor are connected in series between the output terminal and ground.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: April 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Yamada, Yuuri Honda, Satoshi Tanaka
  • Patent number: 10637405
    Abstract: A radio frequency (RF) amplifier circuit includes an amplifier device and a first baseband bias circuit. The amplifier device includes a first input configured to receive a first signal to be amplified and a first output configured to output a first amplified signal. The first baseband bias circuit includes an input coupled to the first output of the amplifier device. The first baseband bias circuit includes a first envelope decoupling circuit and a first harmonic decoupling circuit. The first envelope decoupling circuit includes a first bulk capacitor and a first distributed inductor configured to resonate in a baseband frequency range. The first harmonic decoupling circuit includes a second bulk capacitor and a second distributed inductor configured to resonate at a harmonic frequency of the frequency of the first signal received at the input of the amplifier device.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: April 28, 2020
    Assignee: NXP USA, Inc.
    Inventors: Arturo Roiz, Justin Nelson Annes, Terry L. Thomas
  • Patent number: 10622943
    Abstract: An oscillator, including a resonance circuit, a cross coupled current source circuit, and a positive feedback circuit coupled between the current source circuit and the resonance circuit, where the resonance circuit is configured to generate a differential oscillation signal having a first oscillation frequency, the positive feedback circuit is configured to receive the differential oscillation signal, and amplify a gain of the differential oscillation signal to obtain a differential output oscillation signal, and the current source circuit is configured to provide an adjustable bias current for the resonance circuit and the positive feedback circuit.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: April 14, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Kai Shi, Lei Lu, Lei Xie
  • Patent number: 10615888
    Abstract: Disclosed is a passive intermodulation (PIM) test system having a pulsed signal generator configured to generate and apply a pulsed stimulus signal to a device under test. The PIM test system is further configured to measure a power of at least one PIM product generated by a PIM source in the device under test using the pulsed stimulus signal. Also disclosed in a method for evaluating PIM in a device under test, the method includes using a pulsed stimulus signal to measure a power of at least one PIM product generated by a PIM source in the device under test.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: April 7, 2020
    Assignee: BIRD TECHNOLOGIES GROUP INC.
    Inventors: Timothy L. Holt, Timothy M. O'Brien
  • Patent number: 10609477
    Abstract: A boosted audio amplifier system includes a first digital interpolation filter configured to oversample an audio input signal at a first oversampling rate and includes a signal level detector having an input coupled to receive the oversampled audio input signal and configured to produce an audio input level signal. The system further includes a programmable delay buffer having inputs coupled to receive the oversampled audio input signal and a first delay signal. The programmable delay buffer adds a first delay to the oversampled audio input signal to produce a delayed input signal. The system also includes a first processor having inputs coupled to receive a battery voltage level signal, the audio input level signal and the first delay signal. The first processor is configured to produce boost control signals to regulate a boost voltage.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: March 31, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jasjot Singh Chadha, David Hernandez, Mukund Navada Kanyana, Rejin Kanjavalappil Raveendranath, Sahiti Priya C
  • Patent number: 10594313
    Abstract: Systems and methods for adaptive modulation of MOSFET driver key parameters for improved voltage regulator efficiency and reliability in a voltage regulator may include a power stage. The power stage may include a high side switch including a high side gate, a peak voltage detection circuit, and a high side driver strength modulator circuit. The high side driver strength modulator circuit may determine a high side driver strength level. The high side driver strength modulator circuit may also connect a subset of the set of high side gate drivers to the high side gate based on the high side driver strength level. The high side driver strength modulator circuit may also disconnect a remaining subset of the set of high side gate drivers from the high side gate.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: March 17, 2020
    Assignee: Dell Products L.P.
    Inventors: Kejiu Zhang, Shiguo Luo, Ralph H. Johnson
  • Patent number: 10587226
    Abstract: An amplifier device includes an input terminal, an output terminal, a first transistor having a control terminal and first and second current-carrying terminals, and a class-J circuit coupled between the second current-carrying terminal of the first transistor and the output terminal and configured to harmonically terminate the first transistor. The class-J circuit may include a first resonator, characterized by a first resonant frequency substantially equal to a second harmonic frequency. The first resonator may be coupled between the second current-carrying terminal and a voltage reference. A shunt inductor that is distinct from the first resonator may be coupled between the second current-carrying terminal and the voltage reference.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: March 10, 2020
    Assignee: NXP USA, Inc.
    Inventors: Maruf Ahmed, Margaret A. Szymanowski, Joseph Staudinger
  • Patent number: 10547275
    Abstract: A new method for amplifying signals having higher bandwidth, lower T.H.D., higher efficiency, smaller circuit size and lower costs in design, has been developed. A clipped signal is amplified to smaller pieces and each smaller part is amplified. Adding clipped amplified signals to each other, the main amplified signal is generated.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: January 28, 2020
    Inventor: Alireza Alemi
  • Patent number: 10498229
    Abstract: A method to soft start a charge pump circuit according to embodiments includes enabling switching for a plurality of power transistors, selecting a first switching control signal from a plurality of switching control signals for the selected plurality of power transistors, slowly ramping up a plurality of bootstrap supply voltages associated with the selected plurality of power transistors, driving a gate-to-source voltage of each power transistor of the selected plurality of power transistors at a first predefined level, and determining if the plurality of bootstrap supply voltages are less than a second predefined level. If the plurality of bootstrap supply voltages are less than the second predefined level, the method further includes toggling and thereby selecting a second switching control signal from the plurality of switching control signals for a second selected plurality of power transistors.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: December 3, 2019
    Assignee: Intersil Americas LLC
    Inventors: Eric Magne Solie, Mehul Shah, Bin Li, Paul K. Sferrazza
  • Patent number: 10476444
    Abstract: A system may include a plurality of playback paths comprising an open-loop playback path configured to drive an output load and a closed-loop playback path. The closed-loop playback path may include an outer feedback loop comprising one or more integrators, a quantizer, and an output driver for driving the output load, the outer feedback loop having an outer loop feedback gain and an inner feedback loop comprising the one or more integrators and the quantizer and excluding the output driver, wherein the inner feedback loop has a variable inner loop feedback gain which is adjustable to match the outer loop feedback gain.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: November 12, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Tejasvi Das, Xin Zhao, Ku He, Nishant Jain, Lei Zhu, Xiaofan Fei
  • Patent number: 10461699
    Abstract: The present document describes a digital power amplifier configured to provide an amplified output signal at an output port based on an input signal. The power amplifier comprises a drive unit configured to generate a high side drive signal comprising a sequence of pulses for controlling the high side switch and a low side drive signal comprising a sequence of pulses for controlling the low side switch, respectively. The drive signals are generated such that the pulses of the high side drive signal are non-overlapping with regards to the pulses of the low side drive signal, and such that the sequence of pulses of the high side drive signal and the sequence of pulses of the low side drive signal have a reduced fraction of energy from higher order harmonics compared to a sequence of rectangular shaped pulses.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: October 29, 2019
    Assignee: Dialog Semiconductor B.V.
    Inventors: Mahbub Reja, Shobak Kythakyapuzha
  • Patent number: 10445540
    Abstract: Systems and methods for a distributed antenna network are provided. One system includes a plurality of antenna modules coupled via a communication line, with each antenna module configured to be switched between a through state and a connected state using radio-frequency identification (RFID) control signals. The system further includes a plurality of antennas, with each antenna connected to a corresponding antenna module. A controller is coupled to the communication line and configured to transmit RFID control signals to the plurality of antenna modules to selectively activate one of the antenna modules by switching the antenna module to the connected state to thereby activate an antenna connected to the antenna module in the connected state.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: October 15, 2019
    Assignee: INTERMEC, INC.
    Inventors: Rene Martinez, Pavel Nikitin, Stephen J. Kelly, Jason Harrigan
  • Patent number: 10447217
    Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: October 15, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Xin Zhao, Tejasvi Das, Xiaofan Fei, Alan Mark Morton
  • Patent number: 10404312
    Abstract: The present disclosure relates to a signal processing apparatus capable of reducing a circuit scale when transmitting and receiving a signal from an antenna. A first n-type MOS transistor amplifies a transmission signal to be transmitted from the antenna. A second n-type MOS transistor supplies a reception signal to be received from the antenna to a reception circuit. The first n-type MOS transistor and the second n-type MOS transistor are connected to the antenna in series. Furthermore, the reception circuit is connected to a contact between the first n-type MOS transistor and the second n-type MOS transistor. The present disclosure is capable of being applied to, for example, a radio transceiver.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: September 3, 2019
    Assignee: SONY CORPORATION
    Inventors: Naoto Yoshikawa, Shinya Tada