Including D.c. Feedback Bias Control For Stabilization Patents (Class 330/290)
  • Patent number: 10122333
    Abstract: The present disclosure relates to circuitry including an auto-bias circuit for a stacked FET power amplifier. The auto-bias circuit includes a dividing circuit and an averaging circuit. The dividing circuit is configured to receive a control signal with a control voltage and provide a first pre-gate signal having a first pre-gate voltage that corresponds to a fraction of the control voltage. The averaging circuit is configured to receive the control signal and a supply signal with a supply voltage and provide a second pre-gate signal having a second pre-gate voltage that corresponds to a fraction of a sum of the control voltage and the supply voltage. The stacked power amplifier includes a first FET in series with a second FET. The first FET receives a first gate signal derived from the first pre-gate signal. The second FET receives a second gate signal derived from the second pre-gate signal.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: November 6, 2018
    Assignee: Qorvo US, Inc.
    Inventor: Michael Roberg
  • Patent number: 9980333
    Abstract: A driving apparatus configured to drive a light emitting device includes a driving current source module operable to supply current to the light emitting device via a node during operation. A protection module coupled to the node and the driving current source module selectively injects current to the node during operation. The driving current source module is controlled based on a detection result of a voltage on the node.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: May 22, 2018
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventors: Yi Jun Duan, Tao Tao Huang
  • Patent number: 9843293
    Abstract: Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: December 12, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff, Simon Edward Willard
  • Patent number: 9793880
    Abstract: This invention eliminates the need for “capacitor coupling” or “transformer coupling,” and the associated undesirable parasitic capacitance and inductance associated with these coupling techniques when designing high frequency (˜60 GHz) circuits. At this frequency, the distance between two adjacent stages needs to be minimized. A resonant circuit in series with the power or ground leads is used to isolate a biasing signal from a high frequency signal. The introduction of this resonant circuit allows a first stage to be “directly coupled” to a next stage using a metallic trace. The “direct coupling” technique passes both the high frequency signal and the biasing voltage to the next stage. The “direct coupling” approach overcomes the large die area usage when compared to either the “AC coupling” or “transformer coupling” approach since neither capacitors nor transformers are required to transfer the high frequency signals between stages.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: October 17, 2017
    Assignee: Tensorcom, Inc.
    Inventors: Zaw Soe, KhongMeng Tham
  • Patent number: 9582454
    Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 28, 2017
    Assignee: Intel Corporation
    Inventors: Tzu-Chien Hsueh, Ganesh Balamurugan, Bryan K. Casper
  • Patent number: 9438170
    Abstract: A power amplifier includes an input circuit configured to receive an input signal. At least two transistors connected in series. A first transistor of the at least two transistors is located at a first end of the at least two transistors. A second transistor of the at least two transistors is located at a second end of the at least two transistors. The first transistor is coupled to a low voltage power supply node. The first gate of the first transistor is coupled to a first bias voltage. The input signal is coupled to a first gate of the first transistor. At least one capacitor is coupled between a second gate of the second transistor and the low voltage power supply node. An output circuit coupled to a second gate of the second transistor.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: September 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jun-De Jin
  • Patent number: 9379674
    Abstract: A transimpedance pre-amplifier (TIA) with an improved bandwidth. In the TIA, a feedback circuit is added to a regulated cascode structure to be connected in parallel, so that an input resistance value is reduced and a bandwidth is easily broadened. Alternatively, an inductor is added to the regulated cascode structure, so that an input capacitance is reduced and bandwidth is easily broadened.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: June 28, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Ho Kim, Sang-Soo Lee
  • Patent number: 9028479
    Abstract: A radio-frequency (RF) amplifier having a direct response to an arbitrary signal source to output one or more electrosurgical waveforms within an energy activation request, is disclosed. The RF amplifier includes a phase compensator coupled to an RF arbitrary source, the phase compensator configured to generate a reference signal as a function of an arbitrary RF signal from the RF arbitrary source and a phase control signal; at least one error correction amplifier coupled to the phase compensator, the at least one error correction amplifier configured to output a control signal at least as a function of the reference signal; and at least one power component coupled to the at least one error correction amplifier and to a high voltage power source configured to supply high voltage direct current thereto, the at least one power component configured to operate in response to the control signal to generate at least one component of the at least one electrosurgical waveform.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Covidien LP
    Inventor: James H. Orszulak
  • Patent number: 8901984
    Abstract: A direct current offset correction circuit includes an obtaining module, a controller, and a correction module. The obtaining module obtains a DC offset voltage from an output of a target circuit. The controller is connected to the obtaining module, and the controller outputs correction signals in response to the direct current offset voltage being greater than a predetermined voltage. The correction module is connected to the target circuit, the obtaining module, and the controller. The correction module compensates the direct current offset voltage of the target circuit according to the correction signals.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: December 2, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Yang-Han Lee
  • Publication number: 20140347131
    Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Antonius Maria Hurxk, Tony Vanhoucke, Jan Willem Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
  • Publication number: 20140253243
    Abstract: A power amplifying module includes a radio frequency amplifying circuit including an amplifying circuit configured to amplify an input signal and output an amplified signal, and a bias circuit of an emitter-follower type configured to bias the amplifying circuit to an operating point, and a constant voltage generating circuit configured to generate, from a first reference voltage, a first constant voltage applied to a base side of a transistor of the bias circuit and a second constant voltage applied to a collector side of the transistor.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 11, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Hiroshi HAGISAWA, Satoshi SAKURAI
  • Patent number: 8766724
    Abstract: The apparatus and method thereof accurately sense and convert a radio frequency (RF) current signal to direct current (DC) independent of process variation and temperature, and without requiring high speed, high voltage amplifiers for its operation. The apparatus comprises an AC coupled circuit that couples the RF signal from the main device to a sense device with an N:M ratio, a low pass filter system that extracts the DC content of the RF current signal, and a negative feedback loop that forces the DC content of the main device and the sensed device to be equal. Exemplary embodiments include a current sensor that provides feedback to protect an RF power amplifier from over-current condition, and a RF power detection and control in a RF power amplifier (PA) that multiplies the sensed output current by the sensed output voltage to be used as a feedback to control the PA's bias.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: July 1, 2014
    Assignee: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Daniel Ho, Malcolm Smith
  • Patent number: 8742849
    Abstract: A linear source follower amplifier is provided with a first metal-oxide semiconductor (MOS) field effect transistor (FET) having a gate to accept an ac input signal and a source to supply an ac output signal. A second MOS FET has a gate to accept the ac input signal, a source connected to the drain of the first MOS FET. A third MOS FET has a drain connected to the source of the first MOS FET, a gate connected to the drain of the second MOS FET, and a source connected to a first reference voltage. A fourth MOS FET has a drain and a gate connected to the drain of the second MOS FET and a source connected to the first reference voltage. A current source has an input connected to a second reference voltage, and an output connected to the drain of the first MOS FET.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: June 3, 2014
    Assignee: Applied Micro Circuits Corporation
    Inventors: Tarun Gupta, Ramesh Kumar Singh
  • Patent number: 8558621
    Abstract: Disclosed herein is a driver amplifier circuit, including: a first current source transistor of a first conductivity type, and a second current source transistor of the first conductivity type, control voltages being supplied to gates of the first current source transistor and the second current source transistor, respectively; a first switching transistor of the first conductivity type, and a second switching transistor of the first conductivity type; a third switching transistor of a second conductivity type, and a fourth switching transistor of the second conductivity type; first, second, third, and fourth resistor elements; and a first output node and a second output node.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: October 15, 2013
    Assignee: Sony Corporation
    Inventors: Hidekazu Kikuchi, Tomokazu Tanaka, Kunio Gosho
  • Patent number: 8552803
    Abstract: Techniques are provided for dynamically biasing an amplifier to extend the amplifier's operating range while conserving power. In an embodiment, a detector is provided to measure the amplifier output to determine an operating region of the amplifier. The output of the detector may be input to a bias adjuster, which outputs a dynamic voltage level supplied to at least one bias transistor in the amplifier. Multiple embodiments of the detector and bias adjuster are disclosed.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: October 8, 2013
    Assignee: Qualcomm Incorporated
    Inventors: Bo Sun, Sankaran Aniruddhan
  • Patent number: 8503960
    Abstract: An amplifier receives an input signal with an input node, provides an output signal in response, and includes a main branch and an auxiliary branch. The auxiliary branch is coupled between the input node and a splitting node for input matching of the input node. The main branch, also coupled to the splitting node, has an output node of current mode, and is arranged to output the output signal at the output node. An associated receiver is also disclosed.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: August 6, 2013
    Assignee: Mediatek Singapore PTE. Ltd.
    Inventors: Fei Song, Chun-Geik Tan
  • Patent number: 8390742
    Abstract: In a semiconductor integrated circuit arranged to perform sag compensation for a video signal, an operational amplifier includes a non-inverted input terminal, an inverted input terminal, and an output terminal, in which a video signal is input to the non-inverted input terminal. A first resistor includes a first end connected to the inverted input terminal and a second end being grounded. The output terminal is connected to a first external terminal and the inverted input terminal is connected to a second external terminal. A second resistor includes a first end connected to the output terminal and a second end connected to the inverted input terminal. A first capacitor is disposed between the first external terminal and the second external terminal and connected in parallel to the second resistor, and the second resistor has a resistance value determined based on a capacitance value of the first capacitor.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: March 5, 2013
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Shuhei Abe, Nagayoshi Dobashi, Yoshiaki Hirano
  • Patent number: 8390491
    Abstract: Embodiments of the present invention may provide an integrated circuit that may comprise a first transistor to receive an input voltage signal at its gate and generate an output voltage signal at its drain. Further, the integrated circuit may comprise a second transistor to form an active load of the first transistor, the second transistor may have its drain and gate coupled to the drain of the first transistor. In addition, the integrated circuit may comprise a third transistor to form a current mirror with the second transistor, a fourth transistor to form an active load of the third transistor, and a fifth transistor to form a current mirror with the fourth transistor. The fifth transistor may be connected to the drain of the second transistor. The integrated circuit may form an amplifier and Gm stage of a reference buffer.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Tsutomu Wakimoto
  • Patent number: 8326371
    Abstract: A method, system, and apparatus of a DC current based on chip RF power detection scheme for a power amplifier are disclosed. In one embodiment, a method includes generating a scaled current from an other current associated with power amplifier, transforming the scaled current (e.g., the scaled current may be scaled to the other current value) into a digital signal and using the digital signal to set a radio frequency power value of an antenna of the antenna module. The method may include transforming the scaled current into a voltage signal. The method may also include transforming the voltage signal into the digital signal. The method may also include generating a current mirror from a low dropout regulator.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: December 4, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Apu Sivadas, Gireesh Rajendran, Ashish Lachhwani, David Cohen
  • Publication number: 20120126896
    Abstract: One embodiment relates to a continuous-time circuit configured with an offset cancellation loop. The continuous-time circuit includes a multi-stage amplifier chain, including a first amplifier stage and a last amplifier stage, and an offset cancellation loop. The offset cancellation loop is configured to receive an output of the last amplifier stage and to provide an offset correction voltage signal to the first amplifier stage. The offset compensation loop may create one dominant pole and a single consequential parasitic pole so as to have greater stability and may advantageously achieve a second-order roll-off in response magnitude at higher frequencies. Other embodiments, aspects, and features are also disclosed.
    Type: Application
    Filed: November 24, 2010
    Publication date: May 24, 2012
    Inventors: Sriram NARAYAN, Xiaoyan SU, Sergey SHUMARAYEV
  • Patent number: 8111104
    Abstract: Biasing methods and devices for power amplifiers are described. The described methods and devices use the power amplifier output voltage to generate bias voltages. The bias voltages are obtained using rectifiers and voltage dividers. The described biasing methods and devices can be used with class-E power amplifiers.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: February 7, 2012
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Joseph F. Ahadian, Vikas Sharma, Neil Calanca, Jaroslaw E. Adamski
  • Patent number: 8063706
    Abstract: A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported.
    Type: Grant
    Filed: August 22, 2010
    Date of Patent: November 22, 2011
    Assignee: Broadcom Corporation
    Inventors: Mingyuan Li, Ali Afsahi, Arya Reza Behzad
  • Patent number: 8058929
    Abstract: In one embodiment, a method includes receiving, at a filter comprising a Miller amplifier, a differential data signal output by a limiting amplifier (LA), the data signal comprising an output direct current (DC) offset resulting at least in part from a threshold-adjustment signal applied to the LA or an intrinsic DC offset caused by physical characteristics of the LA. In one embodiment, the method additionally includes generating a compensation signal based on the threshold-adjustment signal, a polarity of the compensation signal being opposite a polarity of the threshold-adjustment signal or the DC offset, a magnitude of the compensation signal being a function of the magnitude of the threshold-adjustment signal. In one embodiment, the method further includes introducing the compensation signal to an internal node of the Miller amplifier to compensate for the DC offset to keep one or more amplifier stages of the Miller amplifier in their linear operating regions.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: November 15, 2011
    Assignee: Fujitsu Limited
    Inventor: Scott McLeod
  • Patent number: 8004363
    Abstract: A wideband low-noise amplifier of the present invention is designed such that an input terminal is connected to a base of a first transistor, one terminal of a first passive element, and one terminal of a third passive element; an emitter of the first transistor is grounded; a collector of the first transistor is connected to an output terminal, a base of a second transistor, one terminal of a capacitor, and one terminal of a second passive element; the other terminal of the first passive element is connected to the other terminal of the capacitor; an emitter of the second transistor is connected to the other terminal of the third passive element; and a power terminal is connected to a collector of the second transistor and the other terminal of the second passive element, wherein impedance of the third passive element is determined based on impedance of the first transistor whose emitter size is determined to suite desired saturation level of amplification, thus establishing input impedance matching.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: August 23, 2011
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Munenari Kawashima, Yo Yamaguchi, Kazuhiro Uehara, Kenjiro Nishikawa
  • Publication number: 20110181364
    Abstract: Biasing methods and devices for power amplifiers are described. The described methods and devices use the power amplifier output voltage to generate bias voltages. The bias voltages are obtained using rectifiers and voltage dividers. The described biasing methods and devices can be used with class-E power amplifiers.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Inventors: Joseph F. Ahadian, Vikas Sharma, Neil Calanca, Jaroslaw E. Adamski
  • Patent number: 7982542
    Abstract: A circuit comprises a first amplifier portion and a second amplifier portion. The first amplifier portion includes first and second transistors coupled together in a common-base configuration. A current mirror is coupled to the first and second transistors. A first filter is coupled between a first input and the first and second transistors. The second amplifier portion includes third and fourth transistors coupled together in a common-base configuration. First and second current sources are coupled to the third and fourth transistors. A second filter is coupled between a second input and the control electrodes of the third and fourth transistors, wherein the first and second filters are coupled together.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: July 19, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Thierry Sicard
  • Patent number: 7944307
    Abstract: A device for amplifying signals over a wide frequency range features stacked amplifying modules connected between a DC voltage source and an electrical ground. The stacking configuration reuses the DC current produced the voltage source, and thus reduces the amount of operational DC current permitting the use of lower voltage, higher frequency devices to be used. The amplifying modules are fed signals which are different versions of an input signal, and the output signals are AC coupled using capacitors to balance out gain imbalances and asymmetries between the amplifying modules.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: May 17, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Marc Goldfarb, Edmund J. Balboni
  • Patent number: 7915958
    Abstract: An amplifier comprises an input terminal that inputs an AC voltage signal; an amplifying unit having a transistor for amplifying the input AC voltage signal; a current detecting unit connected internally of said amplifying unit; and a control-current source controlled by said current detecting unit that drives an input stage of the transistor.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: March 29, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hirokazu Ooyabu
  • Patent number: 7898336
    Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: March 1, 2011
    Assignee: D2Audio Corporation
    Inventors: Robert David Zucker, Barry Harvey
  • Patent number: 7825734
    Abstract: An amplifier with an output protection having an input stage defining a feedback node, an output stage connected to the feedback node and defining an output node supplying an output voltage, and a feedback stage connected between the output and the feedback nodes. A mirror stage is connected to the feedback node and has the same structure as the output stage, the mirror stage defining a reference node connected to the feedback stage for generating a reference voltage to be compared to the output voltage by the feedback stage. The feedback stage generates a current limitation signal fed to the feedback node when a difference between the output and the reference voltages is higher than a threshold.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: November 2, 2010
    Assignee: STMicroelectronics Design and Application s.r.o.
    Inventors: Peter Murin, Hynek Saman
  • Publication number: 20100225395
    Abstract: An exemplary negative impedance converting circuit for functioning as a voltage buffer and/or negating the impedance of a connected load. The negative impedance converting circuit includes inputs, outputs, a first transconductance stage and a second transconductance stage. The transconductance gain value of the first transconductance stage is greater than a transconductance gain value of the second transconductance stage. Exemplary embodiments of a reference voltage buffer using the negative impedance converting circuit are also described.
    Type: Application
    Filed: July 22, 2009
    Publication date: September 9, 2010
    Applicant: ANALOG DEVICE, INC.
    Inventor: Gregory PATTERSON
  • Patent number: 7786807
    Abstract: A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: August 31, 2010
    Assignee: Broadcom Corporation
    Inventors: Mingyuan Li, Ali Afsahi, Arya Reza Behzad
  • Patent number: 7772927
    Abstract: The present invention relates to an active bias Darlington pair amplifier that may operate without a traditional bias resistor. The active bias Darlington pair amplifier includes an output transistor element that is cascaded with and driven from a driver transistor element. Active bias circuitry provides bias to the driver transistor element to regulate bias current in the output transistor element. The bias current in the output transistor element is sensed by the active bias circuitry. The active bias circuitry may include alternating current (AC) circuitry, which may adjust bias under certain radio frequency (RF) drive conditions. The active bias Darlington pair amplifier may include feedback circuitry, which provides feedback from the output transistor element to the driver transistor element. The feedback circuitry may include AC circuitry, which may provide frequency dependent feedback.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: August 10, 2010
    Assignee: RF Micro Devices, Inc.
    Inventors: Jeffrey B. Shealy, Philip M. Garber
  • Patent number: 7746171
    Abstract: Effective control of the common-mode level of amplifiers is obtained through control structures (both closed-loop and open-loop structures) which are directed to various amplifier functions such as the reduction of amplifier loading, accurate sensing of common-mode levels, mitigation of headroom restraints, and proper transistor biasing. This common-mode control is especially useful in multiplying analog-to-digital converters (MDACs) of signal processing systems.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: June 29, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Ahmed Mohamed Abdelatty Ali
  • Patent number: 7737753
    Abstract: Method and device for adjusting or setting an electronic device (1) exhibiting at least one input for an external input signal and at least one output signal output, the value or the state of the output signal being a function of the values or of the state of the input signal. A memory circuit (9) for the value of an adjustment signal is linked to an adjustment input of the electronic device. A circuit (11) increments/decrements said adjustment value stored in said memory circuit. A switching circuit (12) switches said input of the electronic device to a predetermined state and links said output of the electronic device to said memory circuit via said incrementing/decrementing circuit. Said incrementing/decrementing circuit (11) is adapted for adjusting the value of said adjustment signal so that, when said input is switched to said predetermined state, the value or the state of said output signal tend to or attain a predetermined value or a predetermined state.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: June 15, 2010
    Assignees: Universite Joseph Fourier, Centre National de la Recherche Scientifique-CNRS
    Inventor: Daniel Kwami Dzahini
  • Patent number: 7728671
    Abstract: An RF power circuit comprises a power transistor having a gate and drain, an output matching network coupled to the drain and an input matching network coupled to the gate. A closed-loop bias circuit is integrated with the power transistor on the same die and coupled to the gate for biasing the RF power transistor based on a reference voltage applied to the bias circuit.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: June 1, 2010
    Assignee: Infineon Technologies AG
    Inventors: Cynthia Blair, Prasanth Perugupalli
  • Patent number: 7679450
    Abstract: This disclosure relates to monitoring signal overshoot of an amplifier generated signal and automatically adjusting a quiescent current of the amplifier as a function of the monitored signal overshoot.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: March 16, 2010
    Assignee: Infineon Technologies AG
    Inventor: Ban Hok Goh
  • Patent number: 7675364
    Abstract: A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: March 9, 2010
    Assignee: Black Sand Technologies, Inc.
    Inventors: Alan L. Westwick, Susanne A. Paul
  • Patent number: 7663442
    Abstract: According to one embodiment, a system, apparatus, and method for receiving high-speed signals using a receiver with a transconductance amplifier is presented. The apparatus comprises a transconductance amplifier to receive input voltage derived from an input signal, a clocked current comparator to receive output current from the transconductance amplifier, and a storage element to receive a binary value from the clocked current comparator.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: February 16, 2010
    Assignee: Intel Corporation
    Inventors: Zuoguo Wu, Feng Chen
  • Patent number: 7639084
    Abstract: A power amplifier amplifying an input signal is provided, comprising a power amplifier circuit, a bias circuit, and a compensation circuit. The power amplifier circuit has an input impedance responsive to the input signal, and amplifies the input signal to generate an output signal. The bias circuit is coupled to the power amplifier circuit, generates a DC bias signal to the power amplifier so that the power amplifier amplifies the input signal. The compensation circuit is coupled to the power amplifier circuit, provides a compensation impedance responsive to the input signal such that a combination of the input impedance and the compensation impedance is substantially constant regardless of the input signal.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: December 29, 2009
    Assignee: Via Technologies, Inc.
    Inventors: Che-Hung Liao, Jung-Chang Liu, Ying-Che Tseng, Did-Min Shih
  • Patent number: 7634096
    Abstract: An amplifier circuit for capacitive transducers, such as miniature electret or condenser microphones, wherein the amplifier circuit comprises bias control means adapted to improve settling of the amplifier circuit. Another aspect of the invention relates to a miniature condenser microphone and a monolithic integrated circuit comprising an amplifier circuit according to the present invention. The present invention provides amplifier circuits of improved performance by resolving traditionally conflicting requirements of maintaining a large input resistance of the amplifier circuit to optimize its noise performance and provide fast settling of the amplifier circuit.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: December 15, 2009
    Assignee: Epcos AG
    Inventor: Carsten Fallesen
  • Patent number: 7622994
    Abstract: According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier receives a reference voltage, and a feedback voltage of the bias circuit. The bias circuit further includes an output transistor driven by the output of the second amplifier, where the output transistor provides the output of the bias circuit and the feedback voltage. The bias circuit further includes a feedback resistor coupled between an input and an output of the second amplifier. According to this embodiment, the output of the second amplifier forms a non-dominant pole of the bias circuit and the output of the bias circuit forms a dominant pole of the bias circuit, thereby increasing power supply rejection of the bias circuit.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: November 24, 2009
    Assignee: Broadcom Corporation
    Inventor: Sherif Galal
  • Patent number: 7564308
    Abstract: An operational amplifier in accordance with one embodiment of the invention includes folded cascode transistors and a self-biased common-mode feedback circuit coupled to the folded cascode transistors. The operational amplifier can include an output stage coupled to the self-biased common-mode feedback circuit and the folded cascode transistors.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: July 21, 2009
    Assignee: National Semiconductor Corporation
    Inventor: Saurabh Vats
  • Publication number: 20090153248
    Abstract: Techniques are provided for dynamically biasing an amplifier to extend the amplifier's operating range while conserving power. In an embodiment, a detector is provided to measure the amplifier output to determine an operating region of the amplifier. The output of the detector may be input to a bias adjuster, which outputs a dynamic voltage level supplied to at least one bias transistor in the amplifier. Multiple embodiments of the detector and bias adjuster are disclosed.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Bo Sun, Sankaran Aniruddhan
  • Patent number: 7515000
    Abstract: A low-noise amplifier comprises a first amplification circuit that includes a control terminal and a first terminal. An impedance load communicates with the first terminal. A feedback circuit outputs an output current to the first terminal and that generates a bias current, which is output to the control terminal and is based on a difference between the output current and N times a reference current, where N is greater than zero.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: April 7, 2009
    Assignee: Marvell International, Ltd.
    Inventors: Xiaodong Jin, Shuran Wei
  • Patent number: 7486143
    Abstract: An embodiment of a circuit for biasing a transistor such as an amplifier transistor includes reference and bias nodes, and includes buffer, reference, and feedback stages. The reference node receives a reference current, and the bias node, which is for coupling to the transistor, carries a bias signal. The buffer stage buffers the reference node from the bias node. The reference stage generates the bias signal from the reference current, and the bias signal causes the transistor to conduct a bias current that is proportional to the reference current. And the feedback stage is coupled between the reference and bias nodes. As compared to known bias circuits, such a bias circuit may reduce the amplitude and duration of a transient overshoot in the bias current of a field-effect transistor when the DC component of the transistor's drain voltage transitions from one value to another value.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: February 3, 2009
    Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventors: John Shi Sun Wei, Hans Rohdin
  • Patent number: 7459978
    Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: December 2, 2008
    Assignee: Intersil Americas Inc.
    Inventors: Robert David Zucker, Barry Harvey
  • Patent number: 7446612
    Abstract: A wireless communication device output amplifier configured to reduce or eliminate out of band oscillations from voltage standing waves generated by antenna impedance mismatch reflection. The amplifier is configured with an input, output, and biasing node. The biasing node is configured to receive a biasing signal from a biasing amplifier. The biasing amplifier draws current from the biasing node while providing the biasing voltage to the output amplifier. To reduce or eliminate out of band voltage standing waves from antenna reflections, a frequency dependant network is provided as a feedback loop to selectively provide feedback to the output amplifier to reduce or eliminate unwanted out of band oscillations, such as voltage standing waves. The frequency dependant network may comprise one or more resistors, inductors, and capacitors which are of small size and may be integrated.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: November 4, 2008
    Assignee: Skyworks Solutions, Inc.
    Inventors: Robert Michael Fisher, Michael L. Hageman
  • Patent number: 7425871
    Abstract: The systems and methods described herein provide for composite transistor circuit having a bipolar transistor and a compensation unit. The compensation unit can be configured to stabilize the DC biasing point of the bipolar transistor. The compensation unit can compensate for the self-heating effect in the bipolar transistor and/or improve the linear performance of the bipolar transistor. The compensation unit can include a nonlinear resistor in series with a switch and can be configured to increase the base current into the bipolar transistor as the output voltage of the circuit increases.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: September 16, 2008
    Assignee: Regents of the University of California
    Inventors: Huai Gao, Haitao Zhang, Huinan Guan, Guann-Pyng Li
  • Patent number: 7405623
    Abstract: A sensing circuit capable of detecting very low current pulses of the order of 10's and 100's of micro amps. The sensing circuit comprises a common gate amplification stage capable of amplifying a sensed current, a comparison stage having as an input the amplified sensed current and a feedback stage capable of returning an output of the comparison stage to the common gate amplification stage.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: July 29, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Nishanth Kulasekeram