Including Particular Power Supply Circuitry Patents (Class 330/297)
  • Patent number: 12117534
    Abstract: A sensor location method includes placing an environmental sensor within an electromagnetic-absorbing material. The sensor is configured to sense a condition of the material and output sensor data representing the condition. The method includes providing a modulator configured to encode the sensor data onto a carrier at a carrier frequency. The method includes providing an amplifier, including a switch and a load network, in communication with a multi-turn coil. The switch can transition between on and off states. The network is coupled to the switch and the first multi-turn coil and includes a terminal that receives a voltage. The network is tunable to form a resonant circuit at the carrier frequency. The method includes generating a beacon signal whose amplitude is adjustable. The method includes receiving the beacon by a receiver outside of the material, measuring the received beacon amplitude, and determining the sensor location based upon the measured amplitude.
    Type: Grant
    Filed: March 28, 2020
    Date of Patent: October 15, 2024
    Assignee: GroGuru, Inc.
    Inventor: Jeffrey E. Campbell
  • Patent number: 12113492
    Abstract: This application provides a power amplification apparatus, a beamforming system, a transmitter, and a base station. The apparatus includes a power amplifier that amplifies a first signal, a power supply, and a power supply modulator that controls, based on an envelope signal corresponding to the first signal, an operating voltage provided by the power supply to the power amplifier. The apparatus is further configured to amplify a second signal. The first signal is generated based on the part of a target amplified signal whose amplitude falls within a preset amplitude range. The second signal is generated based on the part of the target amplified signal whose amplitude falls beyond the preset amplitude range.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: October 8, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qianfu Cheng, Guangjian Wang
  • Patent number: 12107560
    Abstract: Multiple example valve amplifiers are provided. A first example valve amplifier is provided which comprises (i) a valve power amplifier switchable between a high-power mode and a low-power mode and (ii) a loudspeaker simulator circuit, the valve amplifier being configured such that the valve power amplifier drives the loudspeaker simulator circuit in the low-power mode. A second example valve amplifier is provided which comprises a switched-mode power supply, SMPS, system), the SMPS system comprising (i) an SMPS and (ii) circuitry configured to enable an output impedance of the SMPS to be switched between first and second output impedances, the first output impedance being lower than the second output impedance.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: October 1, 2024
    Assignee: Blackstar Amplification Ltd.
    Inventor: Paul James Stevens
  • Patent number: 12107494
    Abstract: A DC-DC converter for converting an input voltage at an input node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; first and second flying capacitor nodes for connection of a flying capacitor therebetween; a first switching network for selectively connecting the first flying capacitor node to each of the input node and the first inductor node; a second switching network for selectively connecting the second flying capacitor node to each of the input node and a reference voltage node; and reservoir circuitry, comprising: first and second reservoir capacitor nodes for connection of a reservoir capacitor therebetween; a third switching network for selectively connecting the first reservoir capacitor node to each of the first and second flying capacitor nodes; a fourth switching network for selectively connecting the second reservoir capacitor node to each of the second flying capacitor node and the reference voltage node.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: October 1, 2024
    Assignee: Cirrus Logic Inc.
    Inventor: John P. Lesso
  • Patent number: 12101063
    Abstract: A distributed power management apparatus is provided. The distributed power management apparatus includes an envelope tracking (ET) integrated circuit (ETIC) and a distributed ETIC separated from the ETIC. The ETIC is configured to generate a number of ET voltages for a number of power amplifier circuits and the distributed ETIC is configured to generate a distributed ET voltage(s) for a distributed power amplifier circuit(s). In a non-limiting example, the number of power amplifier circuits and the distributed power amplifier circuit(s) can be disposed on opposite sides (e.g., top and bottom) of a wireless device. As such, in embodiments disclosed herein, the ETIC is provided closer to the power amplifier circuits and the distributed ETIC is provided closer to the distributed power amplifier circuit(s). By providing the ETIC and the distributed ETIC closer to the respective power amplifier circuits, it is possible to reduce trace inductance and unwanted signal distortion.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: September 24, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 12095422
    Abstract: Power amplifiers with supply capacitor switching are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, a supply capacitor, and a silicon-on-insulator (SOI) switch in series with the supply capacitor between the supply voltage and the a reference voltage, such as ground. The power management circuit is operable in multiple supply control modes including, for example, an average power tracking (APT) mode and an envelope tracking (ET) mode. Additionally, the SOI switch is controlled based on the supply control mode of the power management circuit.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: September 17, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Netsanet Gebeyehu, Weiya Gong, Shao-Min Hsu
  • Patent number: 12095430
    Abstract: Apparatus and methods for power amplifier power management are disclosed. In certain embodiments, a mobile device includes a transceiver that generates a radio frequency signal, a front-end system including a first power amplifier module that amplifies the radio frequency signal, and a power management system including an envelope tracking power management unit that provides an envelope tracking supply voltage to the first power amplifier module, and a first average power tracking power management unit that provides an average power tracking supply voltage to the first power amplifier module. The first power amplifier module is configured to selectively switch between the envelope tracking supply voltage and the average power tracking supply voltage.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: September 17, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Joel Richard King, Shayan Farahvash
  • Patent number: 12068719
    Abstract: A power management circuit operable with group delay is provided. The power management circuit includes a transceiver circuit configured to generate a digital target voltage and digitally delay the digital target voltage to generate multiple delayed digital target voltages. Accordingly, the transceiver circuit can generate a windowed digital target voltage in multiple delay tolerance windows based on the delayed digital target voltages. Since the windowed digital target voltage can tolerate a certain amount of group delay in each of the group delay tolerance windows, an envelope tracking (ET) voltage generated based on an analog version of the windowed digital target voltage can therefore tolerate the group delay in each of the group delay tolerance windows as well. As a result, it is possible to avoid distortion in the ET voltage to help improve performance of the power management circuit.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: August 20, 2024
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 12062845
    Abstract: A synthesized non-Foster time-variant filter is disclosed for matching impedance. The synthesized non-Foster time-variant filter may include a negative-inductor circuit and a negative-capacitor circuit. The negative-inductor circuit and the negative-capacitor circuit may be configured to be dynamically controlled based on a known transmit signal. The negative-inductor circuit may be configured to synthesize a negative inductance of a range of inductances. The negative-capacitor circuit may include a plurality of capacitors coupled together in parallel. Each capacitor may include a first capacitor end and a second capacitor end. The negative-capacitor circuit may be configured to synthesize a negative capacitance of a range of capacitances. The negative-capacitor circuit may include a plurality of inductors coupled together in series. Each inductor may include a first inductor end and a second inductor end.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: August 13, 2024
    Assignee: Rockwell Collins, Inc.
    Inventor: David W. Cripe
  • Patent number: 12063012
    Abstract: An amplifier device includes a back-EMF voltage shorting circuit between a power supply terminal located on a primary side of an output transformer and a constant potential terminal grounded. The back-EMF voltage shorting circuit is provided with a capacitor and a diode in parallel. When a back-EMF voltage input into a circuit of an amplifier device is a positive potential, a back-EMF current flows from the power supply terminal toward the constant potential terminal, and the back-EMF current is short-circuited by the capacitor at this time. On the other hand, when the input back-EMF voltage is a negative potential, the back-EMF current flows from the constant potential terminal toward the power supply terminal, and is short-circuited by the diode at this time.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: August 13, 2024
    Assignee: MORIYAMA MEIBOKU CO, LTD.
    Inventor: Kazuaki Machida
  • Patent number: 12051999
    Abstract: Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: July 30, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Florinel G. Balteanu, Shayan Farahvash
  • Patent number: 12051997
    Abstract: A power management circuit operable with group delay is provided. In embodiments disclosed herein, the power management circuit includes a voltage processing circuit configured to receive a first time-variant target voltage having a first group delay relative to a time-variant target voltage and a second time-variant target voltage having a second group delay relative to the time-variant target voltage. Accordingly, the voltage processing circuit generates a windowed time-variant target voltage higher than or equal to a highest one of the first time-variant target voltage and the second time-variant target voltage in a group delay tolerance window(s) defined by the first group delay and the second group delay. As a result, the power management circuit can generate a time-variant voltage based on the windowed time-variant target voltage to help a power amplifier to avoid amplitude clipping when amplifying an analog signal.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: July 30, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Marcus Granger-Jones
  • Patent number: 11967395
    Abstract: A buffer circuit and a multiplexer using the buffer are provided. The buffer may selectively operate at a first mode or a second mode. The buffer includes a first signal input terminal, a first signal output terminal, and a path circuit coupled between the first signal input terminal and the first signal output terminal. The path circuit has a voltage source terminal. In response to the buffer operating at the first mode, a first signal transmission path is formed in the path circuit and between the first signal input terminal and the first signal output terminal. The first signal transmission path is disconnected from the voltage source terminal.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: April 23, 2024
    Assignee: MEDIATEK INC.
    Inventors: Shuo-Yuan Hsiao, Chao-Chun Sung, Chieh-En Yu
  • Patent number: 11949381
    Abstract: A method of operating a power amplifier supplying power to an antenna, supplying switched power to the power amplifier comprises in a first mode of operation via a driver circuit and one or more switches to switch the supply of power to the power amplifier on and off periodically; and calibrating the power amplifier in a second mode of operation. The calibrating comprises supplying voltage to the power amplifier via the same driver circuit and one or more switches for a calibration pulse duration longer than the on/off period. A power supply and an RF front end comprising the power supply are also disclosed.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: April 2, 2024
    Assignee: ICEYE OY
    Inventors: Jakub Korczyc, Sergei Ossif
  • Patent number: 11949331
    Abstract: The present document describes a power converter configured to convert electrical power at an input voltage at an input of the power converter to electrical power at an output voltage at an output of the power converter. The power converter comprises a first upper capacitor and a first lower capacitor, which are coupled with one another via a first mid node; a second upper capacitor and a second lower capacitor, which are coupled with one another via a second mid node; an inductor; and a set of power switches. In addition, the power converter comprises a control unit which is configured to control the set of power switches such that during an operation cycle the power converter is operated in a first main state and in a second main state in a mutually exclusive manner.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: April 2, 2024
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Mark Mercer, Kevin Dowdy, Holger Petersen
  • Patent number: 11949388
    Abstract: A power amplifier includes a power switching circuit, a driver circuit, and an amplifier circuit. The power switching circuit is configured to receive a first voltage and a second voltage, and provide the first voltage or the second voltage according to an operation mode of the power amplifier. The driver circuit is coupled to the power switching circuit. The driver circuit is configured to operate according to the first voltage or the second voltage and generate a driving signal according to an input signal. The amplifier circuit is coupled to the power switching circuit and the driver circuit. The amplifier circuit is configured to operate according to the first voltage or the second voltage and generate an output signal according to the driving signal.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: April 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Gen-Sheng Ran, Po-Chih Wang, Ka-Un Chan
  • Patent number: 11949383
    Abstract: Described are concepts, circuits, systems and techniques directed toward N-phase control techniques useful in the design and control of supply generators configured for use in a wide variety of power management applications including, but not limited to mobile applications.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: April 2, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: David J. Perreault, James Garrett, Sri Harsh Pakala, Brendan Metzner, Ivan Duzevik, John R. Hoversten, Yevgeniy A. Tkachenko
  • Patent number: 11942910
    Abstract: Apparatus and methods for adaptive power amplifier biasing are provided. In certain embodiments, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, and a power amplifier bias control circuit that generates a bias signal of the power amplifier based on a bandwidth signal indicating a bandwidth of the RF signal. The power amplifier bias control circuit has a bandwidth that adapts to the bandwidth of the RF signal as indicated by the bandwidth signal.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: March 26, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Sabah Khesbak, Florinel G. Balteanu, Roman Zbigniew Arkiszewski, Jeffrey Gordon Strahler
  • Patent number: 11940827
    Abstract: An electronic control system provides selectable path operation, such as linear and pulse-width modulated (PWM) operation and provides path transition management to improve operation. The system supplies a current or a voltage to a load in response to an input signal or value and includes an output driver, and multiple selectable control paths. The system includes a control circuit that selects between the first control path and the second control path in response to a path selection indication to drive the output driver. The system may include an evaluator that determines the path selection indication in conformity with an amplitude and a slew rate of the input. One or all of the control paths may have a response time to changes in the input signal or value, and the control circuit may delay switching from the second control path to the first control path to compensate for the response time.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: March 26, 2024
    Inventors: Stewart G. Kenly, Vamsikrishna Parupalli, Nishant Jain, Eric B. Smith
  • Patent number: 11942866
    Abstract: An error amplifier includes an output pin coupled to a pulse width modulation (PWM) comparator of a buck-boost converter. A first transconductance amplifier adjusts an output current at the output pin and operates in a constant voltage mode. The first transconductance amplifier includes a first positive input to receive a first voltage reference and a first negative input coupled to a tap point of a voltage divider coupled between a voltage bus and a ground of the buck-boost converter. A second transconductance amplifier also adjusts the output current at the output pin and operates in a constant current mode. The second transconductance amplifier includes a second positive input to receive a second voltage reference and a second negative input coupled to a current sense amplifier, the current sense amplifier being coupled to a sense resistor positioned inline along the voltage bus.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: March 26, 2024
    Assignee: Cypress Semiconductor Corporation
    Inventors: Rajesh Karri, Arun Khamesra
  • Patent number: 11936416
    Abstract: Cascode power amplifier bias circuits suitable for operating across multiple power supply domains are provided. In certain embodiments, a power amplifier system includes a cascode power amplifier and a multi-domain bias circuit that generates at least a first cascode bias voltage for the cascode power amplifier. The multi-domain bias circuit includes a coarse regulator that generates a regulated voltage based on a power supply voltage that is operable with multiple voltage levels associated with different power supply domains, a bandgap reference circuit that is powered by the regulated voltage and outputs a bandgap reference voltage, a bias voltage generator that generates multiple selectable bias voltages based on the bandgap reference voltage, and a bias voltage selector that chooses the first cascode bias voltage from amongst the selectable bias voltages.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: March 19, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Bang Li Liang, Thomas Obkircher, Guillaume Alexandre Blin
  • Patent number: 11929678
    Abstract: A power supply unit using intellectual pre-regulator which includes an input port connected to a power source realized as battery or generator (hereinafter, it is called as ‘battery’), an output port connected to an electronic device, a voltage dropping part connected between said input port and said output port to drop the input voltage to match it to the voltage required by said electronic device, and a detection-control part to detect the voltage required by said electronic device connected to said output port and to transfer it to said voltage dropping part.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: March 12, 2024
    Assignee: SJ SOLUTION CO., LTD.
    Inventor: Yeong Ryong Yun
  • Patent number: 11909358
    Abstract: Described is a system for modulating power to one or more radio frequency (RF) amplifiers to suppress undesired output signal components, improve linearity and reduce noise. The described systems and techniques enable shaping of spectral components introduced via an amplifier bias voltage owing to transitions among bias discrete states. The systems and techniques facilitate operation of multilevel, RF amplifiers under a wider range of operating conditions. In embodiments, the system includes modulators coupled to a supply terminal port of each of the one or more amplifiers to modulate the voltage levels supplied to the one or more amplifiers. The outputs of the modulators may be combined to provide a combined signal coupled to the amplifiers. A delay circuit delays switching of at least one of the power modulators relative to other modulator, by a variable time delay. This results in suppression of undesired output signal components of the amplifier output.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: February 20, 2024
    Assignee: Murata Manufacturing Co., LTD.
    Inventors: David J. Perreault, John R. Hoversten, Yevgeniy A. Tkachenko
  • Patent number: 11909357
    Abstract: An amplifier includes an amplification circuit, a power supplying circuit and an input circuit. A first end of the amplification circuit is connected with a first end of the input circuit; a second end of the amplification circuit is connected with the power supplying circuit; and a third end of the amplification circuit is connected with a second end of the input circuit. The power supplying circuit is at least configured to supply power to the amplification circuit so that the amplification circuit operates in an amplification region. The input circuit is at least configured to receive an input signal; the amplification circuit is configured to obtain an amplification gain in case of operating in the amplification region, and amplify the input signal by using the obtained amplification gain.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: February 20, 2024
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Zhenfei Peng, Qiang Su
  • Patent number: 11901814
    Abstract: An adaptive DC-DC boost converter arrangement and an electronic circuit including such an arrangement are provided. The arrangement includes a circuit board with a plurality of electronic components mounted thereon, implementing an adaptive DC-DC boost converter circuit and a boost decoupling capacitor. The adaptive DC-DC boost converter circuit comprises a DC-DC boost converter having a converter set value input, a boost supply input, and a boost voltage output, and an adaptive DC-DC boost control unit having a control input and a control output. An acoustical noise suppression filter is present having a filter input connected to the control output of the adaptive DC-DC boost control unit and a filter output connected to the converter set value input of the DC-DC boost converter.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: February 13, 2024
    Inventors: Lutsen Dooper, Han Martijn Schuurmans, Maarten Wilhelmus Henricus Marie Dommelen Van, Bernardus Henricus Krabbenborg, Ivo Johannes Petrus Moolenaar
  • Patent number: 11881823
    Abstract: A power amplifier circuit includes a power amplification circuit and a diode assembly. The diode assembly is connected in series with a transistor amplification circuit of the power amplification circuit, and the transistor amplification circuit is configured to, when load of power amplifier is mismatched, turn the diode assembly on, so as to divide current voltage to at least two electrodes of the transistor amplification circuit.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: January 23, 2024
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Yongle Li, Limin Yu
  • Patent number: 11870396
    Abstract: Techniques are described for using valley detection for supply voltage modulation in power amplifier circuits. Embodiments operate in context of a power amplifier circuit configured to be driven by a supply voltage generated by a supply modulator and to receive an amplitude-modulated (AM) signal at its input. The output of the power amplifier circuit can be fed to a valley detector that can detect a valley level corresponding to the bottom of the envelope of the AM signal. The detected valley level can be fed back to the supply modulator and compared to a constant reference. In response to the comparison, the supply modulator can vary the supply voltage to the power amplifier circuit in a manner that effectively tracking the envelope of the power amplifier circuit's output signal, thereby effectively seeking a flat valley for the output signal's envelope.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: January 9, 2024
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Ahmed Emira, Siavash Yazdi, Kaveh Moazzami
  • Patent number: 11824524
    Abstract: A semiconductor device includes a first transistor that flows a load current to an external load; a current generation circuit that outputs a current corresponding to a power consumption generated in an overheat detection target when the load current flows the overheat detection target; a resistor-capacitor-network comprising a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance of the overheat detection target, and having one end coupled to the current generation circuit; an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor-network; and a voltage source that sets a voltage of the connection point of the current generation circuit and the resistor-capacitor-network to a predetermined voltage.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: November 21, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroki Nagatomi, Makoto Tanaka
  • Patent number: 11824500
    Abstract: An apparatus is disclosed for waveform-tailored average power tracking. In an example aspect, the apparatus includes an amplifier, a power converter, and an average power tracking module. The amplifier is configured to amplify radio-frequency signals using a supply voltage. The radio-frequency signals have different waveforms. The power converter is coupled to the amplifier and configured to provide the supply voltage. The average power tracking module is coupled to the power converter and configured to adjust the supply voltage according to the different waveforms to cause the supply voltage to vary across at least two waveforms of the different waveforms for related average output powers.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 21, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Xiangdong Zhang, Ryan Scott Castro Spring, Marco Cassia, Yan Kit Gary Hau, Kanan Gandhi, Robert Wilson
  • Patent number: 11804734
    Abstract: Methods and devices addressing power tracking of transmission systems using antenna arrays are disclosed. The disclosed teachings may be implemented on a channel element to channel element basis, are adaptive and can be implemented on short time durations such as time slots. Power efficiency can be improved when applying the described methods to the design of systems with antenna arrays.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: October 31, 2023
    Assignee: pSemi Corporation
    Inventors: Donald Felt Kimball, Mark James O'Leary
  • Patent number: 11791774
    Abstract: A supply voltage conditioning circuit comprises a differential amplifier, a comparator, a sample and hold (S/H) circuit, and a delay circuit. The differential amplifier receives an input supply voltage and a reference voltage, and outputs a difference signal. The comparator receives the difference signal and a value representative of a noise margin, and outputs a control signal indicative of whether the difference signal is greater than the value representative of the noise margin. The S/H circuit samples the input supply voltage in response to the control signal indicating the difference signal is greater than the noise margin, and outputs a substantially noise free supply voltage. This allows the output supply voltage to track underlying changes in the input supply voltage but filter out noise in the input supply voltage. The delay circuit receives and delays the output supply voltage to generate the reference voltage.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: October 17, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Sahiti Priya C
  • Patent number: 11784577
    Abstract: A system includes a current-mode switcher configured to provide a direct current (DC) voltage for a noise sensitive load, and a linear amplifier connected to an output of the current-mode switcher, the linear amplifier configured to draw a reduced supply voltage through at least one power conversion device that is coupled between a power source and the linear amplifier.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: October 10, 2023
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Yushan Li, Heping Dai, Dianbo Fu
  • Patent number: 11777456
    Abstract: An amplifying apparatus is provided, which includes a power-source main line, a plurality of amplifying control devices which include an amplifier, a power-source branch line, an over current protector. The amplifier amplifies a high-frequency signal. The power-source branch line is branched from the power-source main line. The over current protector disposed for the power-source branch line is connected to the amplifier and configured to disconnect the power-source branch line based on drive current flowing through the amplifier from the power-source branch line. The power-source main line is common to the plurality of amplifying control devices.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: October 3, 2023
    Assignee: FURUNO ELECTRIC CO., LTD.
    Inventors: Takehiro Kishida, Keisuke Tanaka, Daisuke Fujioka, Masayuki Shiromoto
  • Patent number: 11757412
    Abstract: A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit includes a state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein at least one operational mode comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes includes at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is controlled by a digital selection signal received from a digital communication interface associated therewith.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: Ilan Sutskover, Eran Segev, Stephan Henzler, Alexander Belitzer
  • Patent number: 11757410
    Abstract: In a discrete supply modulation system, a circuit includes a multi-stage pulse shaping network (PSN) having a first PSN stage having an input configured to receive variable bias supply signals from a power management circuit (PMC) and having an output coupled to one or more second PSN stages with each of the one or more second PSN stages having an output configured to be coupled to a supply (or bias) terminal of a respective one of one or more radio frequency amplifiers. Such an arrangement is suitable for use with transmit systems in mobile handsets operating in accordance with 5th generation (5G) communications and other connectivity protocols such as 802.11 a/b/g/n/ac/ax/ad/ay and is suitable for use with multiple simultaneous transmit systems including multiple-input, multiple-output (MIMO), uplink carrier aggregation (ULCA) and beamforming.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: September 12, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: John R. Hoversten, Yevgeniy A. Tkachenko, Sri Harsh Pakala, James Garrett
  • Patent number: 11728346
    Abstract: A device including a III-N material is described. In an example, the device has a terminal structure with a central body and a first plurality of fins, and a second plurality of fins, opposite the first plurality of fins. A polarization charge inducing layer including a III-N material in the terminal structure. A gate electrode is disposed above and on a portion of the polarization charge inducing layer. A source structure is on the polarization charge inducing layer and on sidewalls of the first plurality of fins. A drain structure is on the polarization charge inducing layer and on sidewalls of the second plurality of fins. The device further includes a source structure and a drain structure on opposite sides of the gate electrode and a source contact on the source structure and a drain contact on the drain structure.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: August 15, 2023
    Assignee: Intel Corporation
    Inventors: Marko Radosavljevic, Han Wui Then, Sansaptak Dasgupta
  • Patent number: 11728774
    Abstract: An average power tracking (APT) power management integrated circuit (PMIC) is provided. The APT PMIC is configured to generate an APT voltage to a power amplifier for amplifying a high modulation bandwidth (e.g., ?200 MHz) radio frequency (RF) signal. The APT PMIC includes a voltage amplifier configured to generate an initial APT voltage and an offset capacitor configured to raise the initial APT voltage by a modulated offset voltage. The APT PMIC can be configured to modulate the initial APT voltage and the modulated offset voltage concurrently based on a time-variant APT target voltage. As a result, the APT PMIC can adapt the APT voltage very quickly between different voltage levels, thus making it possible to amplify a high modulation bandwidth radio frequency (RF) signal for transmission in a fifth-generation (5G) communication system.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: August 15, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11716057
    Abstract: Disclosed is envelope tracking circuitry having an envelope tracking integrated circuit (ETIC) coupled to a power supply to provide an envelope tracked power signal to a power amplifier (PA) with a filter equalizer configured to inject an error-correcting signal into the ETIC in response to equalizer settings. Further included is PA resistance estimator circuitry having a first peak detector circuit configured to capture within a window first peaks associated with a sense current generated by the ETIC, a second peak detector circuit configured to capture within the window second peaks associated with a scaled supply voltage corresponding to the envelope tracked power signal, comparator circuitry configured to receive the first peaks and receive the second peaks and generate an estimation of PA resistance, and an equalizer settings correction circuit configured to receive the estimation of PA resistance and update the equalizer settings in response to the estimation of PA resistance.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: August 1, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11683011
    Abstract: A switching system is connected to the power amplifier of an RF system. The switching system can switch the DC supply voltage to the power amplifier while handling the high DC current and the nanosecond switching speed requirements that are mandatory for most RF systems. The embodiments can rapidly control DC voltages but not interfere with the optimized operation of the RF transistor. The embodiments provide a desired sharp turn-on leading edge for an RF pulse while eliminating the extremely long and undesirable ramp down that typically occurs beyond the desired RF pulse period.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: June 20, 2023
    Assignee: Weather Detection Systems, Inc.
    Inventor: Rick Smeltzer
  • Patent number: 11683013
    Abstract: Apparatus and methods for power amplifier bias modulation for low bandwidth envelope tracking are provided herein. In certain embodiments, a power amplifier system for a mobile device includes a power amplifier that amplifies an RF signal and a low bandwidth envelope tracker that generates a power amplifier supply voltage for the power amplifier based on an envelope of the RF signal. The envelope tracking system further includes a bias modulation circuit that modulates a bias signal of the power amplifier based on a voltage level of the power amplifier supply voltage.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: June 20, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Philip John Lehtola, Florinel G. Balteanu
  • Patent number: 11677357
    Abstract: Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: June 13, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Serge Francois Drogi, Florinel G. Balteanu, Shayan Farahvash
  • Patent number: 11658615
    Abstract: Multi-level envelope trackers with an analog interface are provided herein. In certain embodiments, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system includes a multi-level supply (MLS) DC-to-DC converter that outputs multiple regulated voltages, and an MLS modulator that controls selection of the regulated voltages over time based on an analog envelope signal corresponding to an envelope of the RF signal amplified by the power amplifier.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 23, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Florinel G. Balteanu, Serge Francois Drogi, Shayan Farahvash, David Richard Pehlke
  • Patent number: 11658622
    Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: May 23, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Yusuke Tanaka, Satoshi Arayashiki
  • Patent number: 11658614
    Abstract: A supply voltage circuit for reducing in-rush battery current in an envelope tracking (ET) integrated circuit (ETIC) is provided. The ETIC includes an ET voltage circuit configured to generate a time-variant ET voltage, which includes an offset voltage, in multiple time intervals based on a supply voltage. In some cases, the offset voltage and the supply voltage may both need to be increased or decreased as the time-variant ET voltage increases or decreases. As the offset voltage and the supply voltage increase or decrease, an excessive in-rush battery current may result in a reduced battery life. In this regard, a supply voltage circuit is configured to help the ETIC to adapt the supply voltage on a per-symbol basis. As a result, it is possible to reduce the in-rush battery current in the ETIC while still allowing the time-variant ET voltage to change in a timely manner.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: May 23, 2023
    Assignee: Qorvo US, Inc.
    Inventor: Nadim Khlat
  • Patent number: 11652447
    Abstract: Methods and apparatus for implementing a power efficient amplifier device through the use of a main (primary) and auxiliary (secondary) power amplifier are described. The primary and secondary amplifiers operate as current sources providing current to the load. Capacitance coupling is used to couple the primary and secondary amplifier outputs. In some embodiments the combination of primary and secondary amplifiers achieve high average efficiency over the operating range of the device in which the primary and secondary amplifiers are used in combination as an amplifier device. The amplifier device is well suited for implementation using CMOS technology, e.g., N-MOSFETs, and can be implemented in an integrated circuit space efficient manner that is well suited for supporting RF transmissions in the GHz frequency range, e.g., 30 GHz frequency range. The primary amplifier in some embodiments is a CLASS-AB or B amplifier and the secondary amplifier is a CLASS-C amplifier.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: May 16, 2023
    Assignee: Mixcomm, Inc.
    Inventors: James F. Buckwalter, Kang Ning
  • Patent number: 11652408
    Abstract: A DC/DC power converter comprises three or more capacitors connected in series between an output terminal and a ground terminal, the three or more capacitors being connected in series by means of two or more capacitor connection points, and an input voltage switching unit configured to connect an input terminal to one of a group of switching connection points, the group of switching connection points comprising the two or more capacitor connection points and the output terminal. With such a DC/DC power converter it is possible, for example, to convert a variable DC voltage at the input into a variable DC voltage at the output, wherein the voltage range of the output voltage is smaller than the voltage range of the input voltage.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: May 16, 2023
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Petar Grbovic, Roland Huempfner, Jose Antonio Cobos, Pedro Alou, Jesus Angel Oliver, Miroslav Vasic
  • Patent number: 11611317
    Abstract: The present invention provides a circuitry applied to multiple power domains, wherein the circuitry includes a first circuit block and second circuit block, the first circuit block is powered by a first supply voltage of a first power domain, and the second circuit block is powered by a second supply voltage of a second power domain. The first circuit block includes a first amplifier and a switching circuit. The first amplifier is configured to receive an input signal to generate a processed input signal. When the second circuit block is powered by the second supply voltage, the switching circuit is configured to forward the processed input signal to the second circuit block; and when the second circuit block is not powered by the second supply voltage, the switching circuit disconnects a path between the first amplifier and the second circuit block.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: March 21, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wei-Cheng Tang, Li-Lung Kao, Chia-Ling Chang, Sheng-Tsung Wang, Sheng-Wei Lin
  • Patent number: 11606748
    Abstract: Disclosed is a system and method for providing stable and reliable power to components on the top of a cell tower. The system performs a device discovery process to determine with Power Supply Units are connected to which Remote Radio Heads on the tower. It also provides several ways of characterizing the power cables and input capacitance to the Remote Radio Heads to provide optimal power to the Remote Radio Heads, including situations in which the power demand for the Remote Radio Heads increases, while obviating the need to replace the power cables with those of greater current capacity. Further, the system provides for stable power even in the presence of sensor instabilities and data dropouts.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: March 14, 2023
    Assignee: John Mezzalingua Associates, LLC
    Inventor: Ronak Bhadresh Gandhi
  • Patent number: 11594955
    Abstract: A current-averaging audio amplifier for vehicles. The current averaging audio amplifier is connectable to a DC power source and a load, and may generally comprise a power input to receive a DC electrical power from the DC power source. The system may further include a voltage converter, such as a boost converter, connected to the power input, such that the voltage converter can receive electrical power from the DC power source. The system also includes a rechargeable battery coupled to the voltage converter, such that the voltage converter charges the rechargeable battery. An audio amplifier can be powered by the rechargeable battery and connectable to supply power to the load, wherein the average power supplied by the rechargeable battery to the audio amplifier in a finite time interval differs from the average power supplied by the DC power source to the voltage converter.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: February 28, 2023
    Assignee: D'Amore Engineering, LLC
    Inventors: Anthony T. D'Amore, Juan Rodriguez
  • Patent number: 11588449
    Abstract: An envelope tracking (ET) power amplifier apparatus is provided. The ET power amplifier apparatus includes an amplifier circuit configured to amplify a radio frequency (RF) signal based on an ET voltage and a tracker circuit configured to generate the ET voltage based on an ET target voltage. The ET power amplifier apparatus also includes a control circuit. The control circuit is configured to dynamically determine a voltage standing wave ratio (VSWR) change at a voltage output relative to a nominal VSWR and cause an adjustment to the ET voltage. By dynamically determining the VSWR change and adjusting the ET voltage in response to the VSWR change, the amplifier circuit can operate under a required EVM threshold across all phase angles of the RF signal.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: February 21, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Nadim Khlat, Arthur Nguyen