Variable Impedance In Feedback Path Varied By Separate Control Path Patents (Class 330/86)
  • Patent number: 7180366
    Abstract: Data signal amplification and processing circuitry with multiple signal gains for increasing dynamic signal range. An incoming data signal is processed in accordance with multiple signal gains. The resultant signals have multiple signal values which are compared to predetermined lower and higher thresholds.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: February 20, 2007
    Assignee: Varian Medical Systems Technologies, Inc.
    Inventors: Pieter Gerhard Roos, Edward Seppi, Richard Colbeth, Gary Virshup, Ivan Petrov Mollov
  • Patent number: 7180374
    Abstract: Disclosed herein is a PhotoDiode Integrated Circuit (PDIC) having multiple gain states. The PDIC includes a current-voltage conversion unit, an input amplification stage circuit, a reference resistance unit, a feedback resistance unit, and a switching unit. The current-voltage conversion unit converts a current signal into a voltage signal. The input amplification stage circuit is connected to the current-voltage conversion unit to receive and amplify the voltage signal. The reference resistance unit is connected to the second input terminal of the input amplification stage circuit. The output amplification stage circuit is connected to the output terminal of the input amplification stage circuit. The feedback resistance unit is connected in parallel between the second input terminal and the output terminal of the output amplification stage circuit, and is configured to have a plurality of resistance elements. The switching unit selectively connects the plurality of resistance elements.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: February 20, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sang Suk Kim, Kyoung Soo Kwon, Jung Chul Gong, Hyeon Seok Hwang
  • Patent number: 7173487
    Abstract: A power amplification circuit, and a communication device using the same, which are capable of suppressing gain decreases of a power amplifier due to increases in input signal power in a state near the saturation operation, capable of reducing its size, and low in distortion and high in efficiency. The power amplification circuit includes a power amplifier and a negative feedback circuit connected between a signal input terminal and a signal output terminal of the power amplifier. Impedance of the negative feedback circuit depends on a signal voltage occurring across the negative feedback circuit. By adjusting the characteristic that the negative feedback quantity of the negative feedback circuit to the power amplifier is variable depending on input signal power, gain fluctuations of the power amplifier due to increases or decreases of input signal power or output signal power around a specified output signal power are suppressed.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: February 6, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Keiichi Sakuno
  • Patent number: 7164313
    Abstract: Circuits, methods, and systems are provided for opening a primary feedback loop in a transmitter. An auxiliary feedback loop can be closed when the primary feedback loop is opened, and a controller can match a gain of the primary feedback loop to another gain in the transmitter.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: January 16, 2007
    Assignee: Aspendos Communications
    Inventors: Peter Capofreddi, Derek K. Shaeffer, Sriraman Dakshinamurthy, Korhan Titizer
  • Patent number: 7135376
    Abstract: A resistance dividing circuit including silicide layers respectively formed only on branch portions of a linear polysilicon resistance wiring having the branch portions. Contact plugs are connected to the resistance wiring via the silicide layers, and fetching electrodes are respectively connected to the contact plugs.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: November 14, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Seiichiro Sasaki
  • Patent number: 7132893
    Abstract: A selectable gain amplifier in a standard integrated circuit package configuration comprises an amplifier having an analog input, an output and a control input for selecting one of two or three possible gains for the operational amplifier. A plurality of selectable gain amplifiers may be in a standard integrated circuit package configuration, each having a gain control input for selection of the two or three possible gains. The gain control input replaces an inverting input of a standard operational amplifier and the analog input is the a non-inverting input of the operational amplifier or visa-versa. All other characteristics of the selectable gain amplifier may be the same or similar to a standard operational amplifier. The selectable gain amplifier(s) may be packaged in industry standard integrated circuit packages having standard pin-outs so that they may be compatible as replacement analog amplifiers for existing technology operational amplifier integrated circuit packages.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: November 7, 2006
    Assignee: Microchip Technology Incorporated
    Inventors: Arthur Bruce Eck, Ezana H. Aberra
  • Patent number: 7123098
    Abstract: A method and apparatus to provide automatic gain control and offset correction in a transimpedance amplifier.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: October 17, 2006
    Assignee: Intel Corporation
    Inventors: Brandon Bongkee Bae, Martin Sandor
  • Patent number: 7068107
    Abstract: The variable gain amplifier of the present invention includes at least an operation amplifier. By choosing one of output stages, a feedback resistor is selected and the gain of the variable gain amplifier is decided according to the resistance of the selected feedback resistor, as desired. By adjusting the gain of the variable gain amplifier, the received signals can be amplified or attenuated in accordance with design requirement. The variable gain amplifier can include a two-stage architecture, in which a first stage is used for coarse gain adjustment and a second stage is used for fine gain adjustment. The gain of the two-stage variable gain amplifier can be easily adjusted to a desired value.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: June 27, 2006
    Assignee: Realtek Semiconductor
    Inventors: Wen-Chi Wang, Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai
  • Patent number: 7057454
    Abstract: A DSM variable high-gain circuit includes a differential amplifier and a negative feedback loop comprising low resistance poly resistors and switches configured in a T-structure having a junction point as part of the negative feedback loop. A third resistor branch of the T-structure includes a switch that connects the junction point through the third resistor branch to ground when in a closed state and that turns the third resistor branch into an open circuit when in an open state The switch of the third resistor branch, when in the closed state, produces a gain at the output of the variable high-gain circuit.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: June 6, 2006
    Assignee: Infineon Technologies AG
    Inventors: Fan Yang Ma, Wen Yu
  • Patent number: 7054372
    Abstract: A digital transmission line tap circuit is provided for applying a non-intrusive tap on a digital transmission line thus allowing the transmission signal to be monitored or utilized by another piece of transmission equipment. The tap circuit incorporates all the required functions of the tap in one circuit and eliminates large components, such as termination transformers.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 30, 2006
    Assignee: Lucent Technologies Inc.
    Inventor: Kevin C. Davis
  • Patent number: 7023280
    Abstract: Disclosed is a transimpendance amplifier comprising a single ended input terminal to receive an input signal from a photodiode and differential output terminals. A circuit coupled between the single ended input terminal and a differential output terminal may vary the gain of the transimpedance amplifier in response to a DC current component of the input signal.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: April 4, 2006
    Assignee: Intel Corporation
    Inventors: Shivakumar Seetharaman, Lawrence L. Huang
  • Patent number: 7019589
    Abstract: A transimpedance amplifier includes a first amplifier, a first MOS resistor device and a first voltage divider circuit. The source terminal of the first MOS resistor device is coupled to the first amplifier inverting input. The voltage divider circuit is coupled between the first amplifier output and the non-inverting input. The output of the first voltage divider is coupled to the first MOS resistor drain terminal. A second amplifier, second MOS resistor device and a second voltage divider circuit is also provided. The output of the second amplifier is coupled to the gate terminal of the first MOS resistor device. The gate terminal of the second MOS resistor device is coupled to the second amplifier output. The drain terminal of the second MOS resistor device is coupled to the second amplifier non-inverting input.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: March 28, 2006
    Assignee: Texas Advanced Optoelectronic Solutions, Inc.
    Inventors: William W. Wiles, Jr., Cecil Aswell
  • Patent number: 7002408
    Abstract: Data signal amplification and processing circuitry with multiple signal gains for increasing dynamic signal range. An incoming data signal is processed in accordance with multiple signal gains. The resultant signals have multiple signal values which are compared to predetermined lower and higher thresholds.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: February 21, 2006
    Assignee: Varian Medical Systems Technologies, Inc.
    Inventors: Pieter Gerhard Roos, Edward Seppi, Richard Colbeth, Gary Virshup, Ivan Petrov Mollov
  • Patent number: 6972619
    Abstract: In order that an amplifier with a gain proportional to source voltage is obtained, the drain-source voltages of first and second P-channel MOS-FETs are zero-biased, and a voltage shifted higher by the amount of the threshold voltage of the P-channel MOS-FET on the basis of a voltage obtained by dividing the power source voltage by resistors is applied to the positive input terminal of an operational amplifier. The gate of one of the first and second MOS-FETs is connected to a circuit ground, and a negative fixed voltage with reference to the potential obtained by dividing the power source voltage by resistors is applied to the gate of the other MOS-FET. The ON resistances of the two MOS-FETs are used as the input resistor and the feedback resistor of the operational amplifier, respectively.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: December 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaharu Sato, Takuma Ishida, Taku Kobayashi
  • Patent number: 6958655
    Abstract: A variable gain amplifier circuit using a variable impedance circuit, includes an input terminal, an operational amplifier, a first variable impedance connected with the input terminal and the operational amplifier, a second variable impedance connected with a reverse input terminal of the operational amplifier and an output terminal of the operational amplifier, a third variable impedance whose first end is connected with the reverse input terminal of the operational amplifier, a fourth variable impedance whose first end is connected with the input terminal and second end is connected with a second end of the third variable impedance, and a fifth variable impedance whose first end is connected with the second end of the third variable impedance and second end is connected with the output terminal of the operational amplifier, wherein the first variable impedance, the second variable impedance, and the third variable impedance are controlled in accordance with an upper bit group, and the fourth variable imped
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: October 25, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takahiro Shirai
  • Patent number: 6958648
    Abstract: A programable gain amplifier (PGA) has an amplifier and a variable resistor that is connected to the output of the amplifier. The variable resistor includes a resistor that is connected to a reference voltage and multiple parallel taps that tap off the resistor. A two-stage switch network having fine stage switches and coarse stage switches connects the resistor taps to an output node of the PGA. The taps and corresponding fine stage switches are arranged into two or more groups, where each group has n-number of fine stage switches and corresponding taps. One terminal of each fine stage switch is connected to the corresponding resistor tap, and the other terminal is connected to an output terminal for the corresponding group. The coarse stage switches select from among the groups of fine stage switches, and connect to the output of the PGA.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: October 25, 2005
    Assignee: Broadcom Corporation
    Inventors: Felix Cheung, Kevin T. Chan, Siavash Fallahi
  • Patent number: 6958646
    Abstract: An autozeroing floating-gate amplifier (AFGA) is implemented utilizing a programmable gain element, the characteristics of which may be changed by changing the amount of charge stored on a floating gate device.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: October 25, 2005
    Assignee: Impinj, Inc.
    Inventors: William T. Colleran, Todd E. Humes, Christopher J. Diorio
  • Patent number: 6946910
    Abstract: A configurable feedback path is included in an amplitude control system having a signal source and an amplitude controller, and provides accurate tracking between a signal provided at a test port and a reference signal, whether or not the configurable feedback path is in an internally-leveled configuration or an externally-leveled configuration. The configurable feedback path includes a series of access ports, a detector that has an input coupled to the first access port, a filtered output coupled to the amplitude controller, and an unfiltered output providing the reference signal. The configurable feedback path also includes a signal separator that has an input terminal coupled to the signal source, a thru-terminal coupled to the third access port, and a coupled terminal that is coupled to the second access port. The fourth access port is coupled to the test port.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: September 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Chen-Yu Chi
  • Patent number: 6933786
    Abstract: An amplifier system has a control circuit. An amplifier is coupled to the control circuit and has a controllable gain. A controllable input impedance circuit is coupled to the control circuit. When the gain of the amplifier is changed the controllable input impedance circuit's impedance is adjusted, so that the input impedance to the system remains essentially constant.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: August 23, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Palathol mana Sivadasan Mohandas, Gajender Rohilla, Pulkit Shah
  • Patent number: 6909323
    Abstract: A variable gain amplifier device comprises a variable gain amplifier circuit which amplifies a difference between an input signal and a feedback signal to output an output signal, a feedback circuit which supplies the feedback signal to the variable gain amplifier circuit, and a controller which controls the variable gain amplifier circuit and the feedback circuit to decrease a cutoff frequency of the feedback circuit according to increase of a gain of the variable gain amplifier circuit or vice versa.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: June 21, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ueno, Tadashi Arai, Tetsuro Itakura
  • Patent number: 6888405
    Abstract: A programable gain amplifier (PGA) has an amplifier and a variable resistor that is connected to the output of the amplifier. The variable resistor includes a resistor that is connected to a reference voltage and multiple parallel taps that tap off the resistor. A two-stage switch network having fine stage switches and coarse stage switches connects the resistor taps to an output node of the PGA. The taps and corresponding fine stage switches are arranged into two or more groups, where each group has n-number of fine stage switches and corresponding taps. One terminal of each fine stage switch is connected to the corresponding resistor tap, and the other terminal is connected to an output terminal for the corresponding group. The coarse stage switches select from among the groups of fine stage switches, and connect to the output of the PGA.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: May 3, 2005
    Assignee: Broadcom Corporation
    Inventors: Felix Cheung, Kevin T. Chan, Siavash Fallahi
  • Patent number: 6882226
    Abstract: A broadband variable gain amplifier with improved linearity and gain characteristic is provided. According to the present invention, the broadband variable gain amplifier comprises: an amplification unit for amplifying an input signal applied to an input terminal and outputting an amplified signal to an output terminal; and a gain control unit which is connected between the input and output terminals, and for controlling gain of said amplification unit, wherein said gain control unit comprises: a variable resistance unit whose resistance value is varied according to a control signal; and a broadband matching unit for proving an optimal impedance characteristic to the input terminal said amplification unit in a broad band, where in said variable gain resistance unit and said broadband matching unit is connected in parallel.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: April 19, 2005
    Assignee: Integrant Technologies Inc.
    Inventors: Youngho Cho, Bo-Eun Kim, Bonkee Kim
  • Patent number: 6873207
    Abstract: A power amplification circuit, and a communication device using the same, which are capable of suppressing gain decreases of a power amplifier due to increases in input signal power in a state near the saturation operation, capable of reducing its size, and low in distortion and high in efficiency. The power amplification circuit includes a power amplifier and a negative feedback circuit connected between a signal input terminal and a signal output terminal of the power amplifier. Impedance of the negative feedback circuit depends on a signal voltage occurring across the negative feedback circuit. By adjusting the characteristic that the negative feedback quantity of the negative feedback circuit to the power amplifier is variable depending on input signal power, gain fluctuations of the power amplifier due to increases or decreases of input signal power or output signal power around a specified output signal power are suppressed.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: March 29, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Keiichi Sakuno
  • Patent number: 6856195
    Abstract: Systems and methods are provided for selecting an input impedance of a preamplifier device. Multiple feedback paths are provided to an amplifier device of the preamplifier. The feedback paths are selectable to switch feedback paths in and out to configure the preamplifier to the desired input impedance. The desired input impedance is selected to match the input impedance of the input signal system to optimize the performance of the preamplifier.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: February 15, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Indumini Ranmuthu
  • Publication number: 20040239419
    Abstract: The invention relates to a VGA stage having a novel circuit configuration for amplifying/attenuating a differential input signal which is transmitted via a transmission line (H). The VGA stage comprises an operational amplifier (OPV1, OPV2), which is connected as shunt feedback, for amplifying the input signal; a string of resistors (R01, R01′) for attenuating the signal; and a control device (2) for switching the string of resistors (R01, R01′).
    Type: Application
    Filed: June 25, 2004
    Publication date: December 2, 2004
    Inventors: Peter Gregorius, Otto Schumacher
  • Patent number: 6825718
    Abstract: The present invention discloses an impedance matching circuit which is suitable to be applied on an IC chip. The impedance matching circuit comprises a resistor unit, an OP amplifier circuit connected with the resistor unit, a feedback selecting circuit connected in parallel with the OP amplifier circuit, and a resistor selecting circuit connected with both the OP amplifier circuit and the feedback selecting circuit. The feedback selecting circuit further includes a plurality of switching circuits for enabling some of the resistors furnished in the resistor selecting circuit. By selecting and actuating one of the switching circuits, some certain resistors will be enabled so as to adjust the resistance value of the resistor selecting circuit. The resistor unit and the switching circuits are designed in such a manner that the resistor unit is able to compensate an equivalent resistance of the switching circuit which is actuated.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: November 30, 2004
    Assignee: Realtek Semiconductor Corp.
    Inventors: Tzung-Hung Kang, Chao-Cheng Lee
  • Patent number: 6825717
    Abstract: A feedback network for connecting an output of an operational amplifier with a feedback input of the operational amplifier, wherein the feedback network comprises a feedback circuit. The feedback network comprises a semiconductor switch in series to the feedback circuit for turning off and on the feedback network.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: November 30, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Ingo Dettmann
  • Publication number: 20040232981
    Abstract: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.
    Type: Application
    Filed: December 31, 2003
    Publication date: November 25, 2004
    Inventors: Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai, Wen-Chi Wang
  • Patent number: 6816009
    Abstract: A transimpedance amplifier (18) receives an audio signal from a power audio amplifier (14) and provides a variable power level to a loudspeaker (16). A first variable gain amplifier (28) receives the audio signal and provides a variable gain to a power amplifier (40). The output signal of the power amplifier drives the loudspeaker. A sense amplifier (52) subtracts a voltage representative of current flowing through the loudspeaker from a voltage applied to the loudspeaker and provides a difference signal. A second variable gain amplifier (70) receives the difference signal and provides a variable gain to a load amplifier (80). The gains of the first and second variable gain amplifiers are inversely proportional. A resistive element (84) having a real impedance is coupled between an output of the load amplifier and the input of the transimpedance amplifier to maintain the complex impedance of the loudspeaker at the output of the power audio amplifier.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: November 9, 2004
    Assignee: Fender Musical Instruments, Inc.
    Inventors: William Edward Hughes, Richard W. Faith
  • Patent number: 6798284
    Abstract: A reference circuit having a variable-impedance function for reducing current consumption is provided. By switching an output impedance of the reference circuit so that the output impedance is large when transmitting a high-frequency signal to a sensor coil, and the output impedance is small when receiving a response signal from the sensor coil, current consumption is reduced. The reference circuit includes a loop gain adjusting circuit having a switch for switching a gain. The magnitude of the output impedance of the reference circuit is switched by opening and closing the switch to switch the gain.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 28, 2004
    Assignee: Wacom Co., Ltd.
    Inventor: Yasuo Oda
  • Publication number: 20040183592
    Abstract: The present invention relates to a feedback network for connecting an output of an operational amplifier with a feedback input of said operational amplifier, wherein said feedback network comprises a feedback circuit. Said feedback network comprises a semiconductor switch in series to said feedback circuit for turning off and on said feedback network.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Applicant: Agilent Technologies, Inc.
    Inventor: Ingo Dettmann
  • Publication number: 20040164797
    Abstract: The invention provides an amplifier circuit made by digital CMOS processes, the amplifier circuit comprising a main operational amplifier with at least one input and at least one output and a feedback loop including a non-linear gateoxide capacitor, wherein a voltage control means is connected to the main operational amplifier to provide a voltage difference between the output common mode voltage and the input common mode voltage of the main operational amplifier to apply a DC biasing voltage across the non-linear gateoxide capacitor sufficient to operate the non-linear gateoxide capacitor in a bias range where the capacity of the none-linear gateoxide capacitor is almost independent of the applied voltage comprising the bias voltage plus a signal voltage.
    Type: Application
    Filed: September 12, 2003
    Publication date: August 26, 2004
    Inventor: Martin Reber
  • Patent number: 6759900
    Abstract: A preamplifier includes a detector to detect an input optical power level and convert the detected input optical power level into an input current. The preamplifier also includes a transimpedance amplifier that provides a gain for the input current received from the detector. A dummy transimpedance amplifier is provided to supply a reference voltage. The dummy transimpedance amplifier has a structure similar to that of the transimpedance amplifier. A unity gain buffer is used to reduce the output impedance of the reference voltage and to output a bias voltage to both the transimpedance amplifier and the dummy transimpedance amplifier. This bias voltage can make the gate-controlled MOSFET working in its triode region, and the load resistance of the core amplifier can be easily controlled such that the gain and bandwidth of the core amplifier can be widely controlled. This results in the preamplifier having a high stability while its feedback resistor is controlled to achieve wide dynamic range.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: July 6, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Xue Ying Chen
  • Patent number: 6734817
    Abstract: When the performance of an A/D converter required by a system changes, power consumption of the overall system can be reduced. The resolution of an A/D converter is made variable by changing a current flowing through an amplifier by an external control signal that specifies the resolution. Thus, when the performance required by a system changes, it is possible to change the performance of the A/D converter and to prevent a performance overhead of the A/D converter. Consequently, power consumption of the A/D converter is reduced, and power consumption of the system as a whole is also reduced.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: May 11, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Junichi Naka, Yoshitsugu Inagaki, Hiroshi Sakura, Heiji Ikoma, Koji Oka, Youichi Okamoto, Daisuke Nomasaki
  • Publication number: 20040080366
    Abstract: A variable gain amplifier device comprises a variable gain amplifier circuit which amplifies a difference between an input signal and a feedback signal to output an output signal, a feedback circuit which supplies the feedback signal to the variable gain amplifier circuit, and a controller which controls the variable gain amplifier circuit and the feedback circuit to decrease a cutoff frequency of the feedback circuit according to increase of a gain of the variable gain amplifier circuit or vice versa.
    Type: Application
    Filed: October 22, 2003
    Publication date: April 29, 2004
    Inventors: Takashi Ueno, Tadashi Arai, Tetsuro Itakura
  • Patent number: 6724251
    Abstract: A circuit with low noise and reduced offset that feeds an input of an opamp with a programmable feedback resistor that provides variable gain settings. Input biasing currents are varied using control bits that are also used to adjust the gain. When the input signal is small (gain at higher setting), a minimum bias current is provided to source the input voltage swing. This scheme reduces the noise and offset generated by the lower transconductance of a biasing transistor while maintaining a constant SNR and fixed offset even in the presence of relatively small input swings. Also, when the input signal is large (gain at lower setting), a maximum bias current can be provided to accommodate the relatively large input swing level. Although the overall noise and offset current are increased for large input swings, the overall SNR and offset is maintained for relatively lower input swings.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: April 20, 2004
    Assignee: National Semiconductor Corp.
    Inventors: Ramsin M. Ziazadeh, Jitendra Mohan, Abu-Hena Mostafa Kamal
  • Patent number: 6720826
    Abstract: A transimpedance amplifier system includes a first gain stage to receive an input signal. A second gain stage is coupled to the first gain stage to provide a first output. A first passive feedback element is coupled in parallel with the second gain stage. A general feedback element is coupled in parallel with the first gain stage and the second gain stage. A replica biasing stage is included to provide a second output. A replica feedback element is coupled in parallel with the replica biasing stage.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: April 13, 2004
    Assignee: Intel Corporation
    Inventor: Taesub Ty Yoon
  • Patent number: 6714082
    Abstract: A semiconductor amplifier circuit comprises a transimpedance amplifier for amplifying an input signal; a by-pass transistor connected between an input terminal of the transimpedance amplifier and the ground potential; a first resistor, one end of the first resistor being connected to an output terminal of the transimpedance amplifier; a capacitor connected between the other end of the first resistor and the ground potential; a second resistor connected between the other end of the first resistor and the gate of the by-pass transistor via an inverter; and a differential amplifier having a signal input terminal connected to the output terminal of the transimpedance amplifier and a reference-voltage input terminal connected to the other end of the first resistor.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: March 30, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Shigemi Miyazawa
  • Publication number: 20040056714
    Abstract: In a multi-level output circuit, an amplifier circuit amplifies a constant input voltage and outputs the amplified constant input voltage. The multi-level output circuit is capable of selectively outputting signals of different levels by switching the gain of the amplifier circuit by a switch.
    Type: Application
    Filed: June 26, 2003
    Publication date: March 25, 2004
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventor: Nagayoshi Dobashi
  • Patent number: 6710647
    Abstract: A distortion compensation output control circuit has an adder 1 for adding a value of input electric power and a value of a part of output electric power negatively fed backed together, a variable attenuator 2 for attenuating the electric power output from the adder 1, an electric power amplifier 3 for amplifying the electric power output from the variable attenuator 2 and outputting the output electric power set to a prescribed value, a variable attenuator 4 for attenuating the output electric power output from the electric power amplifier 3 and negatively feeding back the attenuated output electric power to the adder 1, a control circuit 12 for controlling the variable attenuator 4 so as to obtain the output electric power of the prescribed value, and a control circuit 11 for controlling the variable attenuator 2 so as to obtain a loop gain depending the output electric power of the prescribed value.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: March 23, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshio Mise, Tomohiro Tanabe
  • Patent number: 6710648
    Abstract: In an amplifying circuit, an amplifier receives an input signal via a first resistor unit, and generates an output signal at an output thereof. A second resistor unit is connected between the output and input of the amplifier, and has at least one control input. The second resistor unit has a variable equivalent impedance that is controlled by a control signal received at the control input. A feedback control unit receives the output signal from the amplifier, and is operable so as to provide the control signal to the control input of the second resistor unit when the output signal does not fall within a voltage range defined by a predetermined low voltage and a predetermined high voltage to adjust the variable equivalent impedance of the second resistor unit.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: March 23, 2004
    Assignee: Wistron Corporation
    Inventors: Te-Yu Liang, Chien-Chih Yu
  • Patent number: 6693487
    Abstract: A signal processing circuit using positive feedback while keeping the open loop gain of the circuit less than 1 to avoid oscillation. The circuit includes a floating signal source, a low gain amplifier, a feedback element, and a second stage circuit. The floating signal source produces a voltage that is impressed across the feedback element by the feedback system. The feedback element processes the voltage into an output current. The output current is passed through an output current node to the second stage circuit where the output current can be used as a current reference or be further processed. The output from the low gain amplifier may be used as a voltage output node that provides a voltage that is an amplification of the voltage produced by the floating signal source. The signal processing circuit may be embedded in another circuit, including additional stages of the signal processing circuit.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: February 17, 2004
    Assignee: Finisar Corporation
    Inventor: Philip D. Shapiro
  • Patent number: 6693491
    Abstract: A control circuit for controlling a level of an audio signal and transmitting the signal to an amplifier is described. The control circuit is based on an R-2R resistor network having a first plurality of resistor nodes and a parallel resistor network having a second plurality of resistor nodes. Each of the resistors in the parallel network has a value equal to one-half of the value of the preceding resistor. A plurality of switches alternately connects each of the plurality of resistor nodes to one of a plurality of low impedance nodes and a low impedance input node associated with the amplifier. Switch control circuitry selectively controls the plurality of switches to transmit the audio signal to the low impedance input node.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: February 17, 2004
    Assignee: Tripath Technology, Inc.
    Inventor: Cary L. Delano
  • Publication number: 20030234686
    Abstract: The present invention discloses an impedance matching circuit which is suitable to be applied on an IC chip. The impedance matching circuit comprises a resistor unit, an OP amplifier circuit connected with the resistor unit, a feedback selecting circuit connected in parallel with the OP amplifier circuit, and a resistor selecting circuit connected with both the OP amplifier circuit and the feedback selecting circuit. The feedback selecting circuit further includes a plurality of switching circuits for enabling some of the resistors furnished in the resistor selecting circuit. By selecting and actuating one of the switching circuits, some certain resistors will be enabled so as to adjust the resistance value of the resistor selecting circuit. The resistor unit and the switching circuits are designed in such a manner that the resistor unit is able to compensate an equivalent resistance of the switching circuit which is actuated.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 25, 2003
    Applicant: Realtek Semiconductor Corp.
    Inventors: Tzung-Hung Kang, Chao-Cheng Lee
  • Publication number: 20030234685
    Abstract: Systems and methods are provided for selecting an input impedance of a preamplifier device. Multiple feedback paths are provided to an amplifier device of the preamplifier. The feedback paths are selectable to switch feedback paths in and out to configure the preamplifier to the desired input impedance. The desired input impedance is selected to match the input impedance of the input signal system to optimize the performance of the preamplifier.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Inventor: Indumini Ranmuthu
  • Patent number: 6664858
    Abstract: A transimpedance amplifier for a high-speed optical fiber communication receiver includes an operational amplifier having a current input and developing a voltage output. A variable peaking capacitor is connected across the operational amplifier. A control circuit is operatively coupled to the variable capacitor for controlling capacitance to widen bandwidth of the transimpedance amplifier.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventor: Kai D. Feng
  • Patent number: 6650173
    Abstract: The voltage generator comprises a negative feedback loop including a programmable voltage divider having a feedback node. The voltage divider comprises a programmable resistor disposed between the output of the voltage generator and the feedback node and having variable resistance. The programmable resistor includes a fixed resistor and a plurality of additional resistors arranged in series with each other and defining a plurality of intermediate nodes. The additional resistors may be selectively connected by means of switches disposed between the output of the voltage generator and a respective intermediate node so as to define an output voltage V0 programmable on the basis of command signals supplied to the switches.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: November 18, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Osama Khouri, Rino Micheloni, Andrea Sacco, Guido Torelli
  • Patent number: 6642795
    Abstract: An amplifier with a electrically controllable gain and enhanced protection against an overload condition is disclosed. The amplifier contains a buffer amplifier configured to convert an input voltage signal to a current signal and an output amplifier that converts a current signal to an output voltage signal. The gain of the amplifier can be controlled by an internal resistor that can be electrically configured to different resistance levels. The amplifier also includes a clamping network used to clamp the output amplifier to prevent an overload condition. This network may take the form of a diode network. Such an amplifier may take the form of a differential amplifier.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: November 4, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Myron J. Koen, Harish Venkataraman
  • Publication number: 20030179039
    Abstract: In an amplifying circuit, an amplifier receives an input signal via a first resistor unit, and generates an output signal at an output thereof. A second resistor unit is connected between the output and input of the amplifier, and has at least one control input. The second resistor unit has a variable equivalent impedance that is controlled by a control signal received at the control input. A feedback control unit receives the output signal from the amplifier, and is operable so as to provide the control signal to the control input of the second resistor unit when the output signal does not fall within a voltage range defined by a predetermined low voltage and a predetermined high voltage to adjust the variable equivalent impedance of the second resistor unit.
    Type: Application
    Filed: September 17, 2002
    Publication date: September 25, 2003
    Inventors: Te-Yu Liang, Chien-Chih Yu
  • Patent number: 6614312
    Abstract: An imaging element that includes a photodiode and an amplifier for integrating photocurrent from the photodiode. The amplifier includes an input follower, a level shifter, and an output amplifier. The level shifter provides DC isolation between the follower output and the output amplifier. The input follower includes an input transistor connected to the photodiode, and the output amplifier has an input transistor connected to the level shifter. The sizes of these transistors are chosen such that the area of the input transistor in the input follower is less that the area of the input transistor in the output amplifier. The input follower preferably utilizes PMOS transistors.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: September 2, 2003
    Assignee: Agilent Technologies, Inc.
    Inventor: Boyd Fowler