Abstract: A battery pack includes: a charging voltage detector for detecting charging voltage applied to a charging path; a charging first transistor disposed in series on the charging path for controlling charging current flowing through the charging path; a charging second transistor for controlling operation of the charging first transistor; and a controller for controlling operation of the charging first transistor and the charging second transistor. Based on the charging current detected by a charging current detector and the charging voltage detected by the charging voltage detector, the controller can adjust the charging current for charging the battery block, by controlling second ON resistance that is ON resistance of the charging second transistor in a linear region of the charging second transistor, and by controlling first ON resistance that is ON resistance of the charging first transistor in a linear region of the charging first transistor using the second ON resistance.

Abstract: The embodiments disclosed herein reduce numerous active regulators (e.g., to only one) used in previous circuits that require regulated current and still accomplish the current regulation provided to each load by means of an array of autotransformers, and if required, rectifiers, and filters. Therefore, in an exemplary embodiment, there is eliminated the numerous active regulators by replacing them with simple passive components and an active regulator.

Abstract: A detection circuit for detecting a clock signal includes a multiplexer, a digital-to-analog converter, a comparator, and a counter. The multiplexer outputs either a first signal or a second signal as a selection signal. The digital-to-analog converter outputs a reference voltage according to the selection signal. The comparator compares the clock signal to the reference voltage to generate a comparison signal. The counter counts a reference clock signal to generate an overflow signal, and resets the overflow signal according to the comparison signal. The overflow signal indicates the amplitude of the clock signal.

Abstract: The present disclosure provides an adaptive adjustment circuit in a computer chip having a voltage-controlled oscillator (VCO) and a processor. The adaptive adjustment circuit comprises a frequency difference acquisition module to generate a frequency difference signal based on a first difference between an oscillation frequency of the VCO and a target frequency. The adaptive adjustment circuit also includes a power module to supply a working voltage to the VCO and the processor, adjust the working voltage based on the frequency difference signal, and supply the adjusted working voltage to the VCO and the processor.

Abstract: A circuit device includes an oscillation circuit configured to generate an oscillation signal, a first pre-driver disposed in a posterior stage of the oscillation circuit, a first output driver disposed in a posterior stage of the first pre-driver, a first regulator configured to supply a first regulated voltage to the first pre-driver, and a second regulator configured to supply a second regulated voltage to the first output driver, wherein the second regulator is shorter in transient response time than the first regulator.

Abstract: Various embodiments provide for active suppression circuitry. The active suppression circuitry can be used with a circuit for a memory system, such as a dual data rate (DDR) memory system. For example, some embodiments provide an active suppression integrated circuit. The active suppression integrated circuit can be used by a memory system to efficiently suppress power supply noise caused by resonance of a power delivery network (PDN) of the memory system, thereby improving power integrity of the memory system input/output.

Abstract: Provided is an oscillator circuit including an LC oscillator circuit, an amplitude detection circuit, and a bias generation circuit, in which the LC oscillator circuit includes an inductor and at least one variable capacitance element, the amplitude detection circuit detects an oscillation amplitude of the LC oscillator circuit and converts the oscillation amplitude into a DC voltage, and the bias generation circuit compares the DC voltage with a voltage for generating a bias signal, the voltage changing on the basis of a temperature fluctuation of the bias generation circuit, calculates a difference between the DC voltage and a voltage after the change, and generates, on the basis of the difference, a bias signal that reduces a fluctuation in the oscillation amplitude, to control the oscillation amplitude.

Abstract: Systems, methods, and circuits are provided for facilitating negative resistance margin testing in an oscillator circuit. An example oscillator circuit includes amplifier circuitry configured to be coupled in parallel with a resonator and variable resistance circuitry configured to, in response to a resistance control signal, adjust a resistance of the oscillator circuit.

Abstract: A crystal oscillator and a startup method for initiating operation of a crystal oscillator with a crystal resonator including a first terminal and a second terminal, an electronic oscillator circuit connected to the crystal resonator, a first capacitor including first and second terminals, the second connected to the first terminal of the crystal resonator, a second capacitor including first and second terminals, the second connected to the second terminal of the crystal resonator. A switch includes first, second and third terminals, wherein an electrical conductivity between the first terminal and the second terminal of the switch is controllable by a voltage at the third terminal, wherein the first terminal of the switch is connected to the first terminal of the first capacitor and wherein the second terminal of the switch is connected to the first terminal of the second capacitor.

Abstract: A DC-DC converter includes an insulating substrate; a magnetic core embedded in the insulating substrate, the magnetic core having non-zero x, y and z dimensions of less than or equal to about 5.4 mm by about 5.4 mm by about 1.8 mm; separate primary and secondary transformer windings surrounding first and second regions of the magnetic core; and a control circuit including: an oscillator; a drive circuit coupled to the oscillator; and one or more switches coupled to the drive circuit; the drive circuit providing a switching signal to the one or more switches and energizing the one or more switches to provide a drive voltage to the primary transformer winding. The one or more switches are Field Effect Transistors implemented in a Silicon-on-Insulator configuration or as a Silicon-on-Sapphire configuration.

Abstract: A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.

Abstract: In certain aspects, an apparatus includes a transformer including an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor. The apparatus also includes a transconductance driver configured to drive the input inductor based on an input signal. The apparatus further includes a feedback circuit configured to detect an output voltage swing at the output inductor, generate a regulated voltage at the input inductor, and control the regulated voltage based on the detected output voltage swing.

Abstract: A local oscillator of the present invention includes: a frequency generator for outputting first and second sinusoidal signals having the same frequency but mutually different phases; a phase detector for outputting either a positive or a negative voltage depending on whether a phase difference between the first and second sinusoidal signals output from the frequency generator is greater than a reference phase difference; and a comparator for outputting a comparison result between a voltage output from the phase detector and a reference voltage, or a comparison result between the voltage output from the phase detector and a voltage obtained by inverting the polarity of the voltage, in which the frequency generator controls the phase of the first sinusoidal signal so that the phase difference approaches the reference phase difference by using the comparison result output from the comparator, enabling generating IQ signals having higher phase accuracy than conventional local oscillators.

Abstract: A local oscillator of the present invention includes: a frequency generator for outputting first and second sinusoidal signals having the same frequency but mutually different phases; a phase detector for outputting either a positive or a negative voltage depending on whether a phase difference between the first and second sinusoidal signals output from the frequency generator is greater than a reference phase difference; and a comparator for outputting a comparison result between a voltage output from the phase detector and a reference voltage, or a comparison result between the voltage output from the phase detector and a voltage obtained by inverting the polarity of the voltage, in which the frequency generator controls the phase of the first sinusoidal signal so that the phase difference approaches the reference phase difference by using the comparison result output from the comparator, enabling generating IQ signals having higher phase accuracy than conventional local oscillators.

Abstract: A crystal oscillator including a feedback circuit, and a reference clock generating circuit including the crystal oscillator. The crystal oscillator is configured to generate an oscillating signal based on a natural frequency of a crystal. The crystal oscillator may include: a current generating circuit connected to a first node having a first voltage and a second node having a second voltage, and configured to output a first current to the second node; a feedback circuit connected to the generating circuit via the first and second nodes and configured to adjust a level of the second voltage by controlling a level of the first voltage; and a crystal circuit connected to the second node and configured to generate the oscillating signal based on the second voltage.

Abstract: A differential crystal oscillator circuit is disclosed. The differential crystal oscillator circuit includes an output port. The output port includes a first terminal and a second terminal. A resonance port is included to couple a resonance element to the differential crystal oscillator circuit. The differential crystal oscillator includes a current source. A differential amplifier is included to excite the resonance element. The differential amplifier is coupled to the current source and the resonance port. The differential amplifier includes a plurality of transistors. The differential crystal oscillator circuit further includes a low pass filter that in combination with a transistor in the differential amplifier exhibits characteristics of a high pass filter. The differential amplifier is configured to use the current source as an active load.

Abstract: A voltage controlled oscillator (VCO), a method of designing a voltage controlled oscillator, and a design structure comprising a semiconductor substrate including a voltage controlled oscillator are disclosed. In one embodiment, the VCO comprises an LC tank circuit for generating an oscillator output at an oscillator frequency, and an oscillator core including cross-coupled semiconductor devices to provide feedback to the tank circuit. The VCO further comprises a supply node, a tail node, and a noise by-pass circuit connected to the supply and tail nodes, in parallel with the tank circuit and the oscillator core. The by-pass circuit forms a low-impedance path at a frequency approximately twice the oscillator frequency to at least partially immunize the oscillator core from external noise and to reduce noise contribution from the cross-coupled semiconductor devices.

Abstract: Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a receive path and a power amplifier in a transmit path. The low noise amplifier includes a first inductor, an amplification circuit, and a second inductor magnetically coupled to the first inductor to provide negative feedback to linearize the low noise amplifier. The power amplifier includes an injection-locked oscillator driver stage. Other embodiments of front end systems are disclosed, along with related devices, integrated circuits, modules, methods, and components thereof.

Abstract: An amplitude limiting oscillation circuit is disclosed. The amplitude limiting oscillation circuit includes: an oscillation circuit, configured to generate an oscillation signal; a pulse width modulation circuit, configured to generate a pulse width modulation signal according to an amplitude of the oscillation signal; a low pass filtering circuit, configured to convert the pulse width modulation signal into a direct current control voltage signal, where the direct current control voltage signal is configured to control a voltage controlled resistance circuit; and the voltage controlled resistance circuit, configured to change a resistance value of the voltage controlled resistance circuit according to under the direct current control voltage signal, to control the amplitude of the oscillation signal. The amplitude limiting oscillation circuit, may improve performance of the amplitude limiting oscillation circuit.

Abstract: An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes.

Abstract: In a method of changing an active winding number of a control winding in an electrical installation, the control winding is coupled to an alternating current mains having a predetermined period duration, the control winding being designed for a predetermined nominal current strength and includes a first and a second tap. Switching is effected, in accordance with a predetermined switching sequence plan from a first continuous current state to a second continuous current state, a load current flowing in the first continuous current state from the first tap to a load output line through a first main path with the second tap isolated from the load output line, the load current flowing in the second continuous current state from the second tap to the load output line through a second main path with the first tap isolated from the load output line.

Abstract: An oscillator and method for generating a signal are provided. The oscillator comprises an electro-mechanical resonator and a reconfigurable oscillator driver. The reconfigurable oscillator driver starts the oscillator in single-ended mode to avoid latching and transitions the oscillator to differential mode in such a manner as to sustain oscillations therein. The reconfigurable oscillator driver may comprise two back-to-back banks of inverters and an adjustable feedback resistor. In single-ended mode, one bank is disabled and the other bank is enabled. To transition to differential mode and improve the quality of the signal, the number of enabled inverters is equalized in both banks.

Abstract: Embodiments of the present disclosure provide a system for detecting and precisely measuring information content of one or more environmental conditions. The system may include a plurality of oscillator circuits that are coupled together. The coupling of the oscillator circuits generates an output signal having a pattern of amplitude and frequency. The pattern of amplitude and frequency changes as one or more values of the environmental condition(s) change.

Abstract: A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width. The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.

Abstract: To provide a crystal oscillation circuit low in current consumption and stably short in oscillation start time. A crystal oscillation circuit is equipped with a crystal vibrator, a feedback resistor, a bias circuit, a constant voltage circuit, and an oscillation inverter configured by a constant current inverter. The oscillation inverter is configured so as to be controlled by currents based on input signals from the bias circuit and the crystal vibrator and driven by an output voltage of the constant voltage circuit.

Abstract: A crystal oscillator has characteristics in that reduction in oscillation margin makes the crystal oscillator less likely to oscillate, with the result that an amplitude of a voltage waveform at an input terminal of a CMOS inverter is reduced. A crystal oscillator of the invention has a detection circuit that outputs an alarm signal when the amplitude of the voltage waveform at the input terminal of the CMOS inverter becomes equal to or less than a predetermined specified value. As a result, it is possible to detect a change in the oscillation margin of the crystal oscillator without switching between circuits even after the crystal oscillator is incorporated in a device.

Abstract: The present disclosure provides methods and apparatus for dynamically adjusting the common mode voltage at the LC tank node and/or the power supply voltage of a VCO with an LC resonator in order to force oscillation start-up by temporarily increasing gain. Methods according to certain preferred embodiments may reduce power consumption and/or overcome threshold voltage limitations and/or increase frequency and frequency tuning range during normal (steady-state) operation.

Abstract: A method for controlling a brazing process, including the steps of applying a welding current through an electrode (52) pressed to a metal surface (83) of a workpiece to form a welding arc. Further steps are continuously measuring the welding current and the welding time, continuously determining supplied energy on the basis of the welding current and the welding time, digitally switching current supplied from batteries of a DC source (10) and to maintain a substantially constant welding current, interrupting the supply of welding current when a predetermined amount of energy has been supplied and supplying heat to batteries when a temperature of the batteries is below a predetermined value.

Abstract: A frequency generation solution controls an oscillator amplitude using two feedback paths to generate high frequency signals with lower power consumption and lower noise. A first feedback path provides continuous control of the oscillator amplitude responsive to an amplitude detected at the oscillator output. A second feedback path provides discrete control of the amplitude regulating parameter(s) of the oscillator responsive to the detected oscillator amplitude. Because the second feedback path enables the adjustment of the amplitude regulating parameter(s), the second feedback path enables an amplifier in the first feedback path to operate at a reduced gain, and thus also at a reduced power and a reduced noise, without jeopardizing the performance of the oscillator.

Abstract: An oscillator device comprises an oscillation circuit configured to generate and provide an oscillating signal. A first biasing circuit is configured to derive a bias current signal in accordance with a control signal and apply the bias current signal to the oscillation circuit to control the amplitude level of the oscillating signal. A reference generating circuit is configured to generate a reference voltage signal and comprises a second biasing circuit configured to derive a reference bias current signal in accordance with the control signal. A comparison circuit is configured to determine an error signal by comparing a voltage signal at an output of the first biasing circuit with the reference voltage signal observed at an output of the second biasing circuit. A controller is configured to determine the control signal related to the error signal and provide the control signal to the first biasing circuit and the second biasing circuit.

Abstract: In aspects of a low phase noise technique for use with a crystal oscillator, a bias control circuit sets a bias voltage on the gate of a first transistor needed to sink or source an amount of current corresponding to a sensed common mode signal. The sensed common mode signal is sensed with a common mode sense circuit that is coupled across two ports of the crystal oscillator, and current is provided by a current source. The bias voltage is set by a bias controller that uses a second transistor coupled to the common mode sense circuit and the first transistor.

Abstract: An oscillation circuit includes an oscillating section configured to output an oscillation signal, a first characteristic adjusting section including a first terminal, which is electrically connected to the oscillating section, and configured to adjust characteristics of the oscillation signal output by the oscillating section, a second characteristic adjusting section including a first terminal electrically connected to the oscillating section and configured to adjust the characteristics of the oscillation signal output by the oscillating section, and a voltage applying section (a first voltage applying section) configured to apply a first voltage to the first terminal of the first characteristic adjusting section and the first terminal of the second characteristic adjusting section and apply a second voltage, which is different from the first voltage and changes in association with the first voltage, to a second terminal of the first characteristic adjusting section.

Abstract: Certain aspects of the present disclosure generally relate to automatic amplitude control of an oscillating signal output from a voltage-controlled oscillator (VCO) using feedback from an amplitude adjustment circuit. The VCO may comprise cross-coupled metal oxide semiconductor (MOS) transistors coupled to a resonant tank circuit. Gates of the cross-coupled transistors are configured to control an amplitude of the oscillating signal generated by the resonant tank circuit. In certain aspects, the amplitude adjustment circuit may comprise a peak detector that generates a signal that is representative of the amplitude of the oscillating signal. The signal generated by the peak detector may be compared to a reference voltage by an amplifier. The amplifier may generate a feedback signal to control the gates of the cross-coupled MOS transistors based on the comparison, thereby adjusting the amplitude of the oscillating signal.

Abstract: A rectification circuit includes a first field-effect transistor and a bias voltage generation circuit. The field-effect transistor includes a first gate terminal, a first source terminal, a first source region having a first p-type diffusion layer and connected to the first source terminal, a first drain terminal, and a first drain region having a first n-type diffusion layer and connected to the first drain terminal. The bias voltage generation circuit is configured to apply a DC voltage between the first gate terminal and the first drain terminal.

Abstract: The present invention is directed to solve a problem that, in a semiconductor device capable of generating a clock signal by coupling a quartz oscillator to an external terminal to which an I/O port is coupled, leak current of the I/O port which is in the inactive state disturbs activation of a clock. The semiconductor device has a first terminal, an amplification circuit coupled to the first terminal, and an output buffer whose output terminal is coupled to the first terminal. The output buffer has first and second transistors of a first conduction type coupled in series via a first node between a first power supply line and an output terminal, and the conduction states of the first and second transistors of the first conduction state are controlled in response to a first control signal which is applied commonly to the gate of each of the first and second transistors.

Abstract: A device comprises a radio frequency peak detector configured to receive an ac signal from a voltage controlled oscillator and generate a dc value proportional to the ac signal at an output of the radio frequency peak detector and a feedback control unit coupled between an output of the radio frequency peak detector and an input of the voltage controlled oscillator.

Abstract: Systems and techniques are disclosed for configuring a circuit containing a one-pin crystal oscillator in connection with a general-purpose input/output (GPIO) pad. The GPIO pad may be connected to on-chip circuitry such as a one-pin crystal oscillator circuit and input and output buffers. The techniques disclosed herein utilize the GPIO pad such that the GPIO pad can be used as the crystal pin for a one-pin crystal oscillator circuit, or the GPIO pad can be used as a general input or general output. If the GPIO pad is operated as a general output, an on-chip signal can be driven to off-chip components, such as instrumentation, other integrated circuits, etc. If the GPIO pad is operated as a general input, external signals can be driven to on-chip components, such as clock buffers, counters, etc.

Abstract: The method concerns the reliable start-up of a crystal oscillator where the drive levels the crystal is subjected to are kept low in order to avoid over-driving the crystal. After applying a start-up value of a parameter controlling the drive level where the drive level associated with the start-up value is rather high such that reliable start-up is ensured the parameter is modified step-wise so as to reduce the drive level until the crystal oscillator ceases to operate regularly. To assess whether this is the case, the frequency of the crystal oscillator is compared with the frequency of an auxiliary oscillator. A safety margin is added to the parameter and the result stored in a non-volatile memory as an operating value. The crystal oscillator is then restarted with the start-up value and after a delay the operating value is applied.

Abstract: The present invention is directed to solve a problem that, in a semiconductor device capable of generating a clock signal by coupling a quartz oscillator to an external terminal to which an I/O port is coupled, leak current of the I/O port which is in the inactive state disturbs activation of a clock. The semiconductor device has a first terminal, an amplification circuit coupled to the first terminal, and an output buffer whose output terminal is coupled to the first terminal. The output buffer has first and second transistors of a first conduction type coupled in series via a first node between a first power supply line and an output terminal, and the conduction states of the first and second transistors of the first conduction state are controlled in response to a first control signal which is applied commonly to the gate of each of the first and second transistors.

Abstract: A self-powered power crystal oscillator XO includes a crystal unit and a power injection module. The crystal unit is arranged to oscillate to generate an oscillation signal. The power injection module is coupled to the crystal unit, and is arranged to intermittently inject energy to the crystal unit.

Abstract: A buffering circuit for buffering an oscillator signal. The buffering circuit includes a plurality of PMOS and NMOS transistor pairs connected in parallel, each pair having connected gate terminals and connected drain terminals forming an inverter circuit, each pair arranged for receiving via a direct coupling an oscillator signal at its gate terminal, and each pair further being connected with an additional PMOS and NMOS transistor.

Abstract: The present invention provides an automatic amplitude control circuit, including an oscillator, a collecting module, a first analog current generating module, a second analog current generating module, and a numerical control current generating module. According to this automatic amplitude control circuit, a low-noise numerical control bias current can be provided for the oscillator.

Abstract: An oscillator/amplifier has a gain controlled amplifier that maintains a desired oscillation waveform amplitude for all possible oscillation frequencies of operation. A peak detector produces a direct current (DC) voltage proportional to the oscillation waveform, and a voltage reference generator provides a reference voltage that is compared against the DC voltage from the peak detector. When the DC voltage is less than the reference voltage the gain of the amplifier is increased, and when the DC voltage is equal to or greater than the reference voltage the gain of the amplifier is decreased. A programmable voltage reference generator may also be used to provide for selection of different oscillation waveform amplitudes. A digital control loop controls the oscillation waveform amplitude over the entire possible frequency range of operation. Various frequency determining elements, e.g., crystal, piezoelectric resonator, inductor-capacitor tuned circuit, resistor-capacitor network, etc.

Abstract: An apparatus includes a microelectromechanical system (MEMS) device configured as part of an oscillator. The MEMS device includes a mass suspended from a substrate of the MEMS, a first electrode configured to provide a first signal based on a displacement of the mass, and a second electrode configured to receive a second signal based on the first signal. The apparatus includes an amplifier coupled to the first electrode and a first node. The amplifier is configured to generate an output signal, the output signal being based on the first signal and a first gain. The apparatus includes an attenuator configured to attenuate the output signal based on a second gain and provide as the second signal an attenuated version of the output signal.

Abstract: The semiconductor integrated circuit includes an inverting amplifier that generates an oscillation signal with an input connected to the first terminal and an output connected to the second terminal, the inverting amplifier fluctuating in gain in response to a gain control signal. The semiconductor integrated circuit includes a waveform shaping circuit that shapes a waveform of the oscillation signal and outputs a clock signal to a clock signal output terminal. The semiconductor integrated circuit includes an edge detecting circuit that detects an edge of the clock signal and outputs the gain control signal at a time of the edge.

Abstract: A power management apparatus and method for maintaining a substantially constant duty cycle of a reference clock signal in a multi-power oscillator, includes a first output power transistor in electrical parallel with a series arrangement of a second output power transistor and a switch, and a crystal oscillator capacitively coupled to a common gate of the first and second output power transistors, wherein a level of the reference clock signal power output is a normal power level when the switch is open and the level of the reference clock signal power output is a higher power level when the switch is closed to operate the second output power transistor in parallel with the first output power transistor.

Abstract: An improved local oscillator (LO) driver circuit for a mixer, the LO driver circuit includes a gain circuit responsive to LO input signals at a predetermined LO frequency range. At least a first pair of a parallel combination of a resistor and a capacitor is coupled to the gain circuit and to LO inputs of the mixer. The resistor configured to increase impedance at low frequencies of the frequency range and the capacitor is configured to reduce the impedance of the first parallel combination at high frequencies of the frequency range to reduce resistive impendence of the resistor. At least a second pair of a parallel combination of a low quality factor inductor and a high quality factor inductor is connected to the first pair. The second pair in serial combination with the first pair is tuned to provide a constant desired load impedance and a constant desired voltage swing at the LO inputs of the mixer over the predetermined LO frequency range.

Abstract: A bridge-stabilized oscillator with feedback control includes an RF amplifier connected to a first bridge path and a second bridge path. Each first and second bridge path has a variable gain amplifier to receive and modify the respective signals to maintain the resistance of a resistor in the first bridge path, so the resonator in the second bridge path oscillates. A power detector provides a control signal to each of the variable gain amplifiers to maintain the phase of the output with respect to the input and constrain the gain in each of the first and second bridge paths.

Abstract: Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values.

Abstract: Disclosed is a voltage controlled oscillator which includes a first transistor in which a first terminal is connected to a first power supply, a body is connected to a gate, and a first output signal is output through a second terminal; a second transistor that is cross-coupled to the first transistor in such a manner that a first terminal is connected to the first power supply, a body connected to the second terminal of the first transistor is connected to a gate, and a second terminal is connected to the body of the first transistor, and that outputs a second output signal having an opposite phase to that of the first output signal through the second terminal; and a resonance filter in which a first terminal is connected to the second terminal of the first transistor and a second terminal is connected to the second terminal of the second transistor.