Abstract: A nonlinear oscillator method and apparatus. According to one embodiment, a nonlinear oscillator is closed. The nonlinear oscillator includes a first linear amplifier, a second linear amplifier and nonlinear amplifier having a substantially similar design that includes an adjustable linear transconductance region width. The input/output characteristics of the nonlinear oscillator can be represented by van der Pol equations. In another embodiment, a method for providing nonlinear oscillations is disclosed.

Abstract: A fast start up oscillator. The fast start-up oscillator includes a power-on-reset detect circuit, a bandgap circuit, a voltage detect circuit, a RC-oscillator, and a count two circuit. The fast start-up oscillator is provided with a fast stabilized voltage source to ensure oscillation accurate and quickly such that the system is woken up.

Abstract: A quadrature coupled controlled oscillator comprising a first and a second circuit module, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103). The first circuit module is coupled with the second circuit module and the second circuit module is cross coupled with the first circuit module. Each of the circuit modules (100 and 100′) comprises a first and a second Voltage Controlled Current Source (101) (VCCS). In each of the circuit modules, each VCCS is coupled to a phase shifter (102) for shifting the phase of a current (110) supplied by the VCCS to a resonator (104) included in that circuit module. A communication arrangement (300) for communicating via a bi-directional communication channel (304), comprises an oscillator (303) as described above for generating a periodic signal. A receiving module (301) generates an output signal from the periodic signal and a receiving signal received from the channel (304).

Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.

Abstract: The invention relates to a new family of differential oscillators based on oscillator amplifiers with local feedback forming respective local feedback systems, and at least one common link interconnecting the local feedback systems. Each branch of the differential oscillator includes an oscillator amplifier with a phase shifting and impedance transforming local feedback path from the output to the input of the amplifier to form a local feedback system. The differential oscillator also includes one or more common phase shifting links for interconnecting and cooperating with the local feedback systems to enable self-sustained differential oscillation. In differential mode operation, the electrical midpoint of the common phase shifting link(s) is virtually grounded and the local feedback systems of the two branches operate, together with the common phase shifting link(s), effectively in anti-phase with respect to each other as two separate oscillators.

Abstract: A quadrature ring oscillator for high clock-rate applications is disclosed. A quadrature LC ring oscillator may use two stages of LC oscillators and variable mixers to provide consistent oscillation even at high clock rates. One stage of the quadrature ring oscillator comprises a first resonating element having an input and an output, and a first variable summer having L and P inputs and an output, with its L input being connected to the output of the first resonating element. The output of the first variable summer is connected to the input of the first resonating element The first variable summer may generate its output at a first phase by combining the L and P inputs. A second stage of the LC ring oscillator comprises a second resonating element, which has an input and an output, with its output being connected to the P input of the first variable summer. An inverter is used to produce an inverted signal of the output of the first resonating element.

Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.

Abstract: A voltage controlled oscillator is provided. The oscillator includes a surface acoustic wave element for forming a feedback circuit for an amplifier, and a phase adjustment circuit including a filter which is interposed in the feedback circuit. The oscillator also has a phase shifter including a hybrid coupler to which an additional control part is attached for changing a phase value within an oscillation loop with a control voltage supplied from an external source. An equal power divider equally distributes output power within the oscillation loop and supplies the output power outside the oscillation loop. A multi-layer board is used for mounting the amplifier, surface acoustic wave element, phase adjustment circuit, phase shifter, and equal power divider in at least two separate layers.

Abstract: The present invention proposes a new way of improving the phase stability and frequency selectivity of a phase shift oscillator (100). By introducing a filter-order enhancing feedback loop (124) in association with a phase shift filter (122) in the oscillator, higher-order phase shift filtering can be achieved without using inductive elements as in conventional higher-order LC phase shift filters. This is a great advantage, since a high Q-value can be obtained without limited by the relatively high internal losses of inductive elements (L).

Abstract: An injection-locked high-frequency oscillator has an annular transmission line, and m (m>1) units of oscillating amplifiers, and is provided with an oscillation closed loop formed with the transmission line and the oscillating amplifiers, the oscillating frequency thereof being determined by an electric length of line of the oscillation closed loop. When n≧1 is defined, and when the wavelength corresponding to the oscillating frequency is defined as &lgr;, the electric line length from any one oscillating amplifier to the neighboring oscillating amplifier is set to be n&lgr; by taking delay time due to the oscillating amplifiers into consideration, and further into in-phase points on the oscillation closed loop, synchronizing signals having, respectively, a frequency that is 1/mn of the oscillating frequency are injected.

Abstract: A power supply voltage-independent and temperature-independent RC oscillator using a controllable Schmitt trigger comprises a transition voltage generator circuit, a Schmitt trigger circuit, an RC delay circuit, and a quantizer. The transition voltage generator circuit generates a high transition voltage and a low transition voltage. The high and low transition voltages are proportional to a power supply voltage. The Schmitt trigger circuit generates an output voltage having a first level when an input voltage becomes greater than the high transition voltage and having a second level when the input voltage becomes less than the low transition voltage. The RC delay circuit comprises a resistor and a capacitor and generates the input voltage in response to the output voltage. The quantizer quantizes the input voltage to output a square-wave oscillation signal. Accordingly, an oscillation signal having a stable oscillation frequency unaffected by the external conditions can be obtained.

Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.

Abstract: An oscillator (100, 200) and a method of adjusting the frequency of oscillation of the oscillator (100, 200) are disclosed for generating a signal with an adjustable frequency in a frequency range from 1 GHZ to 200 GHz. The oscillator (100, 200) includes a loop circuit The loop circuit has an amplifier (101), a delay element or filter (103), a phase shifter (102), a device for adjusting the phase shifter (102), and a coupler (104) to provide an output signal. The adjusting device is coupled to the phase shifter (102).

Abstract: An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in a pulse generator to have an input pulse duration less than or equal to that of the oscillating signal. The oscillator circuit may be used as a filter to filter pulse width variations or to filter jitter from a reference clock. The oscillator circuit may also serve as a buffer by amplifying the input signal. Phase interpolation can be obtained by coupling at least one input signal with at least one oscillating signal.

Abstract: A multiphase voltage controlled oscillator (e.g., a quadrature VCO) 100, which includes multiple voltage controllable transconductance phase drivers 102, 104, 106 and 108. The output of each voltage controllable transconductance phase driver 102, 104, 106, 108 supplies one of 4 oscillator phases and receives 2 of the 4 phases as inputs. Each of the voltage controllable transconductance phase drivers 102, 104, 106 and 108 corresponds to a pair of controllable transconductance inverting amplifiers 132, 134, 136, 138. The controllable transconductance inverting amplifiers may be a simple inverter 150 that includes N-type FET (NFET) 152 and P-type FET (PFET) 154. Transconductance is controlled in the simple inverter by raising or lowering supply voltage (Vdd) levels. A more complex controllable transconductance inverting amplifier may be used, replacing PFET 154 with series connected PFETs 164, 166. The gate of one PFET 166 is controlled by a bias control voltage VCON.

Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.

Abstract: A CR oscillation circuit includes an oscillation unit having first through third invertion circuits connected in series between a first node and a second node, a capacitance element provided between the first node and an output terminal of the second inverting circuit, and a switch part for electrically connecting the first and second nodes according to a level of a control voltage; a constant current unit for allowing a constant current to flow according to a resistance value of an externally-provided resistive element to thereby supply a constant voltage; and a level conversion unit for converting a level of the constant voltage to thereby produce the control voltage.

Abstract: A regulated voltage supply circuit having improved power supply rejection ratio is achieved. The circuit comprises, first, a voltage follower having an input, an output, and a power supply voltage. The input is coupled to a reference voltage. The output comprises the regulated voltage supply. Second, a means of compensating noise on the power supply voltage comprises phase shifting the power supply voltage 180 degrees and feeding back the phase shifted power supply voltage to the voltage follower input to thereby improve power supply rejection ratio. The means of compensating noise may comprise an adjustable gain. This adjustable gain may further comprise an adjustable value resistance. The adjustable gain is used in a to optimize the PSRR by testing comprising modulating noise on the power supply voltage, measuring the noise on the regulated voltage supply, and adjusting the gain.

Abstract: The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator circuit further comprises an output capacitor, wherein a voltage at a node of the capacitor comprises the output voltage of the oscillator circuit, and the oscillator circuit also comprises a selectively trimmable charge/discharge circuit coupled between the comparator circuit and the output capacitor. The charge/discharge circuit is operable to charge or discharge the output capacitor based on the control signal, wherein a rate of charge or discharge is dictated by one or more user selectable control signals. Thus an oscillation frequency of the oscillator circuit may be trimmed.

Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.

Abstract: A resistor-capacitor oscillator for receiving a current source, comprising a first switch path and a second switch path that are symmetric and connected in parallel. The first switch path comprises a signal output terminal and a first voltage output terminal. The second switch path comprises a complementary signal output terminal and the second voltage output terminal. One of these two voltage output terminals is selected randomly and input to both the first comparator and the second comparator simultaneously. The first comparator further receives a {fraction (1/2 )} VBG voltage, and the second comparator further receives 2VBG voltage. The first comparator outputs to a PMOS transistor, and the second comparator outputs to an NMOS transistor. The PMOS transistor is in series with the NMOS transistor, and is jointly coupled in between the system power supply and the ground voltage. Moreover, a latch and an inverter are serially coupled to the location of the serial junction node of these two transistors.

Abstract: Structures and methods for CMOS voltage controlled phase shift oscillators are provided. The CMOS voltage controlled phase shift oscillators, or phase shift circuit, includes any odd number of stages coupled in series. Each stage includes a CMOS amplifier. A phase shift network is coupled to the CMOS amplifier. The CMOS amplifier provides a gain and allows a small phase shift in each stage to eventually provide a signal which is 180 degrees out of phase with the input signal. In the CMOS amplifier, the PMOS transistor is a diode connected PMOS transistor which acts as a low valued load resistance. In the phase shift network, an NMOS transistor is used as a voltage variable resistor for providing a resistance value in the circuit.

Abstract: Structures and methods for CMOS voltage controlled phase shift oscillators are provided. The CMOS voltage controlled phase shift oscillators, or phase shift circuit, includes any odd number of stages coupled in series. Each stage includes a CMOS amplifier. A phase shift network is coupled to the CMOS amplifier. The CMOS amplifier provides a gain and allows a small phase shift in each stage to eventually provide a signal which is 180 degrees out of phase with the input signal. In the CMOS amplifier, the PMOS transistor is a diode connected PMOS transistor which acts as a low valued load resistance. In the phase shift network, an NMOS transistor is used as a voltage variable resistor for providing a resistance value in the circuit.

Abstract: An RF power oscillator for contactless card antennas shapes a carrier signal at the operating frequency utilizing a delay circuit having a number of taps for delaying the carrier signal by different lengths of time. The delayed signals are input into a buffer and output through resistors to a node coupled to the antenna. The resulting waveform for a square wave input signal, and equal-length delay taps, is a trapezoidal wave output. Any input wave form can be shaped in a variety of ways depending upon the combinations of delay taps used. Since the buffer drivers for each delayed wave switch state at slightly different times, the amplitude and bandwidth of emitted electromagnetic interference (EMI) is reduced for the transmission circuit.

Abstract: A quadrature output oscillator device (22) includes a first voltage controlled oscillator (40) and a second voltage controlled oscillator (44). The second voltage controlled oscillator (44) generates a first output (C) and a second output (D) to drive a first amplifier (42). The second output (D) of the second voltage controlled oscillator (44) is a quadrature-phase signal component output (Q) of the quadrature output oscillator device (22). The first voltage controlled oscillator (40) generates a first output (A) and a second output (B) to drive a second amplifier (46). The second output (B) of the first voltage controlled oscillator (40) is an in-phase signal component output (I) of the quadrature output oscillator device (22). The first amplifier (42) generates feedback signals for the first output (A) and the second output (B) of the first voltage controlled oscillator (40).

Abstract: An oscillator controls the frequency of an output clock signal in response to detecting an error in the frequency of an input clock signal. The oscillator includes an inverter operable to generate a voltage signal and a resonator coupled to the inverter operable to introduce a phase shift in the voltage signal. The oscillator also includes a variable resistor positioned across a feedback path of the inverter and operable to introduce a further phase shift in the voltage signal in response to the detected error. The resonator is further operable to adjust the frequency of the voltage signal in response to the introduced further phase shift. The voltage signal is used as the output clock signal.

Abstract: A quadrature oscillator for generating quadrature and differential double-frequency signals is disclosed. This oscillator is formed by PMOS and NMOS transistors, complementary devices, etc. The circuit is designed by using the differential circuit structures, two LC tanks and the technology of current reuse. As the current pass through most devices and selectively coupling the specific terminals, therefore, it has advantages of less area requirement in circuit design, low power dissipation and low phase noise of output.

Abstract: A microwave oscillator includes a transistor for oscillation, an insulating substrate on which the transistor is mounted, a first strip conductor which is attached to the insulating substrate and which has one end connected to the output terminal of the transistor, and a second strip conductor which is attached to the insulating substrate and which has one end connected to input terminal of the transistor. The microwave oscillator further includes a TE01-mode dielectric resonator which couples with the first strip conductor and the second strip conductor, and a varactor diode. The varactor diode has one end connected to the other end of the first strip conductor or the other end of the second strip conductor, and the other end is RF-grounded, such that the capacitance of the varactor diode can be changed.

Abstract: An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in a pulse generator to have an input pulse duration less than or equal to that of the oscillating signal. The oscillator circuit may be used as a filter to filter pulse width variations or to filter jitter from a reference clock. The oscillator circuit may also serve as a buffer by amplifying the input signal. Phase interpolation can be obtained by coupling at least one input signal with at least one oscillating signal.

Abstract: Provided are a first RC oscillator (10) including a resistance and capacitor, a counter (20) for counting the number of source oscillation clocks from the first RC oscillator (10), a frequency setting register (30) for setting the number of source oscillation clocks in accordance with a desired oscillation frequency, and a comparator for comparing between a count value of the counter (20) and a set value of the frequency setting register (30). A clock is outputted depending upon a result of comparison by the comparator.

Abstract: Method and circuitry for implementing an inductor-capacitor voltage-controlled oscillator with improved overall performance. In an exemplary embodiment, the present invention includes two phase shifters and an interpolator. The two phase shifters are coupled to the interpolator in a loop configuration. That is, output from the two phase shifters are fed into the interpolator. The output of the interpolator, in turn, is fed back to the two phase shifters. The two phase shifters and the interpolator respectively utilize LC tanks having different fixed resonant frequencies, with the first phase shifter resonant frequency being the lowest, the interpolator resonant frequency being in the middle and the second phase shifter resonant frequency being the highest. Signals from the first and second phase shifters are selectively combined by the interpolator according to a control signal. Thus, the VCO can be continuously tuned near the resonant frequency of the interpolator.

Abstract: An integrated circuit chip includes an RC oscillator circuit. The frequency of the output signal generated by the oscillator output signal is set as a function of a value of an included internal resistor integrated on the chip. An external resistor may be connected to the chip to allow a user to manipulate the oscillator output signal frequency. A detection circuit on the chip detects the presence of the connected external resistor. Responsive to that detection, a substitution circuit operates to substitute the connected external resistor for the internal resistor in the RC oscillator circuit. This effectuates a change of the frequency of the oscillator output signal to instead be set as a function of a value of that connected external resistor.

Abstract: A light clock measures time by having a light pulse source initiating a light pulse which travels a preset distance in an open or closed loop. A counter is increases incrementally upon detection of the light pulse by a light pulse detector. Each increment is a time interval, which is determined by the preset distance divided by the speed of the light pulse. If the loop is an open loop, another light pulse may be initiated upon detection of the previous light pulse. If the loop is a closed loop, no further light pulse initiation beyond the initial light pulse is required, but, when necessary, a light pulse amplifier is used to amplify the light pulse for the next cycle around the closed loop in the light pulse transmission device.

Abstract: A delay-time variable filter delays an input signal by a desired time according to a control signal from a control input node and outputs the delayed input signal, and a positive feedback loop circuit changes the output signal (sinusoidal wave signal) from this filter, and provides a positive feedback of the binary pulse signal to the input side of the filter at a desired level for carrying out an oscillation. This positive feedback loop circuit includes a circuit for changing the signal into a binary signal and providing a positive feedback of the binary signal to the input of the filter by limiting the signal at a desired amplitude. As the delay-time variable filter, a quartic Butterworth low-pass filter is used, for example. As the positive feedback loop circuit, there is used a voltage comparator circuit that changes an input signal into a binary signal and outputs a pulse signal of a desired amplitude.

Abstract: A universal frequency translation module (UFT) frequency translates an electromagnetic (EM) input signal by sampling the EM input signal according to a periodic control signal (also called an aliasing signal). By controlling the relative sampling time, the UFT module implements a relative phase shift during frequency translation. In other words, a relative phase shift can be introduced in the output signal by sampling the input signal at one point in time relative to another point in time. As such, the UFT module can be configured as an integrated frequency translator and phase-shifter. This includes the UFT module as an integrated down-converter and phase shifter, and the UFT module as an integrated up-converter and phase shifter. Applications of universal frequency translation and phase shifting include phased array antennas that utilize integrated frequency translation and phase shifting technology to steer the one or more main beams of the phased array antenna.

Abstract: A single stage voltage controlled ring oscillator includes a trans-admittance voltage-to-current circuit coupled to a trans-impedance voltage-to-current circuit. The output of the trans-impedance circuit is connected to the input of the trans-admittance circuit. The trans-admittance and trans-impedance circuit are preferably conjugately matched and may be coupled to each other via one or more transmission lines, the length of which can be selected to set a desired nominal oscillation frequency. The trans-impedance and trans-admittance circuits may also include voltage-controllable components which can be adjusted to tune the oscillation frequency.

Abstract: In a semiconductor integrated circuit, a selector 1 selects a signal FB at the input thereof by giving a proper level to a signal EN. By setting two-phase scan clocks SC1, SC2 of F/F 2,4 so that F/F 2,4 are set to the through state, a signal can be passed from F/F 2 to F/F 4 under a through state in the above circuit. Further, there can be fabricated a critical path-ring oscillator which is self-oscillated in the critical path by negatively feeding back the output of F/F 4 to F/F 2 through the signal FB. The logic in the ring is required to be an inverted logic. In a test other than a speed screening test or at the normal operation time, a proper level is given to the signal EN so that the selector 1 is switched to select the input side, thereby cutting a negative feedback path through which the output of F/F 4 is negatively fed back to F/F2.

Abstract: A phase interpolation voltage controlled oscillator (VCO). In one embodiment, the VCO is a multiple phase interpolation VCO. The multiple phase interpolation VCO includes a plurality of phase shifting cells each receiving an oscillating signal, and each phase shifting the oscillation signal a different amount. Summing cells receive the phase shifted oscillating signals and combine the signals to determine an output oscillating signal. In one embodiment, further summing cells receive the output of other summing cells to determine the output oscillating signal.

Abstract: A gyrator includes shunt or feedback nodal capacitors and shunt lossy inductors without shunt load resistors. The effective nodal capacitance is reduced by the introduction of the shunt lossy inductors. The inductors act to discriminate against injected power supply noise, resulting in improved oscillator phase noise. The inductors produce less dc voltage drop than the resistive load, so that larger linear oscillation is obtained with improved oscillator phase noise. The gyrator includes an automatic gain control circuit and a tuning control circuit which are separate from each other and fast and slow acting control loops which are augmented with each other.

Abstract: An oscillator having a feedback loop circuit formed by two transductors and one amplifier, and two capacitors respectively connected to the outputs of these transconductors. The transconductors and the amplifier are constructed by common-source configuration transistors to which common bias current is supplied. Since they have invert characteristics for the input voltage, the feedback loop is also self-biased by means of negative feedback operation. The oscillation signal is outputted from an arbitrary position on the feedback loop of the oscillator. According to the oscillator as constituted, the oscillation frequency can be controlled in a wide range by varying the bias current to the common-source transistors.

Abstract: An oscillation device includes a buffer device, a feedback device for feeding back an output of the buffer device to an input thereof and a charging device and a discharging device connected to the input of the buffer device. The charging device includes a first switching device that is turned on and off based on the output of the buffer device and a first current control device that controls the current flowing into the input of the buffer device through the first switching device. The discharging device includes a second switching device that is turned on or off based on the output of the buffer device and a second current control device that controls the current flowing out of the input of the buffer device through the second switching device. The first and second switching devices include first and second transistors and the first and second current sources that include third and fourth transistors.

Abstract: An oscillator circuit constituted by connecting in a ring an odd number of stages of inverting delay circuits comprising inverting elements, for example, inverters INV1, INV2, and INV3, and delay elements D1, D2, and D3 connected to the output terminals of the inverting elements. In each delay element, the capacitor is charged and discharged in accordance with the output signal level from the inverter, the voltage of the capacitor and the reference voltage are compared by a comparison circuit, and a signal in accordance with the result of comparison is input to the inverting delay circuit of the next stage, therefore the delay time can be controlled by controlling the charging current of the delay element and the oscillation frequency can be controlled in accordance with this. Accordingly, the control property thereof is good, the range of variation can be broadened, and a reduction of jitter can be realized.

Abstract: A gyrator includes shunt or feedback nodal capacitors and shunt lossy inductors without shunt load resistors. The effective nodal capacitance is reduced by the introduction of the shunt lossy inductors. The inductors act to discriminate against injected power supply noise, resulting in improved oscillator phase noise. The inductors produces less drop dc voltage than the resistive load, so that larger linear oscillation is obtained with improved oscillator phase noise.

Abstract: A quadrature oscillator based on two cross-coupled gm/C cells utilizes the inherent nonlinearity of positive and negative impedance cells to control the amplitude of oscillation, thereby simplifying the oscillator and eliminating the need for an outer control loop. The oscillator includes a pair of cross-coupled gm/C stages. A negative impedance cell is coupled to each gm/C cell for assuring proper start-up and enhancing the amplitude of oscillation. A positive impedance cell is also coupled to each gm/C cell to dampen the amplitude of oscillation. The transconductance of each impedance cell varies in response to the bias current provided to the cell. Thus, by controlling the bias currents through the cells, the negative and positive impedances seen by each gm/C cell can made to cancel at the desired oscillation amplitude, so that the circuit oscillates without any damping or enhancement.

Abstract: A high-performance voltage controlled oscillator without use of variable capacitance (varicap) diodes which is easy in fabrication in an semiconductor IC form. The voltage controlled oscillator includes:a differential amplifier having a differential pair of transistors (Q.sub.1, Q.sub.2); an LC resonance circuit having a coil (L.sub.0) and a capacitor (C.sub.0); a phase shift circuit for receiving a differential output of the differential amplifier via a buffer of transistors (Q.sub.3, Q.sub.4) and for providing its output for the differential amplifier in a positive feedback mode; and a current control circuit for variably controlling an operating current (Ie) of the phase shift circuit according to a controlled voltage applied from a circuit other than those in the voltage controlled oscillator.

Abstract: The compact voltage controlled ring oscillator includes two variable delay gates (VDGs). Each input port of one variable delay gate is connected to the output port of the other variable delay gate to form a feedback loop. A control interface receives an input voltage control signal (VCON), and generates a limited and buffered voltage control signal VX, which is provided to each of the VDGs to generate VDG bias currents which are limited and monotonic with VCON. Each VDG comprises a fixed bias differential transconductance gain stage (GM1), a variable bias differential transconductance hysteresis feedback stage (GM2), and a variable bias voltage follower stage. The combination of delay control from variable hysteresis and variable voltage follower output resistance provides a compact, low power ring oscillator VCO, with over an octave of tuning range.

Abstract: Various circuit techniques to implement continuous-time filters with improved performance are disclosed. The present invention uses RMC type integrators that exhibit lower harmonic distortion. In one embodiment, a novel high-gain two-pole operational amplifier is used along with RMC architecture to achieve lower harmonic distortion. In another embodiment, the present invention uses dummy polysilicon resistors to accurately compensate for the distributed parasitics of the polysilicon resistors used in RMC integrator. In yet another embodiment, the present invention provides an on-chip tuner with a differential architecture for better noise immunity.

Abstract: An oscillation circuit of phase-shift type includes a surface acoustic wave filter in a feedback circuit, the surface acoustic wave filter having first and second one-port surface acoustic wave resonators of different resonance frequencies connected in a ladder configuration. The oscillation circuit has a high C/N ratio with a large bandwidth of variable frequency and can be fabricated in a small size with low costs.

Abstract: A voltage controlled oscillator circuit comprises a first lowpass OTA-C filter with differential input and differential output and a second lowpass OTA-C filter with differential input and differential output. A non-inverted output terminal of the first OTA-C filter is connected with a non-inverted input terminal of the second OTA-C filter, an inverted output terminal of the first OTA-C filter is connected with an inverted input terminal of the second OTA-C filter, a non-inverted output terminal of the second OTA-C filter is connected with an inverted input terminal of the first OTA-C filter, and an inverted output terminal of the second OTA-C filter is connected with a non-inverted input terminal of the first OTA-C filter. Gate widths of input terminals of OTAs in each OTA-C filter are set appropriately, and initial values of terminals are set by nMOSFETs 3-6, and oscillation output is outputted from the non-inverted output terminal and the inverted output terminal of the second OTA-C filter.

Abstract: A capacitor (200) having an actual physical capacitance value of Cact and is coupled to an oscillator (36). The oscillation frequency of the oscillator (36) can be changed by changing the effective capacitance of the capacitor (200). The actual capacitance (Cact) of capacitor (200) can be altered to appear to be any effective capacitance (Ceff) between zero and a value much greater than Cact by using a Miller effect. In order to alter the effective capacitance of the capacitor (200), a representation of the output osculation signal (16) is provided to a frequency adjust stage (22). The frequency adjust stage either passed the signal (16) with 0.degree. phase shift or with 180.degree. phase shift. In addition to shifting the phase, the stage (22) will amplify or attenuate the signal (16) to result in the phase shifted and amplified/attenuated frequency adjusting signal (24).