Abstract: An oscillator formed from low cost discrete semiconductors and passive devices creates a linear periodic ramp of constant frequency with ramp slope based on an external voltage signal. Parameters are stable over a wide range of temperatures and variations of transistor parameters that normally degrade in extreme environments. The oscillator period can be phase and frequency synchronized to an external clock source over a wide range of frequencies. The oscillator ramp generator phase can be synchronized on a cycle by cycle basis for incorporation in power converters employing spread spectral EMI reduction techniques, multi-converter systems employing clock interleaving for distribution bus filter optimization, and resonant mode converters employing zero voltage switching techniques. Oscillator ramp rate is independent of frequency and can be synchronized to DC (inhibit) for use in ultra low power burst mode power conversion.

Abstract: A control circuit controls first and second clock generator subcircuits so that one subcircuit of the first and second clock generator subcircuits operates for a comparison voltage generating interval, then another subcircuit operates for a clock generating interval, and so that the first and second clock generator subcircuits alternately repeat processes of the comparison voltage generating interval and the clock generating interval. For the comparison voltage generating interval, each of the first and second clock generator subcircuits is controlled to generate a comparison voltage and output the same voltage to an inverted output terminal of a comparator. For the clock generating interval, each of the first and second clock generator subcircuits compares an output voltage from a current-voltage converter circuit with the comparison voltage.

Abstract: An oscillator circuit includes a signal generator having a compensation frequency output node that provides a compensation frequency signal at the compensation frequency output node. A pulse generator having a pulsed signal output node and a pulse generator input node is coupled to the compensation frequency output node and converts the compensation frequency signal into a series of compensation binary pulses having a constant pulse duration regardless of variations in the duty cycle of the compensation binary pulses. An oscillator module having at least two capacitors, an oscillator output node and a pulsed signal input node is coupled to the pulsed signal output node, and provides an output signal that is at a frequency dependent on charging rates of the capacitors. Drift variations in the capacitors are offset by variations in a duty cycle of the compensation binary pulses supplied in order to maintain constant charging rates of the capacitors.

Abstract: This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops.

Abstract: In one embodiment, an oscillator circuit is configured to oscillate at a base frequency. The oscillator is configured to receive a synchronization signal and restart a period of the oscillator signal responsively to the synchronization signal.

Abstract: An oscillator structure has a sync signal processor with an input interface for an external clock based sync signal and an output interface for a duty cycle indication signal depending on a signal property of the sync signal and an oscillator with an input interface for the duty cycle indication signal and the sync signal and an output interface for an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal.

Abstract: A timing generator and method of developing drive signals which, when input sync signals are present, delivers the leading and trailing edges of the input pulses directly to a drive output and which generates a free-running signal when input sync pulses are not present.

Abstract: This invention relates to monostable and astable multivibrators in which the pulse width or frequency stability, respectively is increased by reducing the effect of the comparator input offset voltage. The reduction is accomplished by alternately reversing the input connections to the comparator.

Abstract: A minimum frequency synchronization discriminator for use in providing a clock signal for a switch mode power supply automatically detects when the frequency of a sync signal is above a minimum frequency and causes the sync signal to serve as the clock signal for the controller. If the frequency of the sync signal is below the minimum frequency, the minimum synchronization frequency discriminator causes the output signal of the internal oscillator to serve as the clock signal.

Abstract: An oscillator operated with an external power source or an external save power source is provided comprising: a clock signal generation unit for generating and outputting a clock signal; a power-on detection unit for detecting the power-on of the external power source; a power-off detection unit for detecting the power-off of the external power source; a running time count unit for counting the running time from a time of the power-on detection signal being input to a time of the power-off detection signal being input; storage means for storing accumulated running time up to a power-on time of the external power source; and a control unit for reading the running time at the time of the power-off detection signal being input, reading the accumulated running time from the storage means, adding the running time to the accumulated running time, and storing the addition result as a new accumulated running time in the storage means.

Abstract: A current controlled oscillator is described comprising: a latch comprising two logic inverters to maintain a switch state for a determined duration, the latch having two complementary output voltages; a differential switch pair comprising a first and a second switch controlled by the two complementary output voltages respectively to steer a control current to a first and a second node alternatively; a third and fourth switch driven on by a high level voltage at one of the first and second node to set and reset the latch; and a fifth and sixth switch controlled by the two complementary output voltages respectively to pull down voltages at the first and second node alternatively, wherein the first and fifth switch are controlled by a same control signal and the second and sixth switch are controlled by a same control signal; whereby the frequency of switching is a function of the capacitance of the first and second node and the control current.

Abstract: A resonator includes a resonating device and a selection circuit for selecting a resonance mode. The selection circuit is formed by a first-order oscillator which is provided with a synchronization input and whose output is connected to the excitation input of a resonator, the output of the resonator being connected to the synchronization input of the first-order oscillator in order to synchronize the oscillator and the output signal of the resonator being derived from the oscillator.

Abstract: An oscillation output generating circuit outputs a voltage V0 as an oscillation output, and a first comparing circuit compares V0 with a constant voltage V1, while a second comparing circuit compares V0 with a constant voltage V2 (<V1). In response to outputs from the first and second comparing circuits, a state maintaining circuit controls the raising/dropping of V0 through the oscillation output generating circuit. When a synchronizing pulse for synchronous oscillation is not inputted, self-advancing oscillation is started, and synchronous oscillation is started otherwise. When the synchronizing pulse is in an active state, a nullifying circuit inhibits transmission of an output from one of the first and second comparing circuits to the state maintaining circuit, whereas the nullifying circuit allows the above transmission when the synchronizing pulse is in an inactive state.

Abstract: A device for creating vibration within a chair which provides a therapeutic benefit to users. The chair has a control for adjusting the frequency of the vibrations and the amplitude of the vibrations, providing a wide variety of therapeutic results. The circuit powering the vibration sources within the chair employs a unique design that acts as a heat sink, effectively drawing heat away from the vibration sources and thus extending their useful life. The vibration sources may be incorporated into the seating furniture of vehicles such as automobiles or airplanes to provide relief from the strain associated with trips of extended duration. The structure has a sufficiently low profile to lend itself to placement in seating used in vehicles which have rather stringent dimensional requirements.

Abstract: A calibrated-weight balance for converting an electrical analog signal to a binary signal as applicable to flash-type analog-to-digital converters is composed of a bistable multivibrator having two transistors (15, 16) and two resistors (25, 26). In the reference channel (15, 25), a current I.sub.0 flows through a resistor (27) connected between drain and ground. In the measuring channel (16, 26), a transistor (17) is connected between a reference voltage (-V.sub.ref) and the drain of the measuring transistor (16). The input of the balance (V.sub.E) is the gate of the third transistor (17). The outputs (Q, Q) of the balance are the drains of the first and second transistors (15, 16). The resistor (26) for supplying the second transistor (16) constitutes the calibrated weight and permits the flow of a current which is a multiple of the current which flows through the resistor (27) of the reference channel.

Abstract: A system for stabilizing the output of a voltage-to-frequency (V/F) converter having an input terminal and an output terminal. The system comprises a single-shot having an input terminal and an output terminal. The output terminal of the V/F converter is coupled to the input terminal of the single-shot. An integrator comprising an operational amplifier is coupled in integrating amplifier configuration for coupling the output terminal of the single-shot to the input terminal of the V/F converter. The operational amplifier comprises a difference amplifier. The integrator includes a capacitor coupled between one of the input terminals of the difference amplifier and the output terminal of the difference amplifier. The output terminal of the difference amplifier is coupled to the input terminal of the V/F converter.

Abstract: An astable multivibrator that has an integrating network coupled from the output of one of the transistors for developing an operating potential. The operating potential is coupled to the RC timing networks that interconnect the two transistors such that when the transistors are switched by a horizontal sync pulse, the duty cycle is compensated.

Abstract: The voltage-controlled variable-frequency pulse oscillator in accordance with the present invention comprises an integrating capacitor, a variable current source for generating charging current for said integrating capacitor in response to the controlling voltage, a fixed current source for discharging said capacitor, a switching circuit for controlling the discharge of said capacitor, a comparator for outputting a discrimination signal by comparing the voltage of the capacitor and a reference voltage, and a multivibrator for receiving the discrimination signal from the comparator and for outputting a pulse signal with a frequency corresponding to the controlling voltage from the variable current source. The multivibrator comprises an R-S flip-flop for receiving the discrimination signal output by the comparator at its set side OR-NOR gates, and receiving and inverting the output of the reset side gate which is delayed by a prescribed time to the reset side OR-NOR gate.

Abstract: In the horizontal drive of a raster scanned video display, a free running astable multivibrator responsive to a synchronization input signal provides a horizontal output signal to horizontal deflection circuitry for synchronizing the video display's raster scan with the video information presented thereon. The astable multivibrator includes a pair of coupled transistors which are alternately rendered conductive in accordance with the time constant of a respective RC network associated with each transistor. To compensate for the temperature-dependent operation of the transistor pair which causes the multivibrator's operating frequency to increase with increasing temperature, a pair of back-to-back coupled diodes are connected to provide the synchronization input signal to one RC network so as to increase the charge on a capacitor within the network, the time constant of which is similarly increased. The temperature-dependent change in voltage across the diodes compensates for the change in V.sub.

Abstract: A tone generator for an electronic musical instrument is operable for producing a highly stable tone signal over an extended frequency range. The tone generator comprises a timing circuit defining first and second time intervals occurring in respective time succession after the occurrence of a transition of an input signal. A timing capacitor is charged during each second time interval and discharged during the time intervals occurring between the end and beginning of successive ones of the second time intervals. A feedback circuit is enabled during each of the first time intervals for coupling the timing capacitor for controlling the discharge rate so that a highly stable ramp output tone signal is produced.

Abstract: A horizontal oscillator for a CRT device runs at a rate higher than the line rate, and has a wide lock-in range. The horizontal sync signal is delayed in an adjustable monostable circuit and coupled to the oscillator for allowing a centering adjustment of one full line. The oscillator output signal is coupled through a discharge circuit for rapid discharge of the subsequent circuit in the CRT device as desired.

Abstract: A system for increasing synchronization signal injection to a free-running multivibrator in the horizontal drive circuit of a video display which enhances synchronization signal frequency capture range is disclosed. A reduction in synchronization input signal amplitude due to an input signal voltage cutoff threshold which reduces spurious multivibrator inputs is compensated for by coupling the multivibrator synchronization input signal to the emitter and collector of both of the multivibrator's coupled transistors.

Abstract: A pulse oscillator circuit comprises a first pulse oscillator, which may be in the form of a monostable multivibrator, that is capable of generating a first pulse. A second pulse oscillator, which may be in the form of an astable multivibrator, is operatively connected to the first pulse oscillator and is operated for the period for which the first pulse is present. The second pulse oscillator generates a second pulse of a pulse width that is narrower than the width of the first pulse.

Abstract: A digital oscillator with output frequency accurately changeable from one period to the next. A plurality of retriggerable monostable multivibrators having discretely different design pulse widths are OR'd to an output monostable multivibrator having the narrowest design pulse width. The plurality of monostable multivibrators are triggered in common by the OR'd outputs thereof such that the longest pulse width one thereof defines the period of the output monostable multivibrator. Logic enabling means permit selection of multivibrator outputs to be OR'd.