Abstract: A reference circuit, an oscillator architecture that includes the reference circuit and a method for operating the reference circuit are described. In one embodiment, the reference circuit includes a voltage reference generator configured to generate a reference voltage and a current reference generator configured to generate a reference current based on the reference voltage. The current reference generator includes a level shifter circuit configured to generate intermediate voltages based on the reference voltage, a first current reference circuit configured to generate intermediate currents based on the intermediate voltages, where the intermediate currents are correlated to the reference voltage, and a second current reference circuit configured to combine the intermediate currents to generate the reference current. Other embodiments are also described.

Abstract: A circuit arrangement includes a self-oscillating oscillator circuit electrically connected with a series arrangement of a resistor arranged in series with a capacitor. The series arrangement determines the oscillation frequency of the oscillator circuit. The oscillator circuit serves to supply an oscillating supply voltage to an electronic device that exhibits a resonant frequency. A control signal output of the electronic device has a resistive coupling to the series arrangement. The control signal output serves to supply a control signal representative of the oscillation mode of the electronic device.

Abstract: A power management system is disclosed. The system includes an oscillator interface for use in a power management system, a power recycle circuit for use in a power management system, a pad clock and self test for use in a power management system, a clock enable circuit for use in a power management system, a power level detect circuit for use in a power management system, an internal source clock generation circuit for use in a power management system, and a power-save mode change detection circuit for use in a power management system. The oscillator interface includes an interface circuit for interfacing with an external oscillator used as a source of oscillations. A clock stabilization filter masks out spurious crystal frequencies in the oscillations during start-up of the power management system following an enabling of a feedback loop. The clock stabilization filter has circuitry which provides that the oscillations will start with a rising transition after filtering.

Abstract: A power management system is disclosed. The system includes an oscillator interface for use in a power management system, a power recycle circuit for use in a power management system, a pad clock and self test for use in a power management system, a clock enable circuit for use in a power management system, a power level detect circuit for use in a power management system, an internal source clock generation circuit for use in a power management system, and a power-save mode change detection circuit for use in a power management system. The oscillator interface includes an interface circuit for interfacing with an external oscillator used as a source of oscillations. A clock stabilization filter masks out spurious crystal frequencies in the oscillations during start-up of the power management system following an enabling of a feedback loop. The clock stabilization filter has circuitry which provides that the oscillations will start with a rising transition after filtering.

Abstract: An improved oscillator circuit for avoiding core saturation without the need for auxiliary magnetic devices employs an emitter resistance for regulating base voltage, and a semiconductor base shunt for initiating transistor cut-off when the base voltage increases above the threshold voltage of the semiconductor shunt, the emitter resistance being preselected to activate the base shunt before the transformer core reaches saturation.