Amplitude Compensation Patents (Class 331/15)
  • Patent number: 9294063
    Abstract: A digital input circuit includes a series connection of a current limiter and a switch having a switch control input coupled between a signal input and ground, and a logic level shifter coupled to the signal input and having a switch control output coupled to the switch control input and a signal output, where a maximum amplitude at the signal input is greater than a maximum amplitude at the signal output. A digital input method includes coupling an input signal to ground with a current limiter by closing an electronic switch, providing an output signal responsive to the input signal, where a maximum amplitude of the input signal is greater than a maximum amplitude of the output signal, by latching the output signal while the input signal is above a threshold voltage and opening the electronic switch after the output signal is latched.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: March 22, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Anthony S. Partow, Pirooz Parvarandeh
  • Publication number: 20150145607
    Abstract: Various techniques for automatic amplitude control of an oscillator are described. An apparatus includes an oscillator circuit configured to generate an oscillating signal. The apparatus includes a feedback circuit configured to control a bias signal of the oscillator circuit to maintain a target peak amplitude of the oscillating signal based on a current-mode indicator of a peak amplitude of the oscillating signal and a reference current. The feedback loop includes a rectifier circuit configured to generate the current-mode indicator and a summing node configured to provide a bias control signal based on a difference between the current-mode indicator and the reference current. The feedback circuit may include a capacitor coupled to the summing node and configured to accumulate charge according to the difference. A magnitude of the current-mode indicator may be at least two orders of magnitude less than a magnitude of the current through an output node of the oscillator circuit.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: Silicon Laboratories Inc.
    Inventor: Aaron J. Caffee
  • Publication number: 20150130542
    Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.
    Type: Application
    Filed: September 17, 2014
    Publication date: May 14, 2015
    Inventors: Joon-Hee LEE, Jong-Won CHOI, Young-Taek LEE, Byung-Hak CHO, Young-Gun PU
  • Patent number: 8957735
    Abstract: According to one embodiment, a phase locked loop (PLL) circuit includes an application unit, a correlator, an integrator and a power supply noise canceller. The application unit applies the test signal to a power supply voltage. The correlator extracts a frequency error signal as a monitor signal and calculates a correlation value for the test signal and the monitor signal to generate a correlation signal. The integrator integrates the correlation signal to generate an integral signal. The power supply noise canceller provides a cancellation gain corresponding to the integral signal to the power supply voltage to which the test signal is applied, to generate a control signal.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akihide Sai
  • Publication number: 20140218118
    Abstract: A system is disclosed for a voltage controlled oscillator (“VCO”) having a large frequency range and a low gain. Passive or active circuitry is introduced between at least one VCO cell in the voltage controlled oscillator and the voltage source for the VCO cell which reduces a gain value for the VCO to maintain stability of the system.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Chih-Min LIU
  • Publication number: 20140176244
    Abstract: A voltage-controlled oscillator with high loop gain includes a first transistor, a second transistor, an inductor, a third transistor, a fourth transistor and a gain circuit. The gain circuit provides a high loop gain in the voltage-controlled oscillator, which operates at wider tuning range but with low power consumption due to capacitance value provided by transistors thereof.
    Type: Application
    Filed: September 12, 2013
    Publication date: June 26, 2014
    Applicant: Quadlink Technology, Ltd.
    Inventor: Ching-Lung Ti
  • Publication number: 20140167865
    Abstract: According to an example embodiment, a device includes a resonant circuit configured and arranged to provide a peak current flow at a resonance frequency. A trimming circuit provides variable impedances to the resonant circuit and thereby changes the resonance frequency for the resonant circuit. A driver circuit is configured to generate a trimming signal that oscillates at a desired frequency. A switch circuit couples and decouples the driver circuit to the resonant circuit for driving the resonant circuit with the trimming signal. An amplitude detection circuit detects amplitudes for signals generated in response to the trimming signal being connected to the resonant circuit. A processing circuit correlates detected amplitudes from the amplitude detection circuit with different impedance values of the variable trimming circuit.
    Type: Application
    Filed: December 18, 2012
    Publication date: June 19, 2014
    Applicant: NXP B.V.
    Inventor: Sven Simons
  • Patent number: 8717075
    Abstract: A phase locked loop circuit includes a phase frequency detector, a control circuit, a charge pump, a loop filter, a supply circuit, a ring oscillator, a frequency divider and a voltage detector. The phase frequency detector generates a frequency-increasing signal and a frequency-decreasing signal according to a phase difference between an input signal and a feedback signal. The control circuit generates a first control signal and/or a second control signal according to the frequency-increasing signal and the frequency-decreasing signal. The charge pump generates a current signal according to the first control signal and/or the second control signal. The voltage detector monitors a supply voltage of the supply circuit, and controls the control circuit to generate only the second control signal so as to reduce the supply voltage if the supply voltage is greater than a high reference voltage.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: May 6, 2014
    Assignees: Global Unichip Corp., Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chun-Chi Chang
  • Publication number: 20140097908
    Abstract: A radio frequency generator includes a power control module, a frequency control module and a pulse generating module. The power control module is configured to generate a power signal indicating power levels for target states of a power amplifier. The frequency control module is configured to generate a frequency signal indicating frequencies for the target states of the power amplifier. The pulse generating module is configured to (i) supply an output signal to the power amplifier, (ii) recall at least one of a latest power level or a latest frequency for one of the target states of the power amplifier, and (iii) adjust a current power level and a current frequency of the output signal from a first state to a second state based on the power signal, the frequency signal, and at least one of the latest power level and the latest frequency of the power amplifier.
    Type: Application
    Filed: March 14, 2013
    Publication date: April 10, 2014
    Applicant: MKS INSTRUMENTS, INC.
    Inventor: MKS INSTRUMENTS, INC.
  • Publication number: 20140035684
    Abstract: There are provided a control circuit for a digitally controlled oscillator and a control apparatus for a digitally controlled oscillator using the same. The control circuit for a digitally controlled oscillator includes: a peak detection circuit detecting amplitude of a signal output from the digitally controlled oscillator; and a transconductance control circuit comparing an output of the peak detection circuit with a predetermined reference signal to control a transconductance value of a negative transconductance circuit included in the digitally controlled oscillator.
    Type: Application
    Filed: November 13, 2012
    Publication date: February 6, 2014
    Applicants: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yoo Sam NA, Kang Yoon LEE, Dong Su LEE, Hyung Gu PARK, Hong Jin KIM, Gyu Suck KIM, Young Gun PU
  • Patent number: 8629730
    Abstract: Provided is a temperature compensated oscillator includes an oscillation circuit for oscillating an oscillator. In the oscillator, when an oscillation frequency is changed by a second control signal after being controlled by a first control signal, variation in the oscillation frequency due to a second control signal is set to a fixed amount. The oscillation frequency of the oscillator is controlled on the basis of both the first control signal and the second control signal, but an oscillation amplitude adjusting section is also added, the oscillation amplitude adjusting section allowing the oscillation amplitude of the oscillator to be changed by the second control signal. The oscillator thus allows a fixed amount of oscillation frequency control over a wide range (full range) of oscillation frequency control due to the first control signal.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: January 14, 2014
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Kenji Nemoto, Tamami Furuya
  • Publication number: 20130335149
    Abstract: The disclosed embodiments provide a resonant oscillator circuit. The resonant oscillator circuit includes a clipping mechanism configured to clip an output voltage of a signal pulse generated by the resonant oscillator circuit to a predefined constant level. The resonant oscillator circuit also includes a feedback path configured to return energy from the clipping mechanism to an input of the resonant oscillator circuit.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Applicant: APPLE INC.
    Inventors: William C. Athas, Catherine S. Chou
  • Publication number: 20130335150
    Abstract: According to one embodiment, a phase locked loop (PLL) circuit includes an application unit, a correlator, an integrator and a power supply noise canceller. The application unit applies the test signal to a power supply voltage. The correlator extracts a frequency error signal as a monitor signal and calculates a correlation value for the test signal and the monitor signal to generate a correlation signal. The integrator integrates the correlation signal to generate an integral signal. The power supply noise canceller provides a cancellation gain corresponding to the integral signal to the power supply voltage to which the test signal is applied, to generate a control signal.
    Type: Application
    Filed: April 29, 2013
    Publication date: December 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Akihide SAI
  • Patent number: 8570113
    Abstract: A method and circuitry for calibrating the gain of a VCO (voltage controlled oscillator) is disclosed. In one embodiment, a circuit includes a comparator configured to provide a first indication if the VCO gain is not within the specified gain range, and a second indication if the VCO is within the specified gain range. The circuit further includes a control unit configured to, upon occurrence of at least a first cycle of a clock signal, cause adjustment of the VCO gain responsive to receiving the first indication. For each one or more successive cycles of the clock signal, the control unit is configured to cause corresponding adjustments of the VCO gain until the comparator provides the second indication. The control unit is configured to discontinue adjustments to the VCO gain responsive to receiving the second indication.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: October 29, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Dennis M. Fischette
  • Publication number: 20130278343
    Abstract: Methods and apparatus for tuning devices having resonators are described. Phase shifters are included in the circuits and used to shift the phase of the output signal(s) of the resonators. In some implementations, the phase shifters are configured in a feedback loop with the resonators. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS).
    Type: Application
    Filed: April 18, 2013
    Publication date: October 24, 2013
    Inventors: David Locascio, Reimund Rebel, Jan H. Kuypers
  • Publication number: 20130141172
    Abstract: An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array.
    Type: Application
    Filed: January 18, 2013
    Publication date: June 6, 2013
    Applicant: UT-Battelle, LLC
    Inventor: UT-Battelle, LLC
  • Publication number: 20130033329
    Abstract: A circuit includes a controllable oscillator and a controller coupled to the controllable oscillator. The controller is configured to provide a current control and a gain control to the controllable oscillator. The gain control is configured to change a gain of the controllable oscillator during a calibration process.
    Type: Application
    Filed: August 5, 2011
    Publication date: February 7, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Zhi Zhu, Xiaohua Kong, Vannam Dang, Cheng Zhong
  • Publication number: 20130009473
    Abstract: Devices are provided comprising oscillator circuits coupled to a supply voltage via an adjustable resistance. Corresponding methods to control adjustable resistances are also provided.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 10, 2013
    Inventors: Davide PONTON, Edwin THALLER, Nicola DA DALT
  • Publication number: 20120326794
    Abstract: Methods and systems are disclosed that utilize digital control loops to control an amplitude level for output signals generated by crystal oscillator circuitry. The disclosed embodiments utilize multiple selectable current drive circuits to control the amplitude level of the output signals from crystal oscillator circuitry. The current drive circuits are selectably used, or not used, to provide a bias current to the crystal oscillator circuitry based upon a multi-bit digital control signal. The multi-bit digital control signal can be generated, for example, by control circuitry that compares the oscillator output signal to a reference output signal level.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Inventor: Abhishek V. Kammula
  • Patent number: 8242854
    Abstract: A circuit for a voltage controlled oscillator (VCO) buffer is described. The circuit includes a first capacitor connected to an input of the VCO buffer that is connected to a VCO core. The circuit also includes a second capacitor connected to the input of the VCO buffer and the gate of a p-type metal-oxide-semiconductor field effect (PMOS) transistor. The circuit further includes a first switch connected to the first capacitor and the gate of the PMOS transistor. The circuit also includes a third capacitor connected to the input of the VCO buffer. The circuit further includes a fourth capacitor connected to the input of the VCO buffer and the gate of an n-type metal-oxide-semiconductor field effect (NMOS) transistor. The circuit also includes a second switch connected to the third capacitor and the gate of the NMOS transistor.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: August 14, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Chinmaya Mishra, Rajagopalan Rangarajan, Hongyan Yan
  • Publication number: 20120182076
    Abstract: A limiter circuit in a voltage controlled oscillator (VCO) includes a first control circuit, a second control circuit and a driving circuit having a pull-up transistor and a pull-down transistor. The first control circuit generates a first driving control signal for controlling the pull-up transistor based on an AC input signal and a first DC bias voltage. The second control circuit generates a second driving control signal for controlling the pull-down transistor based on the AC input signal and a second DC bias voltage. The driving circuit generates an output signal based on the first driving control signal and the second driving control signal. The output signal swings between a first voltage at the pull-up transistor and a second voltage at the pull-down transistor.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 19, 2012
    Inventors: Do-Hyung Kim, Ji-Hyun Kim
  • Publication number: 20120142287
    Abstract: According to one embodiment, an oscillator circuit includes a first comparator circuit, a second comparator circuit, a first voltage control circuit, a second voltage control circuit, a clock generation circuit. The first comparator circuit is configured to compare a first voltage with a first threshold voltage to generate a first comparison result. The second comparator circuit is configured to compare a second voltage with a second threshold voltage to generate a second comparison result. The first voltage control circuit is configured to decrease the first voltage by a first voltage value in synchronization with timing when the first comparison result changes. The second voltage control circuit is configured to decrease the second voltage by a second voltage value in synchronization with timing when the second comparison result changes.
    Type: Application
    Filed: September 13, 2011
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shouhei Kousai
  • Patent number: 8188802
    Abstract: An apparatus for generating an oscillating signal including an oscillator configured to generate the oscillating signal, a controller configured to generate a control signal that controls a characteristic (e.g., amplitude or frequency) of the oscillating signal, and a power supply configured to supply power to the oscillator as a function of the control signal. The power supply may be configured to supply power to the oscillator as a function of the amplitude or frequency of the oscillating signal to improve power efficiency.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: May 29, 2012
    Assignee: QUALCOMM Incorporated
    Inventor: Jorge A. Garcia
  • Publication number: 20120068774
    Abstract: An amplitude control circuit includes a pair of peak detectors. The pair of peak detectors are responsive to a voltage reference generator. The amplitude control circuit is configured to be responsive to an oscillating signal of a crystal oscillator and configured to generate a control signal to control an amplitude of the oscillating signal.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 22, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Zhiqin Chen, Nam V. Dang, Nan Chen, Thuan Ly
  • Publication number: 20110299644
    Abstract: A method may include synchronizing an output of a phase-locked loop to a signal received at its input. The method may further include suppressing emission at a potentially problematic channel by applying at least one of a first gain and a first resistance of the phase-locked loop for a communication at the potentially problematic channel, wherein at least one of the first gain and the first resistance are different from a second gain and a second resistance applied for communications at channels other than potentially problematic channels.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Inventors: Bing Xu, Chunming Zhao
  • Patent number: 8031026
    Abstract: An apparatus for generating an oscillating signal including an oscillator configured to generate the oscillating signal, a controller configured to generate a control signal that controls a characteristic (e.g., amplitude or frequency) of the oscillating signal, and a power supply configured to supply power to the oscillator as a function of the control signal. The power supply may be configured to supply power to the oscillator as a function of the amplitude or frequency of the oscillating signal to improve power efficiency.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: October 4, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Jorge A. Garcia
  • Patent number: 7936223
    Abstract: A low spur phase-locked loop (PLL) architecture is provided. A frequency-synthesizing PLL that includes a differential Kvco gain linearization circuit with adjustable DC offset is used to reduce clock jitter. The free-running oscillation frequency of the VCO of the PLL is centered near the desired frequency using programmable loads to minimize the required control voltage range. The PLL uses a differential architecture that includes a charge pump that compensates for variations in Kvco and a LC tank oscillator with differential controlled varactor. The differential PLL architecture demonstrates that the reference spur can be well controlled to below ?80 dBc.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: May 3, 2011
    Assignee: Vintomie Networks B.V., LLC
    Inventors: James M. Little, Perry Leigh Heedley, David Vieira, Maoyou Sun
  • Patent number: 7893777
    Abstract: In a voltage controlled oscillation circuit including a cascade connection of a voltage-to-current conversion circuit (310) for generating an input voltage converted current which is a current corresponding to an input voltage and a current controlled oscillation circuit (120) of which an oscillation frequency varies according to the input voltage converted current, the voltage-to-current conversion circuit (310) includes a first current source for outputting a current in proportion to the input voltage and a plurality of second current sources for outputting a current in proportion to a voltage obtained by shifting the input voltage. Then, a current obtained by adding a current output from the first current source and currents output from the plurality of current sources is output as the input voltage converted current to the current controlled oscillation circuit (120).
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: February 22, 2011
    Assignee: Panasonic Corporation
    Inventors: Takashi Oka, Seiji Watanabe
  • Patent number: 7863989
    Abstract: A gain control system comprises a reference stage, a bias replication stage, an operational amplifier, an automatic gain control block, a gain stage, and a crystal oscillator in one embodiment. A negative feedback loop is formed by portions of the operational amplifier, the replica biasing stage, the gain stage, and the automatic gain control stage. The negative feedback loop operatively controls an amplitude of oscillation in the crystal oscillator. The automatic gain control block produces output currents at reference levels in proportion to an input current source. The output current reference levels provide a corresponding yet independent scaling of currents in the bias replication stage and the gain stage. By the scaling capabilities provided a high common mode of voltage is provided between the crystal oscillator and the voltage reference section while stable oscillating characteristics are provided over a broad frequency range.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: January 4, 2011
    Assignee: Spectra Linear, Inc.
    Inventors: Omer Fatih Orberk, Alexei Shkidt
  • Patent number: 7855606
    Abstract: An oscillator device having an oscillation system including an oscillator and a resilient supporting member, a driving member configured to supply a driving force to the oscillation system based on a driving signal, a detecting member configured to detect at least an oscillation amplitude of the oscillator, a driving amplitude control unit configured to control at least a driving amplitude of the driving signal, and a driving frequency control unit configured to control a driving frequency of the driving signal to be supplied to the driving member, wherein, in a state in which the driving amplitude control unit controls the driving amplitude of a driving signal so that the oscillation amplitude to be detected becomes equal to a target value, and on the basis of information including driving frequencies in different driving states being driven with driving signals of these driving frequencies as well as the controlled driving amplitude, the driving frequency control unit acquires, as a resonance frequency of t
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: December 21, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazufumi Onuma
  • Publication number: 20100315170
    Abstract: Methods and apparatus for tuning devices having resonators are described. Phase shifters are included in the circuits and used to shift the phase of the output signal(s) of the resonators. In some implementations, the phase shifters are configured in a feedback loop with the resonators. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS).
    Type: Application
    Filed: July 2, 2010
    Publication date: December 16, 2010
    Applicant: Sand9, Inc.
    Inventors: David Locascio, Reimund Rebel, Jan H. Kuypers
  • Publication number: 20100188156
    Abstract: There is provided an oscillator circuit including: a current source; a resonant unit; an oscillation amplification unit connected to the current source and connected in parallel to the resonant unit; a feedback resistor connected in parallel to the oscillation amplification unit; a switch unit having a first end connected to the current source side of the oscillation amplification unit; a replica circuit connected between a second end of the switch unit and a ground side of the oscillation amplification unit and having a configuration identical to a configuration of the oscillation amplification unit; and a level detecting unit that detects an input voltage of the oscillation amplification unit, and, when the detected input voltage is higher than a bias voltage level at a time of oscillation, cause the switch unit to allow a current from the current sources to bypass through the replica circuit.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 29, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Kenji ARAI
  • Publication number: 20100176888
    Abstract: A voltage controlled oscillator is provided to make it possible to enlarge a variable frequency range with an increase in a conversion gain suppressed. A converter (12) converts an input voltage to a first physical amount. A variable converter (13) outputs a second physical amount in accordance with each switch state of a switch group (13a). A variable converter (14) outputs a third physical amount in accordance with each switch of a switch group (14a) and an input voltage when the input voltage is within a predetermined range. A variable frequency oscillator (15) outputs a signal with a frequency in accordance with the first, second and third physical amounts.
    Type: Application
    Filed: July 19, 2007
    Publication date: July 15, 2010
    Applicant: NEC CORPORATION
    Inventor: Hiroshi Kodama
  • Publication number: 20100176887
    Abstract: Aspects of a method and system for reduced clock feed-through in a phase locked loop are provided. In this regard, a control voltage for controlling a VCO may be generated via a filter comprising at least one switching element clocked via a clock booster circuit and comprising one or more thick oxide transistors to reduce clock feed-through. A first switching element of the filter may be a first transmission gate comprising thick oxide transistors. The first transmission gate may be part of a sample and hold circuit. A DC voltage on an input node of the sample and hold circuit may be periodically reset via a reset switching element, which may comprise thick oxide transistors. The reset switching element may be controlled via a clock booster circuit. The filter may also comprise a buffer having an input stage comprising one or more thick oxide transistors.
    Type: Application
    Filed: January 14, 2009
    Publication date: July 15, 2010
    Inventor: Stephen Wu
  • Publication number: 20100176886
    Abstract: A temperature-compensated-resistance (TCR) circuit, which may be part of an integrated circuit, is provided. The TCR circuit consists of two resistors and a diode. The two resistors are connected in parallel and the diode is connected in series with one of the resistors. The two parallel legs of the TCR circuit may be connected to a reference voltage source, such as a ground. No specialized devices, such as bipolar transistors, Zener or Schottky diodes, or specially-processed resistors, are required by the TCR circuit. The resistors and the diode of the TCR circuit may be chosen to adjust for temperature variations in the resistance values of the resistor, leading to a negative, zero, or positive temperature coefficient of resistance for the circuit. A phase-locked loop (PLL) circuit is described as an application of the TCR circuit.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 15, 2010
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Xiaoxin Feng, Jeffrey Loukusa
  • Publication number: 20100141346
    Abstract: A circuit includes a voltage-controlled oscillator (VCO), which includes a voltage input node having an input voltage; and a start-up circuit. The start-up circuit includes a first current path and a second current path. The first current path has a first current and is configured so that the first current increases in response to a decrease in the input voltage and decreases in response to an increase in the input voltage. The second current path has a second current and is configured so that the second current decreases in response to the decrease in the input voltage and decreases in response to the increase in the input voltage. The VCO further includes a third current path combining a first proportion of the first current and a second proportion of the second current into a combined current; and a current-controlled oscillator (CCO) including an input receiving the combined current and outputting an AC signal.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 10, 2010
    Inventors: Chien-Hung Chen, Mao-Hsuan Chou, Tsung-Hsien Tsai, Min-Shuch Yuan
  • Patent number: 7719374
    Abstract: An oscillator signal stabilization method is provided for a radio transceiver, for example. In the present stabilization method, amplitude variation of a radio frequency oscillator signal generated by a frequency-adjustable oscillator signal generator is stabilized in an adaptive compensation circuit having adjustable compensation parameters. The stabilized oscillator signal is fed from the compensation circuit to one or more frequency dividers for frequency division. The compensation circuit is configured to stabilize signal variations caused by component non-idealities and, thereby, prevent undesired frequency division errors in the frequency dividers.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: May 18, 2010
    Assignee: Nokia Corporation
    Inventor: Vili P. Kuosmanen
  • Publication number: 20100117747
    Abstract: Systems and methods are provided. In this regard, a representative system incorporates a crystal oscillator circuit and a digital automatic level control circuit. The digital automatic level control circuit is operative to: convert an oscillation amplitude of the crystal oscillator circuit to a proportional DC voltage; convert the DC voltage to a corresponding digital code representation; and adjust bias current and oscillator loop gain such that a desired oscillation amplitude is set.
    Type: Application
    Filed: May 8, 2009
    Publication date: May 13, 2010
    Inventors: Ray Rosik, Weinan Gao, Mats Lindstrom
  • Publication number: 20100090768
    Abstract: A PLL circuit comprising an oscillation unit, a frequency division unit, a phase comparison unit, and a generation unit comprises a switching unit that switches between a first state in which a control voltage output from the generation unit is input into the oscillation unit and a second state in which a reference voltage is input into the oscillation unit; and a correction unit that, in the second state, compares the control voltage output from the generation unit with the reference voltage, and corrects a frequency at which the oscillation unit oscillates with respect to a voltage input into the oscillation unit, such that the control voltage output from the generation unit is equivalent to the reference voltage.
    Type: Application
    Filed: September 15, 2009
    Publication date: April 15, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Yoshikazu Yamazaki
  • Publication number: 20100044556
    Abstract: A oscillating member device comprises: an oscillation system containing of a oscillating member and an elastic support, a driver unit for supplying a driving force to the oscillation system according to a driving signal, a waveform generator for generating periodic signals at a prescribed frequency, a driving signal generator for generating the driving signals in accordance with the periodic signals and an amplitude control level, and a oscillating amplitude detector for detecting a oscillating amplitude of the oscillating member; and practicing a control loop for controlling the amplitude control level according to a difference between a target oscillating amplitude and a detected oscillating amplitude detected by the oscillating amplitude detector, and the gain thereof; the oscillating member device comprising a gain adjuster for adjusting a gain of the control loop, and the gain of the gain adjuster being set based on the amplitude control level in a state that the oscillating amplitude of the oscillating
    Type: Application
    Filed: August 4, 2009
    Publication date: February 25, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Kazufumi Onuma
  • Patent number: 7659787
    Abstract: A circuit for generating a clock of a semiconductor memory apparatus is provided. A reference voltage generator is configured to generate a reference voltage. A reference current generator is configured to generate a reference current that has a constant current value regardless of a change in temperature. An oscillator is configured to receive the reference voltage and the reference current to generate a clock that has constant frequency.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: February 9, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang-Kyu Lee
  • Publication number: 20100026395
    Abstract: Techniques for mitigating VCO pulling are described. In an aspect, VCO pulling may be mitigated by (i) injecting an oscillator signal, which is a version of a VCO signal from a VCO, into a transmitter and (ii) using coupling paths from the transmitter to the VCO to re-circulate the oscillator signal back to the VCO. In one design, an apparatus includes a VCO and a coupling circuit. The VCO generates a VCO signal at N times a desired output frequency. The coupling circuit receives an oscillator signal generated based on the VCO signal and injects the oscillator signal into a transmitter to mitigate pulling of the frequency of the VCO due to undesired coupling from the transmitter to the VCO. The apparatus may include a phase adjustment circuit that adjusts the phase of the oscillator signal and/or an amplitude adjustment circuit that adjusts the amplitude of the oscillator signal.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 4, 2010
    Applicant: QUALCOMM INCORPORATED
    Inventor: Mark Vernon Lane
  • Patent number: 7639093
    Abstract: In one embodiment, a voltage-controlled oscillator is provided having an output signal whose frequency is responsive to a tuning signal and is independent of amplitude of oscillation. The voltage-controlled oscillator includes: a plurality of differential inverter stages coupled to form a loop, each differential inverter stage having a differential pair of transistors configured to steer a tail current from a current source, the current source sourcing the tail current responsive to a feedback signal; and a control circuit configured to generate the feedback signal responsive to a reference signal such that an amplitude of the output signal is independent of the tuning signal and depends on the reference signal, and the frequency of oscillation is decoupled from the amplitude of oscillation.
    Type: Grant
    Filed: December 30, 2006
    Date of Patent: December 29, 2009
    Assignee: Tialinx, Inc.
    Inventor: Mohammad Ardehali
  • Publication number: 20090289723
    Abstract: Provided is a PLL oscillation circuit that can reduce the variability of modulation sensitivity of a VCO 101 and obtain a desired output amplitude quickly with high precision. An amplitude detector 103 detects an output amplitude of the VCO 101. An amplitude controller 105 controls a current value of a variable current source 109 so as to have an output amplitude of the VCO 101 detected by the amplitude detector 103 to be a desired amplitude. A LPF 108 is connected between the amplitude controller 105 and the variable current source 109. A switch 107 connects or disconnects the LPF 108 between the amplitude controller 105 and the variable current source 109. The amplitude controller 105 is connected to the variable current source 109 through either the LPF 108 or the switching switch 107.
    Type: Application
    Filed: May 20, 2009
    Publication date: November 26, 2009
    Inventors: Masakatsu MAEDA, Takayuki TSUKIZAWA, Hiroyuki YOSHIKAWA, Shunsuke HIRANO
  • Patent number: 7612618
    Abstract: Provided are a PLL apparatus for an OFDM system having variable channel band and an operating method thereof. The PLL apparatus includes a frequency divider for dividing an oscillating signal; a phase detector for detecting a phase difference between a reference signal and the divided oscillating signal from the frequency divider and outputting the phase difference signal; a variable loop filter for filtering a phase difference signal outputted from the phase detector; a voltage control oscillator for outputting the oscillator signal to the frequency divider according to the voltage control signal filtered from the variable loop filter; and a variable loop filter controller for varying a filtering band of the variable loop filter according to each of the channel bands.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: November 3, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yun-Soo Ko, Seong-Min Kim, Kwang-Chun Lee
  • Patent number: 7609119
    Abstract: A reference voltage generator and a method for generating a reference voltage for a logic device using the reference voltage generator is provided. The voltage reference generator includes a ring oscillator having a plurality of logic gates and a phase/frequency detector. A first reference voltage is generated on the basis of a phase/frequency difference between the phase/frequency of a reference clock and the phase/frequency of the ring oscillator. A second reference voltage is generated on the basis of a voltage swing of the oscillator circuit. Both reference voltages can be applied to the plurality of logic gates of the ring oscillator such that a constant delay is created through each logic gate of the logic device.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 27, 2009
    Inventors: Alexander Roger Deas, Igor Anatolievich Abrosimov
  • Publication number: 20090224836
    Abstract: A gain control system comprises a reference stage, a bias replication stage, an operational amplifier, an automatic gain control block, a gain stage, and a crystal oscillator in one embodiment. A negative feedback loop is formed by portions of the operational amplifier, the replica biasing stage, the gain stage, and the automatic gain control stage. The negative feedback loop operatively controls an amplitude of oscillation in the crystal oscillator. The automatic gain control block produces output currents at reference levels in proportion to an input current source. The output current reference levels provide a corresponding yet independent scaling of currents in the bias replication stage and the gain stage. By the scaling capabilities provided a high common mode of voltage is provided between the crystal oscillator and the voltage reference section while stable oscillating characteristics are provided over a broad frequency range.
    Type: Application
    Filed: March 10, 2009
    Publication date: September 10, 2009
    Applicant: SpectraLinear, Inc.
    Inventors: Omer Fatih Orberk, Alexei Shkidt
  • Publication number: 20090224837
    Abstract: The present invention determines the resonant frequency of a sensor by adjusting the phase and frequency of an energizing signal until the frequency of the energizing signal matches the resonant frequency of the sensor. The system energizes the sensor with a low duty cycle, gated burst of RF energy having a predetermined frequency or set of frequencies and a predetermined amplitude. The energizing signal is coupled to the sensor via magnetic coupling and induces a current in the sensor which oscillates at the resonant frequency of the sensor. The system receives the ring down response of the sensor via magnetic coupling and determines the resonant frequency of the sensor, which is used to calculate the measured physical parameter. The system uses a pair of phase locked loops to adjust the phase and the frequency of the energizing signal.
    Type: Application
    Filed: May 15, 2009
    Publication date: September 10, 2009
    Applicant: CardioMEMS, Inc.
    Inventors: James Joy, Jason Kroh, Michael Ellis, Mark Allen, Wilton Pyle
  • Patent number: 7583151
    Abstract: Disclosed are circuits and methods to control the amplitude of a signal generated by a VCO.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: September 1, 2009
    Assignee: Intel Corporation
    Inventors: Yongping Fan, Ian Young
  • Patent number: 7554416
    Abstract: Provided is an LC resonance voltage-controlled oscillator (VCO) used for a multi-band multi-mode wireless transceiver. In order to generate a multi-band frequency, a capacitor bank and a switchable inductor are included in the LC resonance voltage-controlled oscillator. The LC resonance voltage-controlled oscillator employs an adjustable emitter-degeneration negative resistance cell in place of tail current sources in order to compensate for non-uniform oscillation amplitude caused by the capacitor bank and prevent the degradation of a phase noise due to the tail current sources.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: June 30, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ja Yol Lee, Kwi Dong Kim, Chong Ki Kwon, Jong Dae Kim, Sang Heung Lee, Kyoung Ik Cho