Temperature Or Current Responsive Means In Circuit Patents (Class 331/176)
  • Patent number: 11025194
    Abstract: An integrated circuit device includes an oscillation circuit that generates an oscillation signal by causing a resonator to oscillate, a temperature compensation circuit that performs temperature compensation of an oscillation frequency of the oscillation circuit, an output circuit that outputs a clock signal based on the oscillation signal, a first regulator that generates a first regulated power supply voltage based on a power supply voltage and supplies the first regulated power supply voltage to the temperature compensation circuit, and a second regulator that generates a second regulated power supply voltage based on the power supply voltage and supplies the second regulated power supply voltage to the output circuit.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: June 1, 2021
    Inventor: Mitsuaki Sawada
  • Patent number: 11018625
    Abstract: A frequency reference generator includes (i) an integrated frequency source having drive circuitry that drives a resonant (e.g., non-trimmable LC) tank to generate an oscillator signal, (ii) at least one temperature sensor that generates at least one measured temperature signal, and (iii) a frequency-adjustment circuit that adjusts the oscillator signal frequency to generate the frequency reference based on the measured temperature signal and a (e.g., sample-specific) mapping from temperature to a corresponding frequency-adjustment parameter (e.g., a divisor value for a fractional frequency divider). In some embodiments, a Colpitts oscillator generates the oscillator signal based on the measured temperature signal, where the Colpitts oscillator has voltage/temperature-compensation circuitry that compensates for variations in power supply voltage and operating temperature. Such frequency reference generators achieve substantial PVT insensitivity with as little as a single 1T-trim or even no trim at all.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: May 25, 2021
    Assignee: NXP B.V.
    Inventors: Alexander Sebastian Delke, Mark Stefan Oude Alink, Anne Johan Annema, Yanyu Jin, Jos Verlinden, Bram Nauta
  • Patent number: 10998907
    Abstract: An integrated circuit device includes a digital signal processing circuit that generates frequency control data by performing a temperature compensation process by a neural network calculation process based on temperature detection data and an amount of change in time of the temperature detection data, and an oscillation signal generation circuit that generates an oscillation signal of a frequency set by the frequency control data using a resonator.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: May 4, 2021
    Assignee: Seiko Epson Corporation
    Inventors: Yasuhiro Sudo, Hideo Haneda
  • Patent number: 10992260
    Abstract: In an oscillator device that outputs a frequency signal based on an oscillation frequency of a crystal resonator and a frequency setting value, a frequency difference detector that obtains a difference value corresponding to a frequency difference between the output frequency of the oscillator device and an external clock signal and a temperature detector are disposed. An aging coefficient and a temperature characteristic coefficient are obtained based on a secular change of the difference value obtained in the frequency difference detector and a secular change of the detected temperature during a period where the external clock signal is obtained. Furthermore, a frequency correction value is calculated using the aging coefficient and the temperature characteristic coefficient during a holdover period, and the frequency correction value is added to the frequency setting value.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: April 27, 2021
    Assignee: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Tsukasa Kobata
  • Patent number: 10992288
    Abstract: In an embodiment an oscillator device includes a ring oscillator circuit with at least one delay stage with an output of a last delay stage fed back to an input of a first delay stage, wherein each of the delay stages is configured to receive a charging current and to provide a delay that is dependent on the charging current and at least one of the delay stages includes a metal-oxide-semiconductor field-effect transistor and a bias circuit including an output terminal coupled to an input terminal of the ring oscillator circuit, wherein the bias circuit is configured to receive a temperature-independent reference voltage and includes a current source with a main NMOS-transistor, the current source configured to provide a control current to the ring oscillator circuit which is proportional to a difference of the temperature-independent reference voltage and a gate-source voltage of the main NMOS-transistor, and wherein the gate-source voltage of the main NMOS-transistor includes a negative temperature coefficie
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: April 27, 2021
    Assignee: TDK Corporation
    Inventor: Lei Zou
  • Patent number: 10979031
    Abstract: In a timing signal generator having a resonator, one or more temperature-sense circuits generate an analog temperature signal and a digital temperature signal indicative of temperature of the resonator. First and second temperature compensation signal generators to generate, respectively, an analog temperature compensation signal according to the analog temperature signal and a digital temperature compensation signal according to the digital temperature signal. Clock generating circuitry drives the resonator into mechanically resonant motion and generates a temperature-compensated output timing signal based on the mechanically resonant motion, the analog temperature compensation signal and the digital temperature compensation signal.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: April 13, 2021
    Assignee: SiTime Corporation
    Inventors: Saleh Heidary Shalmany, Kamran Souri, Sassan Tabatabaei, U{hacek over (g)}ur Sönmez
  • Patent number: 10972049
    Abstract: An oscillation apparatus includes a correction circuitry including a first amplifier and a second amplifier, and an oscillation circuitry. The first amplifier amplifies a difference between a first voltage having a first temperature characteristic and a second voltage having a second temperature characteristic different from the first temperature characteristic to generate a third voltage having a third temperature characteristic different from both the first temperature characteristic and the second temperature characteristic. The second amplifier amplifies a difference between a sum of the second voltage and the third voltage, and, a feedback voltage, to generate a fourth voltage which corrects an oscillation frequency of an oscillation voltage. The oscillation circuitry outputs the oscillation voltage controlled in frequency based on the fourth voltage.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: April 6, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Hiroyuki Suwabe
  • Patent number: 10935439
    Abstract: This application relates to methods and apparatus for temperature monitoring for integrated circuits, and in particular to temperature monitoring using a locked-loop circuits, e.g. FLLs, PLLs or DLLs. According to embodiments a locked-loop circuit (200, 600) includes a controlled signal timing module (201, 601), wherein the timing properties of an output signal (SOUT, SFB) are dependent on a value of a control signal and on temperature. A controller (201, 601) compares a feedback signal (SFB) output from the timing module to a reference signal (SREF) and generates a control signal (SC) to maintain a desired timing relationship. A temperature monitor (202) monitors temperature based on the value of the control signal. For FLLs and PLLs the signal timing module may be a controlled oscillator (201).
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: March 2, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Gordon James Bates
  • Patent number: 10862449
    Abstract: A MEMS resonator system has a micromechanical resonant structure and an electronic processing circuit including a first resonant loop that excites a first vibrational mode of the structure and generates a first signal at a first resonance frequency. A compensation module compensates, as a function of a measurement of temperature variation, a first variation of the first resonance frequency caused by the temperature variation to generate a clock signal at a desired frequency that is stable relative to temperature. The electronic processing circuit further includes a second resonant loop, which excites a second vibrational mode of the structure and generates a second signal at a second resonance frequency. A temperature-sensing module receives the first and second signals and generates the measurement of temperature variation as a function of the first variation of the first resonance frequency and a second variation of the second resonance frequency caused by the temperature variation.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: December 8, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Carlo Valzasina, Gabriele Gattere, Alessandro Tocchio, Giacomo Langfelder
  • Patent number: 10763817
    Abstract: A method of an open loop characterization of an electrostatic MEMS based resonator with a varying gap, the method including: converting, via a trans-impedance amplifier circuit, an output current signal of the resonator into a voltage; multiplying the output current signal converted into the voltage, by means of a multiplier circuit, with an AC signal or with a different signal at a frequency of the resonator and carrying a second harmonic signal to a main tone; and measuring a frequency response of a signal cleared of frequencies apart from the main tone using a network analyzer.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: September 1, 2020
    Inventor: Haluk Kulah
  • Patent number: 10756939
    Abstract: Physical layer processing methods for network acquisition by remote nodes in wireless communication systems are described herein. New methods for wireless network discovery and synchronization by remote nodes are described herein that utilize spatial (e.g., antenna array) processing algorithms which may achieve enhanced functioning in challenging radio frequency environments, such as those containing interference and multi path distortion effects. These methods may include advantageous use of spatial whiteners and associated pluralities of adaptive beamformers to detect network reference and synchronization signals and estimate their parameters.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: August 25, 2020
    Assignee: Tarana Wireless, Inc.
    Inventors: Stephen P. Bruzzone, Thomas Svantesson, Dale A. Branlund
  • Patent number: 10707878
    Abstract: Described herein is apparatus and system for a digitally controlled oscillator (DCO). The apparatus comprises a voltage regulator to provide an adjustable power supply; and a DCO to generate an output clock signal, the DCO including one or more delay elements, each delay element operable to change its propagation delay via the adjustable power supply, wherein each delay element comprising an inverter with adjustable drive strength, wherein the inverter is powered by the adjustable power supply. The apparatus further comprises a digital controller to generate a first signal for instructing the voltage regulator to adjust a voltage level of the adjustable power supply.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Amr M. Lotfy, Mohamed A. Abdelsalam, Mohammed W. El Mahalawy, Nasser A. Kurd, Mohamed A. Abdelmoneum
  • Patent number: 10686453
    Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: June 16, 2020
    Assignee: Futurewei Technologies, Inc.
    Inventor: Michael Bushman
  • Patent number: 10659014
    Abstract: Clock generation and control in a semiconductor system having process, voltage and temperature (PVT) variation. A semiconductor device may include at least first and second ring oscillators, each disposed at locations respectively closest to first and second logic circuits of an operation circuit, and generating first and second oscillating signals. A detecting circuit is configured to perform a predetermined logic operation on the first oscillating signal and the second oscillating signal to generate a first clock signal. A calibration circuit is configured to receive the first clock signal from the detecting circuit and perform a delay control on each of the first ring oscillator and the second ring oscillator to generate a second clock signal for operating the operation circuit.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: May 19, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong Hwan Kim, Wook Kim, Ji Youn Kim
  • Patent number: 10630236
    Abstract: A switched capacitance circuit selectively provides a capacitance across first and second output nodes in response to a selection control signal. The switched capacitance circuit may include a first capacitor coupled between the first output node and a mid-node, a second capacitor coupled between the second output node and the mid-node, and a switching circuit. The switching circuit is configured to switch the first and second capacitors in response to the selection control signal and to provide a bias voltage at the mid-node in response to the selection control signal.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: April 21, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Hung-Chuan Pai, Tsai-Pi Hung
  • Patent number: 10554199
    Abstract: A current-mode, multi-stage oscillator converts an oscillating current to an oscillating voltage using one or more current voltage converters on one or more of the output stages of the multi-stage oscillator. The use of current voltage convertors transforms the low output swing (e.g., transistor threshold limited) of the oscillator into a rail-to-rail voltage oscillation with minimal jitter and operational stability over a wide temperature range.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: February 4, 2020
    Assignee: Hall Labs LLC
    Inventors: Marshall Soares, Richard N. Rea
  • Patent number: 10454460
    Abstract: In some embodiments, the present disclosure relates to a frequency generator having a resistor network and a capacitor network. The capacitor network has a plurality of capacitors connected in parallel with one another. A comparator is configured to output an oscillating voltage signal. An input of the comparator is connected to the output of the resistor network and the output of the capacitor network. A frequency testing circuit is configured to calculate a frequency of the oscillating voltage signal and determine whether the frequency is within a range of an expected frequency. The frequency testing circuit may also be configured to selectively connect a first plate of the plurality of capacitors to a non-varying voltage or to the input of the capacitor network to adjust a frequency of the oscillating voltage signal.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: October 22, 2019
    Assignee: Infineon Technologies AG
    Inventor: Chern Sia Phillip Lim
  • Patent number: 10411659
    Abstract: An amplifier circuit includes an input port, an output port, and a reference potential port, an RF amplifier device having an input terminal electrically coupled to the input port, an output terminal electrically coupled to the output port, and a reference potential terminal electrically coupled to the reference potential port. An impedance matching network is electrically connected to the output terminal, the reference potential port, and the output port. The impedance matching network includes a reactive efficiency optimization circuit that forms a parallel resonant circuit with a characteristic output impedance of the peaking amplifier at a center frequency of the fundamental frequency range. The impedance matching network includes a reactive frequency selective circuit that negates a phase shift of the RF signal in phase at the center frequency and exhibits a linear transfer characteristic in a baseband frequency range.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: September 10, 2019
    Assignee: CREE, INC.
    Inventors: Haedong Jang, Timothy Canning, Bjoern Herrmann, Zulhazmi Mokhti, Frank Trang, Richard Wilson
  • Patent number: 10326455
    Abstract: An integrated circuit device includes a substrate, a joining part provided on the substrate and joined to a vibrator, and a plurality of bonding pads provided on the substrate. The joining part includes an insulating protective film that covers a part of a surface of the substrate, and no insulating protective film is provided between the adjacent bonding pads.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: June 18, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Kensaku Isohata, Takayuki Kikuchi
  • Patent number: 10211838
    Abstract: Embodiments of the present invention disclose a time-frequency deviation compensation method, and a user terminal. A temperature compensation exception can be identified and a time-frequency deviation caused by the temperature compensation exception can be compensated by implementing the embodiments of the present invention.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: February 19, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jiadi Liu, Xiangchun Wu
  • Patent number: 10187071
    Abstract: A PLL including a VCO with a variable capacitance (such as an LC VCO) including a switched capacitor bank and a varactor, the PLL providing lock range extension over temperature using dynamic capacitor bank switching to dynamically adjust varactor set point based on junction temperature. The varactor is responsive to the Vctrl control voltage to adjust a capacitance of the variable capacitance to control the phase of the PLL signal. Compensation circuitry dynamically adjusts varactor set point by dynamically switching the capacitor bank based in a junction temperature associated with the PLL circuitry, thereby extending PLL lock range over temperature.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: January 22, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Himanshu Arora, Siraj Akhtar, Lu Sun, Hamid Safiri, Wenjing Lu, Nikolaus Klemmer
  • Patent number: 10168434
    Abstract: A reference signal generation device includes a reception unit that receives a reference signal, a first oscillator that includes an atomic oscillator, a first phase comparator that compares a signal output from the first oscillator and the reference signal in phase, a second oscillator that generates a signal to be output outwardly, and a second phase comparator that compares the signal output from the first oscillator and a signal output from the second oscillator in phase. The first oscillator includes a sweeping-result output unit that outputs a sweeping result signal corresponding to a resonance signal obtained by performing frequency sweeping in the first oscillator. The reference signal generation device further includes a determination section that determines a failure state based on the sweeping result signal and at least one of a phase comparison signal of the first phase comparator and a phase comparison signal of the second phase comparator.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: January 1, 2019
    Assignee: Seiko Epson Corporation
    Inventor: Yoshiyuki Maki
  • Patent number: 10171090
    Abstract: An oscillator includes a vibrator element, a container in which the vibrator element is housed, at least one of a heating element and a cooling body configured to control the temperature on the inside of the container, an oscillation circuit electrically connected to the vibrator element, a D/A conversion circuit configured to control a frequency output by the oscillation circuit, and a reference-voltage generation circuit configured to supply a voltage to the D/A conversion circuit. The reference-voltage generation circuit is mounted on the inside of the container or on a substrate on which the container is mounted.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: January 1, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Masaaki Okubo
  • Patent number: 10158344
    Abstract: A single-chip tunable bandpass filter is provided having a bandpass filter circuit with all tuning components for the bandpass filter circuit formed on the single-chip to provide a programmed center frequency for the tunable bandpass filter. The bandpass filter circuit may include, but is not limited to, a plurality of serially coupled singe stage biquad filter circuits coupled to an input formed on the single-chip and configured to provide a bandpass filtered output signal to an output formed on the single-chip. The bandpass filtered output may be provided by an output buffer formed on the single-chip. The single-chip includes at least one tuning input to receive data for tuning stored in a data register formed on the single-chip. The data register provides control bits to the tuning components that include a programmable resistor responsive to the control bits to vary the programmable resistor to adjust programmed center frequency.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: December 18, 2018
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Emilio A. Sovero, Jongchan Kang, Mohiuddin Ahmed, James Chingwei Li, Cynthia D. Baringer, Yen-Cheng Kuan, Timothy J. Talty
  • Patent number: 10135391
    Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element, a capacitance circuit connected to the oscillating circuit, and capable of correcting an oscillation frequency of the oscillating circuit, a logic circuit to which a signal output from the oscillating circuit is input, and which is capable of correcting a frequency of the signal, and a control circuit adapted to control an operation of the capacitance circuit and an operation of the logic circuit.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Toru Shirotori, Hisashi Yamaguchi, Masaki Wakamori, Toshiya Usuda, Masayuki Kamiyama, Sho Matsuzaki, Hiroshi Kiya, Tsuyoshi Yoneyama
  • Patent number: 10128854
    Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: November 13, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Toru Shirotori, Hisashi Yamaguchi, Masaki Wakamori, Toshiya Usuda, Sho Matsuzaki, Tsuyoshi Yoneyama, Masayuki Kamiyama, Hiroshi Kiya
  • Patent number: 10033390
    Abstract: A system may include a sampling circuit, a temperature calibration system, a phase detector, a virtual phase-locked loop, and a sample rate converter. The sampling circuit may be configured to generate a series of digitally-sampled data at a sampling frequency provided by a local clock. The temperature calibration system may be configured to determine a temperature-based timing compensation with respect to the local clock. The phase detector may be configured to estimate an error of the local clock in view of the reference clock. The virtual phase-locked loop may be configured to generate a virtual clock based on the temperature-based timing compensation and the error. The sample rate converter may be configured to generate a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: July 24, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Roderick D. Holley, Jaimin Mehta
  • Patent number: 9940192
    Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: April 10, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fubito Igari, Hiroyuki Suto, Yasuyuki Ozawa
  • Patent number: 9929337
    Abstract: A piezoelectric device package may include: a case having a plurality of terminals formed on a lower surface thereof; a piezoelectric device formed in the case; a temperature measuring device formed on the lower surface of the case and having a thin film form; and a cover member enclosing an upper portion of the case.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: March 27, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soon Bum Lee, Sang Yeob Cha, Jong Pil Lee, Katsushi Yasuda
  • Patent number: 9762180
    Abstract: An oscillator includes a front side voltage divider, a rear side voltage divider, and an oscillation unit. The front side voltage divider includes a first resistor connected between a first and second potential sources, and a first output terminal configured to changeably connect to a connection position in the first resistor so as to vary an obtained output voltage. The rear side voltage divider includes a second resistor connected between the first output terminal and a third potential source; and a second output terminal configured to changeably connect to a connection position in the second resistor so as to vary an obtained output voltage. The oscillation unit includes a variable capacitance element with a capacitance varied according to the output voltage from the second output terminal. The oscillation unit varies an output frequency based on a variation in a resonance point associated with a variation in the capacitance.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: September 12, 2017
    Assignee: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Tsuyoshi Shiobara
  • Patent number: 9716501
    Abstract: A CR oscillation circuit includes inverters forming a loop for circulation of a signal, CR time constant circuits inserted into the loop for delaying the signal, each circuit having a capacitor, a plurality of resistance elements, and a transmission gate that selects an arbitrary resistance element of the plurality of resistance elements as a charge and discharge path of the capacitor, and a gate voltage generation circuit as means for outputting a gate voltage for controlling ON/OFF of each transmission gate that outputs a constant voltage in conjunction of a threshold voltage of a field-effect transistor as a gate voltage for turning ON the transmission gate.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: July 25, 2017
    Assignee: Seiko Epson Corporation
    Inventor: Akira Shirao
  • Patent number: 9703963
    Abstract: A method of energy usage data privacy preservation is described. The method includes downloading energy usage data and a signature from a repository. The method includes determining whether the signature is that of a utility. When the signature is not that of the utility, the method includes rejecting the energy usage data. When the signature is that of the utility, the method includes generating noisy data, encrypting a message-signature pair, constructing a proof, and communicating the noisy data, the encrypted message-signature pair, and the proof to a third party. The noisy data is generated by adding random noise to the energy usage data. The message-signature pair includes the energy usage data and a verified signature. The proof is configured to establish that the encrypted message-signature pair and the noisy data are members of a corresponding proof language.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: July 11, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Arnab Roy, Daisuke Mashima
  • Patent number: 9660581
    Abstract: An oscillation circuit includes a circuit for oscillation, a first frequency adjustment circuit for adjusting a frequency, and a first terminal. The oscillation circuit has a first mode in which the circuit for oscillation and the first frequency adjustment circuit are electrically connected to each other and the first frequency adjustment circuit and the first terminal are not electrically connected to each other, and a second mode in which the circuit for oscillation and the first frequency adjustment circuit operate and a terminal on a side where a signal of the first frequency adjustment circuit is output and the first terminal are electrically connected to each other.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: May 23, 2017
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Yosuke Itasaka, Atsushi Kiyohara
  • Patent number: 9612607
    Abstract: A simple bandgap current generator combines a PTAT (proportional to absolute temperature) base-emitter voltage (VBE) measured across two binary junction devices (?VBE=VBE1?VBE2) with a current that is varied by an nWell resistor with a positive temperature coefficient to produce a CTAT (complementary to absolute temperature) current instead of PTAT reference current. One of the base-emitter voltages is constrained to be VBE1=VBE(1?T). This reduces the temperature dependency of a reference current generated by the bandgap generator. This reference current may be used to generate a bandgap reference voltage by adding an IR drop to a diode voltage or to a base-emitter voltage. The simple bandgap circuit is significantly smaller in size than a precision bandgap circuit, but still provides a voltage and/or a current reference signal having a good accuracy.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: April 4, 2017
    Assignee: TEXAS INSTUMENTS INCORPORATED
    Inventors: Ajay Kumar, Rahul Bhandarkar
  • Patent number: 9608600
    Abstract: Apparatus and methods are disclosed related to tuning a resonant frequency of an LC circuit. In some implementations, the LC circuit can be embodied in a low noise amplifier (LNA) of a receiver. The receiver can include a component configured to generate an indicator of received signal strength indication (RSSI) of a radio frequency (RF) signal received by the receiver. A control block can adjust the resonant frequency of the LC circuit based at least in part on the indicator of RSSI. As another example, the receiver can include an oscillator, such as a VCO, separate from the LC circuit that can be used to tune the resonant frequency of the LC circuit. These apparatus can compensate for variation in a zero imaginary component of an impedance across the LC circuit.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: March 28, 2017
    Assignee: Analog Devices, Inc.
    Inventor: Hyman Shanan
  • Patent number: 9548744
    Abstract: In some examples, compensating for hysteretic characteristics of a crystal oscillator in a timing circuit includes obtaining a plurality of successive temperature measurements. From the plurality of successive temperature measurements, a temperature gradient having a sign and a magnitude can be determined. A frequency compensation parameter can then be determined based on any combination of two or more factors chosen from a set of factors including a temperature measurement, the sign of the temperature gradient, and the magnitude of the temperature gradient. A frequency error of the timing circuit can then be compensated based on the frequency compensation parameter.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: January 17, 2017
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vishal Agarwal, Mahadevan Srinivasan
  • Patent number: 9484855
    Abstract: Clock synchronization error is corrected or minimized by fitting a parabolic f(T) function to the crystal's data, and compensating for sampling period drift in an Analog to Digital Converter (ADC) at various temperatures.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: November 1, 2016
    Assignee: Cornell University
    Inventors: Harold Cheyne, Adam Strickhart, Peter Marchetto, Raymond Mack
  • Patent number: 9455719
    Abstract: A first oscillator generates a first frequency. A second oscillator generates a second frequency. A controller determines a difference between the first frequency and the second frequency and determines a non-ideal component of the first frequency in dependence on a temperature response of the first and second oscillators.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: September 27, 2016
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Philip Mattos, Peter Bagnall
  • Patent number: 9433105
    Abstract: An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Richard Stephen Graf, Thomas Edward Lombardi, Sudipta Kumar Ray, David Justin West
  • Patent number: 9397669
    Abstract: A method and device for calibrating an oscillator and a temperature sensor in an electronic device are provided. A same temperature cycle, which includes at least two distinct temperatures, may be used to obtain data to calibrate both the oscillator and the temperature sensor. One of the distinct temperatures may comprise an ambient temperature, and a second distinct temperature may comprise a heated temperature greater than the ambient temperature. The electronic device (or a calibration device separate from the electronic device) may receive the readings from the oscillator and the temperature sensor at the two distinct temperatures in the same temperature cycle, and may determine an oscillator correction factor and a temperature sensor correction factor.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: July 19, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Deepak Pancholi, Bhavin Odedara
  • Patent number: 9385649
    Abstract: Cancelling a delay in a comparator of an RC oscillator configured to generate a clock pulse, including: selectively coupling a plurality of current sources to a first capacitor, a second capacitor, and a resistor, wherein the plurality of current source charge and discharge the first capacitor and the second capacitor, and charge the resistor; charging the first capacitor at a higher rate during a first phase of the clock pulse than a second phase of the clock pulse, and charging the second capacitor at a higher rate during a third phase of the clock pulse than a fourth phase of the clock pulse; and generating the clock pulse by enabling the comparator to compare a voltage on the first or second capacitor with a voltage on the resistor.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: July 5, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Le Wang, Arash Mehrabi
  • Patent number: 9379662
    Abstract: A system using temperature tracking for a controlled oscillator (CO) is provided. The system includes at least one coarse tuning capacitor circuit including a plurality of selectable coarse tuning capacitors operable in at least three modes of operation, thereby allowing switching between each coarse capacitor of the plurality of selectable coarse capacitors when a selected coarse tuning capacitor has reached one of its high tuning range and low tuning range.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: June 28, 2016
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Wing Fai Loke, Chih-Wei Yao
  • Patent number: 9374037
    Abstract: An apparatus having a substrate with an inductor, a first die and a second die is disclosed. The first die may be (i) mounted on the substrate, (ii) configured to vary a frequency of a signal in the inductor, and (iii) fabricated with multiple first masks. The second die may be (i) mounted on the substrate, (ii) configured to excite the signal, and (iii) fabricated with multiple second masks. A particular one of the first masks generally has several designs that customize the first die to several configurations respectively. A particular one of the second masks may have several designs that customize the second die to several configurations respectively. The first die, the second die and the inductor may form a voltage-controlled oscillator. A selected first design and a selected second design generally establish multiple performances of the voltage-controlled oscillator.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: June 21, 2016
    Assignee: M/A-COM Technology Solutions Holdings, Inc.
    Inventors: Wayne M. Struble, Eoin Carey, Ronan G. Brady, Shane M. Collins
  • Patent number: 9361969
    Abstract: A semiconductor device includes a periodic signal generating circuit for generating a periodic signal having a set period regardless of changes in temperature in response to a first trimming signal as a default value and controlling the set period of the periodic signal based on the temperature in response to a second trimming signal, and an internal circuit to perform a set operation in response to the periodic signal.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: June 7, 2016
    Assignee: SK Hynix Inc.
    Inventors: Yong-Ju Kim, Dae-Han Kwon, Hae-Rang Choi, Jae-Min Jang
  • Patent number: 9362929
    Abstract: This disclosure relates to controlling an oscillator based on a measurement of a frequency reference. A controller determines a control value to control the oscillator based on multiple error values. Each error value is indicative of a measurement of a frequency difference between the oscillator and a frequency reference over a period of time. The determination of the error value is further based on an application time value indicative of a time of application of the control value to the oscillator. Since the control value is based on the application time the controller can compensate for inaccuracies arising from both evolution of the oscillator between measurements and applying the correction at a later time after the measurement. Further, since the multiple error values represent a frequency difference over different periods of time, the controller can compensate for wide range of statistical effects.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: June 7, 2016
    Assignee: The University of Sydney
    Inventors: Jarrah Sastrawan, Michael J. Biercuk
  • Patent number: 9362922
    Abstract: The present invention relates to an oscillator circuit, comprising a switched capacitor circuit comprising a parallel circuit with a current input to be supplied with a reference current on one side and being connected to a reference terminal on the other side. The parallel circuit further comprises a first capacitor in a first branch and, in a second branch, a second capacitor connected in-between a first and second switch. A switch control unit comprises a first input coupled to the current input of the parallel circuit and a second input to be supplied with a reference voltage as well as an oscillator output for providing an oscillator signal. The switch control unit is being designed to operate the first and second switch such that, in a charging phase, the first and second capacitor is charged to a respective level depending on the reference voltage and, in a discharging phase, the charge stored on the first capacitor is discharged using the charge stored on the second capacitor.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: June 7, 2016
    Assignee: ams AG
    Inventor: Gregor Schatzberger
  • Patent number: 9362921
    Abstract: A temperature-compensated piezoelectric oscillator as an oscillator includes a piezoelectric resonator incorporating a resonator element, an electronic component (IC) as a circuit element having a function of driving the resonator element and a thermosensor, and a wiring board provided with a conductor film, and the piezoelectric resonator element and the electronic component (IC) are disposed side by side in an area where the conductor film is disposed.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: June 7, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Takuya Owaki, Hideyuki Kanno
  • Patent number: 9344033
    Abstract: A variable capacitance circuit includes a plurality of variable capacitance elements (varicaps) each having the capacitance value controlled in accordance with the inter-terminal voltage applied between the terminals of the variable capacitance element and connected in parallel to each other, has the combined capacitance value of the plurality of variable capacitance elements variable taking a predetermined capacitance value as a base, sets the inter-terminal voltage of at least one of the plurality of variable capacitance elements to a first voltage as a variable voltage, and sets the inter-terminal voltage of the rest of the plurality of variable capacitance elements to a second voltage as a stationary voltage.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: May 17, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Hisahiro Ito
  • Patent number: 9342054
    Abstract: Various embodiments of the invention relate generally to real-time clock circuit, and more particularly to systems, devices and methods of integrating two oscillators in one real-time clock circuit to generate accurate time of day over an industrial temperature range. A primary oscillator is employed to generate a first high precision clock while having a higher frequency and consuming more power; a secondary oscillator is employed to generate a second clock that has a low frequency and consumes less power, but may not meet the time accuracy requirement. When the real-time clock is provided with sufficient power (MSN mode), time of day is constantly tracked by the primary oscillator, but when the real-time clock is powered by a battery (SLEEP mode), time of day is tracked by the secondary oscillator while the primary oscillator is switched on at an update frequency to compensate errors in the time of day.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: May 17, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Bertram John White, Nathan Theodore Hackett
  • Patent number: 9325328
    Abstract: An oscillation circuit includes a voltage controlled oscillation circuit that includes a variable capacitance circuit provided with a variable capacitance element whose capacitance value is controlled on the basis of a control voltage and oscillates a vibrator so as to generate an oscillation signal, and a fractional N-PLL circuit that receives the oscillation signal generated by the voltage controlled oscillation circuit and includes a voltage controlled oscillator which controls an oscillation frequency on the basis of control input data (an integral division ratio and a fractional division ratio).
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: April 26, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Mitsuaki Sawada, Yuichi Toriumi