Abstract: A buffer circuit includes an input terminal configured to receive an input signal, an output terminal, an inverter, and a resistor-capacitor (RC) circuit coupled in series with the inverter between the input terminal and the output terminal. The RC circuit includes an NMOS transistor coupled between an RC circuit output terminal and a reference node, a resistor coupled between the RC circuit output terminal and a power supply node, and a capacitor coupled between the RC circuit output terminal and one of the power supply node or the reference node, and the inverter and the RC circuit are configured to generate an output signal at the output terminal based on the input signal.

Abstract: In a timing signal generator having a resonator, one or more temperature-sense circuits generate an analog temperature signal and a digital temperature signal indicative of temperature of the resonator. First and second temperature compensation signal generators to generate, respectively, an analog temperature compensation signal according to the analog temperature signal and a digital temperature compensation signal according to the digital temperature signal. Clock generating circuitry drives the resonator into mechanically resonant motion and generates a temperature-compensated output timing signal based on the mechanically resonant motion, the analog temperature compensation signal and the digital temperature compensation signal.

Abstract: The present disclosure relates to a compact temperature sensor displaying a temperature-resistance relationship. The temperature sensor comprises cross-coupled CMOS technology exhibits negative resistance, resulting in resistance-sensitive temperature sensing and amplification. The temperature sensor can be tuned to operate across a wide range of temperatures via modulation of a biasing current. The present disclosure further relates to subthreshold operation of CMOS technology.

Abstract: A buffer circuit includes an input terminal configured to receive an input signal, an output terminal, a buffer, and an RC circuit coupled in series with the buffer between the input terminal and the output terminal. The RC circuit includes a first transistor and an RC network including a resistor and a capacitor, the first transistor is coupled in series with the resistor between a power supply node and a reference node, and the buffer and the RC circuit are configured to generate an output signal based on the input signal.

Abstract: In a timing signal generator having a resonator, one or more temperature-sense circuits generate an analog temperature signal and a digital temperature signal indicative of temperature of the resonator. First and second temperature compensation signal generators to generate, respectively, an analog temperature compensation signal according to the analog temperature signal and a digital temperature compensation signal according to the digital temperature signal. Clock generating circuitry drives the resonator into mechanically resonant motion and generates a temperature-compensated output timing signal based on the mechanically resonant motion, the analog temperature compensation signal and the digital temperature compensation signal.

Abstract: A semiconductor device 1 includes: a first oscillator 11_RC1 configured to operate at a detected voltage, the first oscillator having first temperature dependency; a second oscillator 11_RC4 configured to operate at the detected voltage, the second oscillator having second temperature dependency; a count unit configured to count an output of the first oscillator and an output of the second oscillator, the output of the first oscillator and the output of the second oscillator being supplied to the count unit; an arithmetic unit configured to calculate a count value CNT (T1) of the first oscillator and a count value CNT (T4) of the second oscillator, the count values of the first and second oscillators being counted by the count unit; and a determining unit configured to compare an output of the arithmetic unit with a threshold value to output a detected result signal corresponding to a result of the comparison.

Abstract: A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.

Abstract: An electronic apparatus includes a wiring board. The wiring board includes a wiring and a through-hole and is provided by dividing a multi-board providing board into the wiring board. The electronic apparatus further includes a circuit component having a surface mounting structure, mounted to the wiring board, and electrically connected to the wiring. A side wall of the wiring board has a cut portion that is provided when cutting and dividing the multi-board providing board. In the wiring board, the through-hole is formed adjacent to the cut portion without arranging the circuit component between the cut portion and the through-hole.

Abstract: In-package temperature is controlled with higher accuracy. To this end, a temperature control circuit includes a temperature sensor arranged in a package and detecting temperature in the package, a heater current detection circuit detecting a driving amount of a heater, a target temperature generation circuit generating a target temperature from an intended temperature of a resonator and a detection value of the driving amount detected by the heater current detection circuit, a heater current driver controlling the heater so that the detection temperature detected by the temperature sensor coincides with the target temperature, and an Nth-order correction circuit receiving the detection value of the driving amount detected by the heater current detection circuit or a signal based on the target temperature and cancelling influence of a second or higher order fluctuation component generated in the heater current detection circuit on temperature of the resonator.

Abstract: A temperature-controlled and temperature-compensated oscillating device and a method of temperature control and temperature compensation is disclosed. The operating temperature of a frequency source is adjusted by driving a heater to a target temperature when the ambient temperature is in a first range between a first temperature and a second temperature higher than the third temperature. The frequency variation of the frequency source resulted from a variation of the ambient temperature is reduced by applying a voltage to the frequency source when the ambient temperature is in a second range between a third temperature and a fourth temperature higher than the third temperature. The third temperature is higher than the first temperature.

Abstract: The disclosed embodiments relate to methods, systems and apparatus for dynamic temperature aware functional safety. The disclosed embodiments provide adaptive techniques to track extended dynamic temperature range of a System-on-Chip (SOC) and automatically tune critical IP components of the SOC so that system can operate reliably even at high temperatures. The disclosed embodiments relax the overdesign of the SOC components by reusing existing components such as a ring oscillator to determine temperature at different regions of the SOC. In one embodiment, the disclosed principles use a Calibrated Ring Oscillator (CRO) temperature sensors. The CRO-based temperature sensors provide fast temperature measurement suitable for detecting dynamic temperature ranges and temperature rate of change. The CROs are existing on the SOC and do not require addition of additional sensors.

Abstract: An embodiment of the present disclosure relates to a device comprising an electronic circuit; an oscillation circuit comprising a quartz crystal, configured to provide a clock signal to the electronic circuit; and a heater configured to increase the temperature of the quartz crystal.

Abstract: In a timing signal generator having a resonator, one or more temperature-sense circuits generate an analog temperature signal and a digital temperature signal indicative of temperature of the resonator. First and second temperature compensation signal generators to generate, respectively, an analog temperature compensation signal according to the analog temperature signal and a digital temperature compensation signal according to the digital temperature signal. Clock generating circuitry drives the resonator into mechanically resonant motion and generates a temperature-compensated output timing signal based on the mechanically resonant motion, the analog temperature compensation signal and the digital temperature compensation signal.

Abstract: A control circuit switches an oscillation circuit from a second operation mode to a first operation mode. When a first predetermined signal is detected and mode switching permission information indicates that the switching from the second operation mode to the first operation mode is permitted, then the oscillation circuit switches from the second operation mode to the first operation mode. When the first predetermined signal is not detected and the mode switching permission information indicates that the switching from the second operation mode to the first operation mode is not permitted, then the oscillation circuit continues in the second operation mode.

Abstract: Examples of increasing yield and operating temperature range of transmitters are disclosed. In one example, a transmitter has an a thin-film bulk acoustic (FBAR) resonator. The transmitter may be a Bluetooth Low Energy (BLE) transmitter. In this example, the FBAR-based BLE transmitter does not require or have a phase locked loop, and does not require or have a crystal reference. The FBAR-based BLE transmitter may have an oscillator with a split capacitor array. The oscillator may be a Pierce oscillator with a split capacitor array. The FBAR-based transmitter and calibration methods described herein provide a greater yield and wider operating range than prior transmitters.

Abstract: An integrated circuit device includes an oscillation circuit that generates an oscillation signal by causing a resonator to oscillate, a temperature compensation circuit that performs temperature compensation of an oscillation frequency of the oscillation circuit, an output circuit that outputs a clock signal based on the oscillation signal, a first regulator that generates a first regulated power supply voltage based on a power supply voltage and supplies the first regulated power supply voltage to the temperature compensation circuit, and a second regulator that generates a second regulated power supply voltage based on the power supply voltage and supplies the second regulated power supply voltage to the output circuit.

Abstract: A frequency reference generator includes (i) an integrated frequency source having drive circuitry that drives a resonant (e.g., non-trimmable LC) tank to generate an oscillator signal, (ii) at least one temperature sensor that generates at least one measured temperature signal, and (iii) a frequency-adjustment circuit that adjusts the oscillator signal frequency to generate the frequency reference based on the measured temperature signal and a (e.g., sample-specific) mapping from temperature to a corresponding frequency-adjustment parameter (e.g., a divisor value for a fractional frequency divider). In some embodiments, a Colpitts oscillator generates the oscillator signal based on the measured temperature signal, where the Colpitts oscillator has voltage/temperature-compensation circuitry that compensates for variations in power supply voltage and operating temperature. Such frequency reference generators achieve substantial PVT insensitivity with as little as a single 1T-trim or even no trim at all.

Abstract: An integrated circuit device includes a digital signal processing circuit that generates frequency control data by performing a temperature compensation process by a neural network calculation process based on temperature detection data and an amount of change in time of the temperature detection data, and an oscillation signal generation circuit that generates an oscillation signal of a frequency set by the frequency control data using a resonator.

Abstract: In an embodiment an oscillator device includes a ring oscillator circuit with at least one delay stage with an output of a last delay stage fed back to an input of a first delay stage, wherein each of the delay stages is configured to receive a charging current and to provide a delay that is dependent on the charging current and at least one of the delay stages includes a metal-oxide-semiconductor field-effect transistor and a bias circuit including an output terminal coupled to an input terminal of the ring oscillator circuit, wherein the bias circuit is configured to receive a temperature-independent reference voltage and includes a current source with a main NMOS-transistor, the current source configured to provide a control current to the ring oscillator circuit which is proportional to a difference of the temperature-independent reference voltage and a gate-source voltage of the main NMOS-transistor, and wherein the gate-source voltage of the main NMOS-transistor includes a negative temperature coefficie

Abstract: In an oscillator device that outputs a frequency signal based on an oscillation frequency of a crystal resonator and a frequency setting value, a frequency difference detector that obtains a difference value corresponding to a frequency difference between the output frequency of the oscillator device and an external clock signal and a temperature detector are disposed. An aging coefficient and a temperature characteristic coefficient are obtained based on a secular change of the difference value obtained in the frequency difference detector and a secular change of the detected temperature during a period where the external clock signal is obtained. Furthermore, a frequency correction value is calculated using the aging coefficient and the temperature characteristic coefficient during a holdover period, and the frequency correction value is added to the frequency setting value.

Abstract: In a timing signal generator having a resonator, one or more temperature-sense circuits generate an analog temperature signal and a digital temperature signal indicative of temperature of the resonator. First and second temperature compensation signal generators to generate, respectively, an analog temperature compensation signal according to the analog temperature signal and a digital temperature compensation signal according to the digital temperature signal. Clock generating circuitry drives the resonator into mechanically resonant motion and generates a temperature-compensated output timing signal based on the mechanically resonant motion, the analog temperature compensation signal and the digital temperature compensation signal.

Abstract: An oscillation apparatus includes a correction circuitry including a first amplifier and a second amplifier, and an oscillation circuitry. The first amplifier amplifies a difference between a first voltage having a first temperature characteristic and a second voltage having a second temperature characteristic different from the first temperature characteristic to generate a third voltage having a third temperature characteristic different from both the first temperature characteristic and the second temperature characteristic. The second amplifier amplifies a difference between a sum of the second voltage and the third voltage, and, a feedback voltage, to generate a fourth voltage which corrects an oscillation frequency of an oscillation voltage. The oscillation circuitry outputs the oscillation voltage controlled in frequency based on the fourth voltage.

Abstract: This application relates to methods and apparatus for temperature monitoring for integrated circuits, and in particular to temperature monitoring using a locked-loop circuits, e.g. FLLs, PLLs or DLLs. According to embodiments a locked-loop circuit (200, 600) includes a controlled signal timing module (201, 601), wherein the timing properties of an output signal (SOUT, SFB) are dependent on a value of a control signal and on temperature. A controller (201, 601) compares a feedback signal (SFB) output from the timing module to a reference signal (SREF) and generates a control signal (SC) to maintain a desired timing relationship. A temperature monitor (202) monitors temperature based on the value of the control signal. For FLLs and PLLs the signal timing module may be a controlled oscillator (201).

Abstract: A MEMS resonator system has a micromechanical resonant structure and an electronic processing circuit including a first resonant loop that excites a first vibrational mode of the structure and generates a first signal at a first resonance frequency. A compensation module compensates, as a function of a measurement of temperature variation, a first variation of the first resonance frequency caused by the temperature variation to generate a clock signal at a desired frequency that is stable relative to temperature. The electronic processing circuit further includes a second resonant loop, which excites a second vibrational mode of the structure and generates a second signal at a second resonance frequency. A temperature-sensing module receives the first and second signals and generates the measurement of temperature variation as a function of the first variation of the first resonance frequency and a second variation of the second resonance frequency caused by the temperature variation.

Abstract: A method of an open loop characterization of an electrostatic MEMS based resonator with a varying gap, the method including: converting, via a trans-impedance amplifier circuit, an output current signal of the resonator into a voltage; multiplying the output current signal converted into the voltage, by means of a multiplier circuit, with an AC signal or with a different signal at a frequency of the resonator and carrying a second harmonic signal to a main tone; and measuring a frequency response of a signal cleared of frequencies apart from the main tone using a network analyzer.

Abstract: Physical layer processing methods for network acquisition by remote nodes in wireless communication systems are described herein. New methods for wireless network discovery and synchronization by remote nodes are described herein that utilize spatial (e.g., antenna array) processing algorithms which may achieve enhanced functioning in challenging radio frequency environments, such as those containing interference and multi path distortion effects. These methods may include advantageous use of spatial whiteners and associated pluralities of adaptive beamformers to detect network reference and synchronization signals and estimate their parameters.

Abstract: Described herein is apparatus and system for a digitally controlled oscillator (DCO). The apparatus comprises a voltage regulator to provide an adjustable power supply; and a DCO to generate an output clock signal, the DCO including one or more delay elements, each delay element operable to change its propagation delay via the adjustable power supply, wherein each delay element comprising an inverter with adjustable drive strength, wherein the inverter is powered by the adjustable power supply. The apparatus further comprises a digital controller to generate a first signal for instructing the voltage regulator to adjust a voltage level of the adjustable power supply.

Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.

Abstract: Clock generation and control in a semiconductor system having process, voltage and temperature (PVT) variation. A semiconductor device may include at least first and second ring oscillators, each disposed at locations respectively closest to first and second logic circuits of an operation circuit, and generating first and second oscillating signals. A detecting circuit is configured to perform a predetermined logic operation on the first oscillating signal and the second oscillating signal to generate a first clock signal. A calibration circuit is configured to receive the first clock signal from the detecting circuit and perform a delay control on each of the first ring oscillator and the second ring oscillator to generate a second clock signal for operating the operation circuit.

Abstract: A switched capacitance circuit selectively provides a capacitance across first and second output nodes in response to a selection control signal. The switched capacitance circuit may include a first capacitor coupled between the first output node and a mid-node, a second capacitor coupled between the second output node and the mid-node, and a switching circuit. The switching circuit is configured to switch the first and second capacitors in response to the selection control signal and to provide a bias voltage at the mid-node in response to the selection control signal.

Abstract: A current-mode, multi-stage oscillator converts an oscillating current to an oscillating voltage using one or more current voltage converters on one or more of the output stages of the multi-stage oscillator. The use of current voltage convertors transforms the low output swing (e.g., transistor threshold limited) of the oscillator into a rail-to-rail voltage oscillation with minimal jitter and operational stability over a wide temperature range.

Abstract: In some embodiments, the present disclosure relates to a frequency generator having a resistor network and a capacitor network. The capacitor network has a plurality of capacitors connected in parallel with one another. A comparator is configured to output an oscillating voltage signal. An input of the comparator is connected to the output of the resistor network and the output of the capacitor network. A frequency testing circuit is configured to calculate a frequency of the oscillating voltage signal and determine whether the frequency is within a range of an expected frequency. The frequency testing circuit may also be configured to selectively connect a first plate of the plurality of capacitors to a non-varying voltage or to the input of the capacitor network to adjust a frequency of the oscillating voltage signal.

Abstract: An amplifier circuit includes an input port, an output port, and a reference potential port, an RF amplifier device having an input terminal electrically coupled to the input port, an output terminal electrically coupled to the output port, and a reference potential terminal electrically coupled to the reference potential port. An impedance matching network is electrically connected to the output terminal, the reference potential port, and the output port. The impedance matching network includes a reactive efficiency optimization circuit that forms a parallel resonant circuit with a characteristic output impedance of the peaking amplifier at a center frequency of the fundamental frequency range. The impedance matching network includes a reactive frequency selective circuit that negates a phase shift of the RF signal in phase at the center frequency and exhibits a linear transfer characteristic in a baseband frequency range.

Abstract: An integrated circuit device includes a substrate, a joining part provided on the substrate and joined to a vibrator, and a plurality of bonding pads provided on the substrate. The joining part includes an insulating protective film that covers a part of a surface of the substrate, and no insulating protective film is provided between the adjacent bonding pads.

Abstract: Embodiments of the present invention disclose a time-frequency deviation compensation method, and a user terminal. A temperature compensation exception can be identified and a time-frequency deviation caused by the temperature compensation exception can be compensated by implementing the embodiments of the present invention.

Abstract: A PLL including a VCO with a variable capacitance (such as an LC VCO) including a switched capacitor bank and a varactor, the PLL providing lock range extension over temperature using dynamic capacitor bank switching to dynamically adjust varactor set point based on junction temperature. The varactor is responsive to the Vctrl control voltage to adjust a capacitance of the variable capacitance to control the phase of the PLL signal. Compensation circuitry dynamically adjusts varactor set point by dynamically switching the capacitor bank based in a junction temperature associated with the PLL circuitry, thereby extending PLL lock range over temperature.

Abstract: A reference signal generation device includes a reception unit that receives a reference signal, a first oscillator that includes an atomic oscillator, a first phase comparator that compares a signal output from the first oscillator and the reference signal in phase, a second oscillator that generates a signal to be output outwardly, and a second phase comparator that compares the signal output from the first oscillator and a signal output from the second oscillator in phase. The first oscillator includes a sweeping-result output unit that outputs a sweeping result signal corresponding to a resonance signal obtained by performing frequency sweeping in the first oscillator. The reference signal generation device further includes a determination section that determines a failure state based on the sweeping result signal and at least one of a phase comparison signal of the first phase comparator and a phase comparison signal of the second phase comparator.

Abstract: An oscillator includes a vibrator element, a container in which the vibrator element is housed, at least one of a heating element and a cooling body configured to control the temperature on the inside of the container, an oscillation circuit electrically connected to the vibrator element, a D/A conversion circuit configured to control a frequency output by the oscillation circuit, and a reference-voltage generation circuit configured to supply a voltage to the D/A conversion circuit. The reference-voltage generation circuit is mounted on the inside of the container or on a substrate on which the container is mounted.

Abstract: A single-chip tunable bandpass filter is provided having a bandpass filter circuit with all tuning components for the bandpass filter circuit formed on the single-chip to provide a programmed center frequency for the tunable bandpass filter. The bandpass filter circuit may include, but is not limited to, a plurality of serially coupled singe stage biquad filter circuits coupled to an input formed on the single-chip and configured to provide a bandpass filtered output signal to an output formed on the single-chip. The bandpass filtered output may be provided by an output buffer formed on the single-chip. The single-chip includes at least one tuning input to receive data for tuning stored in a data register formed on the single-chip. The data register provides control bits to the tuning components that include a programmable resistor responsive to the control bits to vary the programmable resistor to adjust programmed center frequency.

Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element, a capacitance circuit connected to the oscillating circuit, and capable of correcting an oscillation frequency of the oscillating circuit, a logic circuit to which a signal output from the oscillating circuit is input, and which is capable of correcting a frequency of the signal, and a control circuit adapted to control an operation of the capacitance circuit and an operation of the logic circuit.

Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range.

Abstract: A system may include a sampling circuit, a temperature calibration system, a phase detector, a virtual phase-locked loop, and a sample rate converter. The sampling circuit may be configured to generate a series of digitally-sampled data at a sampling frequency provided by a local clock. The temperature calibration system may be configured to determine a temperature-based timing compensation with respect to the local clock. The phase detector may be configured to estimate an error of the local clock in view of the reference clock. The virtual phase-locked loop may be configured to generate a virtual clock based on the temperature-based timing compensation and the error. The sample rate converter may be configured to generate a corrected series of digitally-sampled data in response to the virtual clock by interpolating the series of digitally-sampled data to correct for the error.

Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.

Abstract: A piezoelectric device package may include: a case having a plurality of terminals formed on a lower surface thereof; a piezoelectric device formed in the case; a temperature measuring device formed on the lower surface of the case and having a thin film form; and a cover member enclosing an upper portion of the case.

Abstract: An oscillator includes a front side voltage divider, a rear side voltage divider, and an oscillation unit. The front side voltage divider includes a first resistor connected between a first and second potential sources, and a first output terminal configured to changeably connect to a connection position in the first resistor so as to vary an obtained output voltage. The rear side voltage divider includes a second resistor connected between the first output terminal and a third potential source; and a second output terminal configured to changeably connect to a connection position in the second resistor so as to vary an obtained output voltage. The oscillation unit includes a variable capacitance element with a capacitance varied according to the output voltage from the second output terminal. The oscillation unit varies an output frequency based on a variation in a resonance point associated with a variation in the capacitance.

Abstract: A CR oscillation circuit includes inverters forming a loop for circulation of a signal, CR time constant circuits inserted into the loop for delaying the signal, each circuit having a capacitor, a plurality of resistance elements, and a transmission gate that selects an arbitrary resistance element of the plurality of resistance elements as a charge and discharge path of the capacitor, and a gate voltage generation circuit as means for outputting a gate voltage for controlling ON/OFF of each transmission gate that outputs a constant voltage in conjunction of a threshold voltage of a field-effect transistor as a gate voltage for turning ON the transmission gate.

Abstract: A method of energy usage data privacy preservation is described. The method includes downloading energy usage data and a signature from a repository. The method includes determining whether the signature is that of a utility. When the signature is not that of the utility, the method includes rejecting the energy usage data. When the signature is that of the utility, the method includes generating noisy data, encrypting a message-signature pair, constructing a proof, and communicating the noisy data, the encrypted message-signature pair, and the proof to a third party. The noisy data is generated by adding random noise to the energy usage data. The message-signature pair includes the energy usage data and a verified signature. The proof is configured to establish that the encrypted message-signature pair and the noisy data are members of a corresponding proof language.

Abstract: An oscillation circuit includes a circuit for oscillation, a first frequency adjustment circuit for adjusting a frequency, and a first terminal. The oscillation circuit has a first mode in which the circuit for oscillation and the first frequency adjustment circuit are electrically connected to each other and the first frequency adjustment circuit and the first terminal are not electrically connected to each other, and a second mode in which the circuit for oscillation and the first frequency adjustment circuit operate and a terminal on a side where a signal of the first frequency adjustment circuit is output and the first terminal are electrically connected to each other.

Abstract: A simple bandgap current generator combines a PTAT (proportional to absolute temperature) base-emitter voltage (VBE) measured across two binary junction devices (?VBE=VBE1?VBE2) with a current that is varied by an nWell resistor with a positive temperature coefficient to produce a CTAT (complementary to absolute temperature) current instead of PTAT reference current. One of the base-emitter voltages is constrained to be VBE1=VBE(1?T). This reduces the temperature dependency of a reference current generated by the bandgap generator. This reference current may be used to generate a bandgap reference voltage by adding an IR drop to a diode voltage or to a base-emitter voltage. The simple bandgap circuit is significantly smaller in size than a precision bandgap circuit, but still provides a voltage and/or a current reference signal having a good accuracy.

Abstract: Apparatus and methods are disclosed related to tuning a resonant frequency of an LC circuit. In some implementations, the LC circuit can be embodied in a low noise amplifier (LNA) of a receiver. The receiver can include a component configured to generate an indicator of received signal strength indication (RSSI) of a radio frequency (RF) signal received by the receiver. A control block can adjust the resonant frequency of the LC circuit based at least in part on the indicator of RSSI. As another example, the receiver can include an oscillator, such as a VCO, separate from the LC circuit that can be used to tune the resonant frequency of the LC circuit. These apparatus can compensate for variation in a zero imaginary component of an impedance across the LC circuit.