Frequency Stabilization Patents (Class 331/175)
  • Patent number: 9577647
    Abstract: A voltage controlled oscillator arrangement is disclosed. The arrangement includes a voltage controlled oscillator and a bypass component. The voltage controlled oscillator has an output and a tuning port. The output provides an output signal at an operating frequency. The tuning port is configured to select the operating frequency according to an applied voltage. The voltage controlled oscillator has active portions and inactive portions. During the active portions, the output signal is at a non-zero value. The bypass component is configured to apply a bypass compensating signal to the tuning port during the active portions of the voltage controlled oscillator. The bypass compensating signal compensates for an oscillator temperature of the voltage controlled oscillator.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: February 21, 2017
    Assignee: Infineon Technologies AG
    Inventor: Johann Peter Forstner
  • Patent number: 9490744
    Abstract: Oscillator regulation circuitry is provided for regulating a frequency of an output signal generated by an oscillator. Oscillator regulation circuitry has frequency sensing circuitry for sensing the frequency of the output signal and generating a first signal depending on the frequency, and control circuitry which generates the oscillator control signal based on the comparison between the first signal and a non-oscillating reference signal. The frequency sensing circuitry includes at least one switched capacitor. This approach provides improved noise reduction, less sensitivity to process, temperature and voltage variations, and a more linear scaling of the frequency with the reference signal, compared to previous techniques.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: November 8, 2016
    Assignee: The Regents of the University of Michigan
    Inventors: Taekwang Jang, Dennis Michael Sylvester, David Theodore Blaauw
  • Patent number: 9429969
    Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: August 30, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Tae Youn Kim, Robert Mark Englekirk
  • Patent number: 9397637
    Abstract: A low-power voltage controlled oscillator is provided. The voltage controlled oscillator includes (2n+1) first circuit components (n is an integer of one or more). An output terminal of the first circuit component in a k-th stage (k is an integer of one or more and 2n or less) is connected to an input terminal of the first circuit component in a (k+1)-th stage. An output terminal of the first circuit component in a (2n+1)-th stage is connected to an input terminal of the first circuit component in a first stage. One of the first circuit components includes a second circuit component and a third circuit component whose input terminal is connected to an output terminal of the second circuit component. The third circuit component includes a first transistor and a second transistor whose source-drain resistance is controlled in accordance with a signal input to a gate through the first transistor.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: July 19, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Yoshiyuki Kurokawa, Takayuki Ikeda
  • Patent number: 9024699
    Abstract: Various techniques for generating an output clock based on a reference clock. This disclosure relates to generating an output clock signal based on a reference clock signal. In one embodiment, a method includes generating, using information received from a control circuit, an output clock signal using both a first number of edges or an input clock signal and a second, different number of edges of the input clock signal. In this embodiment, the control circuit runs at a frequency that is less than a frequency of the input clock signal. The received information may indicate, for a pulse of the output clock signal, whether the pulse should be generated using the first number of edges or the second number of edges. In some cases, the second number of edges may be the first number of edges plus one. The first and second number of edges may be programmable quantities.
    Type: Grant
    Filed: January 21, 2013
    Date of Patent: May 5, 2015
    Assignee: Apple Inc.
    Inventors: Kleanthes G. Koniaris, Erik P. Machnicki, Shane J. Keil
  • Patent number: 8994465
    Abstract: A method for reducing the phase noise of a oscillator includes monitoring a phase slope of a resonator, and controlling the resonator to operate the resonator at a high phase slope condition, wherein the resonator comprises a piezoelectric material, or piezoelectric quartz.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: March 31, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Randall L. Kubena, Richard J. Joyce, Harris P. Moyer
  • Patent number: 8988154
    Abstract: A voltage controlled oscillator includes a voltage-to-current converter and a current controlled oscillator, where the voltage-to-current converter is used for converting an input voltage to generate an output current, and the current controlled oscillator is used for generating an output frequency signal according to the output current. In addition, the voltage-to-current converter includes an input terminal, a resistor, a current mirror and a current generating circuit, where the input terminal is for receiving the input voltage; the resistor is coupled to the input terminal; the current mirror is coupled to the resistor, and is used for mirroring a reference current to generate a mirrored current, where the reference current is formed according to at least a current flowing through the resistor; and the current generating circuit is coupled to the current mirror, and is used for generating the output current according to at least the mirrored current.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: March 24, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventor: Huajiang Zhang
  • Patent number: 8975974
    Abstract: A wide frequency, low voltage oscillator includes multiple delay elements, in which each delay element includes two inverters coupled through a latching element into a differential-type configuration. Two current-source PMOS devices bias the latching element in a high-gain region at low-voltage. By coupling these current-source PMOS devices into the delay elements, the start-up voltage of the latching element is reduced. Each delay element is also biased using a replica bias circuit that scales the supply/control voltage of the oscillator and provides the scaled supply/control voltage to control the lower rail of oscillation amplitude. By coupling the replica bias circuit to the lower rail, the lower rail of the oscillation amplitude follows the changes to the supply/control voltage.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 10, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Sameer Wadhwa
  • Patent number: 8963651
    Abstract: One embodiment relates to a method of compensating for crystal frequency variation over temperature. An example method includes obtaining an indication of temperature, computing a temperature compensation value based on the indication of temperature and a piecewise linear temperature compensation approximation, and compensating for a temperature offset in a crystal reference signal by adjusting a division ratio of a fractional divider in a phase-locked loop. The piecewise linear temperature compensation approximation can represent an approximation of frequency error in a crystal reference signal originating from a crystal over temperature. The piecewise linear temperature compensation approximation can be, for example, a linear approximation, a quadratic approximation, or a cubic approximation.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: February 24, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Robert Timothy Edwards, Stephen Mark Beccue
  • Patent number: 8963650
    Abstract: A semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A logic unit adjusts the values of the reference current and reference voltage, according to the reference voltage and reference current trimming codes related to detected ambient temperature and operating voltage.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: February 24, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Tsukasa Oishi, Katsuyoshi Mitsui, Naoki Otani
  • Patent number: 8963649
    Abstract: A voltage controlled oscillator (VCO) includes a current controlled oscillator, a voltage-to-current converter, and a sensing circuit. The sensing circuit includes a delay unit, and the sensing circuit is configured to generate a plurality of compensation control signals in response to a time delay of the delay unit. The voltage-to-current converter is configured to generate a current signal in response to a VCO control signal and the plurality of compensation control signals. The current controlled oscillator is configured to generate an oscillating signal in response to the current signal.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: February 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matt Li, Min-Shueh Yuan, Chih-Hsien Chang
  • Patent number: 8928423
    Abstract: A narrow band receiver or transceiver for processing electrical signals. The narrow band receiver or transceiver includes an amplifier, a voltage controlled oscillator and a tuning assembly comprising at least one control loop for tuning of the voltage controlled oscillator. At least a gain control of the amplifier is coupled to the control loop for simultaneously tuning the output amplitude of the voltage controlled oscillator and the gain of the amplifier. A compensation of the effect of variation on the gain of the amplifier, which includes an LC tank circuit, is performed by using an information in another LC tank circuit of the voltage controlled oscillator in the control loop.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: January 6, 2015
    Assignee: EM Microelectronic-Marin S.A.
    Inventors: Armin Tajalli, Marc Morin
  • Patent number: 8896389
    Abstract: The present disclosure relates to an oscillation circuit including a differential negative resistance element, a resonance circuit connected to the differential negative resistance element, and a stabilization circuit connected in parallel with the negative resistance element to suppress parasitic oscillation. The stabilization circuit includes a variable shunt resistor and an adjusting device for adjusting the shunt resistor.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: November 25, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasushi Koyama, Ryota Sekiguchi
  • Patent number: 8890633
    Abstract: According to an example embodiment, a device includes a resonant circuit configured and arranged to provide a peak current flow at a resonance frequency. A trimming circuit provides variable impedances to the resonant circuit and thereby changes the resonance frequency for the resonant circuit. A driver circuit is configured to generate a trimming signal that oscillates at a desired frequency. A switch circuit couples and decouples the driver circuit to the resonant circuit for driving the resonant circuit with the trimming signal. An amplitude detection circuit detects amplitudes for signals generated in response to the trimming signal being connected to the resonant circuit. A processing circuit correlates detected amplitudes from the amplitude detection circuit with different impedance values of the variable trimming circuit.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: November 18, 2014
    Assignee: NXP B.V.
    Inventor: Sven Simons
  • Patent number: 8884709
    Abstract: A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: November 11, 2014
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Franck Badets, Serge Ramet, Michel Ayraud
  • Patent number: 8878615
    Abstract: The present application discloses a voltage-controlled oscillator device and a method of correcting the voltage-controlled oscillator. The voltage-controlled oscillator device comprises predistortion module, configured to predistort an input voltage to obtain a predistorted voltage; and a voltage-controlled oscillator, configured to generate an output signal with a corresponding oscillation frequency according to the predistorted voltage, wherein the predistortion module corrects a non-linear characteristic of the voltage-controlled oscillator, so that there is a linear relationship between the input voltage and the oscillation frequency of the output signal. The voltage-controlled oscillator device may be applied to a phase-locked circuit in a communication system.
    Type: Grant
    Filed: October 9, 2011
    Date of Patent: November 4, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Yuping Wu, Lan Chen
  • Patent number: 8866556
    Abstract: A phase shift phase locked loop (PSPLL) are described. The phase shift PLL includes a PLL and a phase adjusting circuit coupled to the inputs of the PLL. The phase adjusting circuit has a first input, a first output, a second input, a third input, and a second output. The first output and the second output are coupled to a first input and a second input of the PLL, respectively. The second input of the phase adjusting circuit receives a feedback signal and the third input of the phase adjusting circuit receives a control signal. The phase adjusting circuit receives a reference signal and sends a first output signal and a second output signal based on the reference signal to the PLL to adjust a phase of an output signal of the PLL in an increment less than a time period of the output signal of the PLL.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: October 21, 2014
    Assignee: Analog Bits, Inc.
    Inventor: Alan C. Rogers
  • Patent number: 8860517
    Abstract: An oscillator circuit including a first capacitor provided with a first terminal; a resistor provided with a reference terminal; a first current generator provided with a connection terminal; a second current generator provided with a second connection terminal. Further, the circuit includes a switching matrix between the first and second generators and resistor and the at least one first capacitor.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: October 14, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventor: Mauro Giacomini
  • Patent number: 8836434
    Abstract: A digital frequency synthesizer with an automatic calibration system. The digital frequency synthesizer is calibrated by initiating a coarse tuning operation to rapidly reach a preliminary frequency that is proximate to the desired final frequency. A calibration procedure is then executed for adjusting gain in the frequency synthesizer based on the preliminary frequency. This test involves applying one or more test signals to the frequency synthesizer and measuring a signal generated in the frequency synthesizer. This measured signal corresponds to a gain response of the circuit at the preliminary frequency. When the expected gain is known, any difference relative to the gain of the measured signal is used to adjust the gain in a circuit of the frequency synthesizer such that the actual gain substantially matches the expected gain.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: September 16, 2014
    Assignee: Icera Inc.
    Inventors: Abdellatif Bellaouar, Ahmed R. Fridi, Sher Jiun Fang, Hamid Safiri
  • Patent number: 8816781
    Abstract: An all-digital frequency detector is provided, which includes a phase-frequency detector receiving a reference clock and an input clock, two sample/hold circuits sampling the phase-frequency detector outputs responsive to a ninety-degree phase shifted reference clock and a ninety-degree phase shifted input clock, a plurality of logical operators to generate an output frequency detection signal and a output clock responsive to the difference between the reference clock and the input clock.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: August 26, 2014
    Inventor: Phuong Huynh
  • Patent number: 8810323
    Abstract: In one embodiment, a voltage-controlled oscillator (VCO) is provided that includes: a plurality of differential inverters coupled to form a loop, each differential inverter having a differential pair of transistors configured to steer a tail current from a current source, the current source sourcing the tail current responsive to a bias voltage, wherein each transistor in the differential pair couples to a power source through a corresponding switching-capacitor circuit; and a bias circuit configured to generate the bias voltage such that a transconductance for each transistor in the differential pairs is proportional to a factor that is a function of a ratio of transistor widths within the bias circuit.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: August 19, 2014
    Inventor: Mohammad Ardehali
  • Patent number: 8810329
    Abstract: An LC oscillator tank that generates a tank oscillation at a phase substantially equal to a temperature null phase. The oscillator further includes frequency stabilizer circuitry coupled to the LC oscillator tank to cause the LC oscillator tank to operate at the temperature null phase. In one aspect of the disclosure, a feedback loop may split the output voltage of the LC tank into two voltages having different phases, where each voltage is independently transformed into a current through programmable transconductors, The two currents may be combined to form a resultant current which is then applied to the LC tank. The phase of the resultant current is such that the LC tank operates at an impedance condition that achieves frequency stability across temperature.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: August 19, 2014
    Inventors: Nabil M. Sinoussi, Bassel Hanafi
  • Patent number: 8775491
    Abstract: A method for reducing signal edge jitter in an output signal from a numerically controlled oscillator includes processing an input signal with a first accumulator to provide a first accumulator output signal and continuing to use a carry in the processing of the input signal with the first accumulator in the event of an overflow. The method further includes processing the input signal with a second accumulator to provide a second accumulator output signal and rejecting a carry in the processing of the input signal with the second accumulator in the event of an overflow. The method further includes outputting the second accumulator output signal at an output of the numerically controlled oscillator and synchronizing the second accumulator using the first accumulator output signal.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: July 8, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Alexander Buhmann, Marian Keck
  • Patent number: 8773211
    Abstract: An electrical circuit includes a circuit element and a common mode rejection circuit element. The circuit element is configured to operate at a selected frequency within a variable frequency range and the common mode rejection circuit element is configured to reject a common mode current through the circuit element, wherein the common mode rejection circuit element is adjustable.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: July 8, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventor: Andreas Roithmeier
  • Patent number: 8704602
    Abstract: A modulation section including a feedback circuit configured to conduct feedback control of an output signal from a voltage controlled oscillator based on an inputted modulation signal, and a feed-forward circuit configured to calibrate the modulation signal and outputting the calibrated modulation signal to the voltage controlled oscillator; a signal output section configured to output, to the modulation section, a predetermined reference signal instead of the modulation signal when a calibration is conducted; and a gain correction section configured to, in a state where the feedback circuit is forming an open loop, calculate a frequency transition amount of the reference signal outputted by the voltage controlled oscillator, and correct a gain used for calibrating the modulation signal at the feed-forward circuit based on the calculated frequency transition amount.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: April 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Kenji Miyanaga, Takayuki Tsukizawa
  • Publication number: 20140077891
    Abstract: A crystal oscillator emulator having a plurality of predetermined operating configurations. The crystal oscillator emulator includes a measurement circuit configured to measure a value of an impedance connected to a select pin of the crystal oscillator emulator, wherein the impedance is external to the crystal oscillator emulator, and generate an output having a value corresponding to the value of the impedance. The storage circuit is configured to store a plurality of values corresponding to the plurality of predetermined operating configurations and select one of the plurality of values based on the output of the measurement circuit. A controller is configured to set an output frequency of the crystal oscillator emulator based on the selected one of the plurality of values.
    Type: Application
    Filed: November 25, 2013
    Publication date: March 20, 2014
    Applicant: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8674777
    Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: March 18, 2014
    Assignee: Marvell International Ltd.
    Inventors: Robert Mack, Timothy Chen
  • Patent number: 8674780
    Abstract: An oscillator includes a nominal frequency output unit, a frequency adjustment amount output unit, a gain output unit, a multiplier, and an adder. The nominal frequency output unit is configured to output a first digital value corresponding to the nominal frequency. The frequency adjustment amount output unit is configured to output a second digital value corresponding to a rate of frequency in order to set a frequency adjustment amount with respect to the nominal frequency using the rate of frequency. The gain output unit is configured to output a third digital value corresponding to a gain to be multiplied by the second digital value. The multiplier is configured to multiply the second digital value by the third digital value, thus outputting a fourth digital value. The adder adds the first digital value and the fourth digital value to output the added result as a setting signal of frequency.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: March 18, 2014
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Kazuo Akaike, Tsukasa Kobata, Shinichi Sato, Mitsuaki Koyama
  • Patent number: 8665030
    Abstract: A voltage-controlled oscillator circuit includes a first transistor, a second transistor, a first resonator circuit, a second resonator circuit, a first current path and a second current path. A drain of the first transistor is coupled to a gate of the second transistor and to a first end of the first resonator circuit. A source of the first transistor is coupled to the first current path and to a first end of the second resonator circuit. A drain of the second transistor is coupled to a gate of the first transistor and to a second end of the first resonator circuit. A source of the second transistor is coupled to the second current path and a second end of the second resonator circuit.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: March 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ying-Ta Lu, Hsien-Yuan Liao, Hsiao-Tsung Yen, Ho-Hsiang Chen, Chewn-Pu Jou
  • Publication number: 20140035690
    Abstract: The present invention relates to a voltage change compensation type oscillator and a method of compensating an error of an oscillator, which includes a voltage level detecting unit; a current level adjusting unit; and an oscillating core unit for generating and outputting a clock signal by receiving a power supply voltage and an output current of the current level adjusting unit, wherein the current level adjusting unit adjusts the output current in proportion to an increase of the voltage level detected by the voltage level detecting unit, thus remarkably reducing a frequency error of the clock signal in spite of changes in voltage.
    Type: Application
    Filed: December 6, 2012
    Publication date: February 6, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Soo Woong Lee
  • Patent number: 8643442
    Abstract: An oscillator circuit includes a signal generator having a compensation frequency output node that provides a compensation frequency signal at the compensation frequency output node. A pulse generator having a pulsed signal output node and a pulse generator input node is coupled to the compensation frequency output node and converts the compensation frequency signal into a series of compensation binary pulses having a constant pulse duration regardless of variations in the duty cycle of the compensation binary pulses. An oscillator module having at least two capacitors, an oscillator output node and a pulsed signal input node is coupled to the pulsed signal output node, and provides an output signal that is at a frequency dependent on charging rates of the capacitors. Drift variations in the capacitors are offset by variations in a duty cycle of the compensation binary pulses supplied in order to maintain constant charging rates of the capacitors.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: February 4, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Meng Wang
  • Patent number: 8618890
    Abstract: A driver circuit includes a comparator (drive signal generation section) that generates a drive signal based on a signal obtained by converting an oscillation current of a vibrator that has been input via a first signal line into a voltage using an I/V conversion circuit (current/voltage conversion section), and supplies the drive signal to the vibrator via a second signal line, an oscillation detection circuit (oscillation detection section) that detects whether or not the oscillation current has reached a predetermined value after the vibrator has started to oscillate, a startup oscillation circuit (startup oscillation section) that assists an oscillation operation of the vibrator until the oscillation current reaches the predetermined value, and a switch that separates a capacitor from the second signal line until the oscillation current reaches the predetermined value, and connects the capacitor to the second signal line when the oscillation current has reached the predetermined value.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: December 31, 2013
    Assignees: Seiko Epson Corporation, Seiko NPC Corporation
    Inventors: Yoshinao Yanagisawa, Masahiro Oshio, Takayuki Kikuchi, Toshihiro Nishida, Masayuki Takahashi
  • Patent number: 8610513
    Abstract: A crystal oscillator is provided, which varies a frequency drift compensation according to a power consumption and compensates a frequency drift characteristic caused by heat. An adder is used to add a temperature compensation control voltage from a temperature compensation circuit, an oscillating frequency control voltage from an AFC circuit, and a frequency drift compensation voltage corresponding to the power consumption from a frequency drift compensation circuit. A voltage added by the adder is outputted to voltage-variable capacitor elements and, which respectively are connected to an input side and an output side of an inverter IC that is connected in parallel to a crystal oscillating unit.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: December 17, 2013
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Ken Yamamoto
  • Patent number: 8594608
    Abstract: A synthesizer includes a synthesizer unit for generating a local oscillation signal based on a reference oscillation signal output from a reference oscillation unit including a MEMS resonator, a frequency fluctuation detector for detecting a frequency fluctuation of the MEMS resonator, and a frequency adjuster for adjusting a frequency of the local oscillation signal based on the frequency fluctuation detected by the frequency fluctuation detector. This synthesizer can output a signal with a stable frequency, even when an MEMS resonator demonstrating a large fluctuation in an oscillation frequency to temperatures is used.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Akihiko Namba, Yasunobu Tsukio
  • Patent number: 8576021
    Abstract: A circuit block which comprises a non-linear capacitor with two different values of capacitance dependent on a value of a voltage of a resonant signal on the capacitor; a plurality of second capacitors each coupled to a respective switch to enable a said second capacitor to be switched in or out of parallel connection with the nonlinear capacitor; and a tuning control, coupled to the second capacitor switches, and sensing an amplitude of the resonant signal. The tuning control circuit is configured to control the second capacitor switches to successively switch the second capacitors in/out of parallel connection with the non-linear capacitor dependent on the amplitude of the resonant signal until the non-linear capacitor has substantially a single one of two different values, such that in a resonant circuit the circuit block then behaves as a fixed value capacitor.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: November 5, 2013
    Assignee: Cambridge Resonant Technologies Ltd.
    Inventor: Nicholas Patrick Roland Hill
  • Patent number: 8575819
    Abstract: Microelectromechanical resonators include a resonator body with a built-in piezoelectric-based varactor diode. This built-in varactor diode supports passive frequency tuning by enabling low-power manipulation of the stiffness of a piezoelectric layer, in response to controlling charge build-up therein at resonance. A resonator may include a composite stack of a bottom electrode, a piezoelectric layer on the bottom electrode and at least one top electrode on the piezoelectric layer. The piezoelectric layer includes a built-in varactor diode, which is defined by at least two regions having different concentrations of electrically active dopants therein.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: November 5, 2013
    Assignee: Integrated Device Technology, inc.
    Inventors: Harmeet Bhugra, Ashwin Samarao
  • Patent number: 8570112
    Abstract: A MEMS oscillator having a feedback-type oscillation circuit including a MEMS resonator and an amplifier, a voltage control unit operable to control a bias voltage applied to an oscillating member of the MEMS resonator, and an auto gain control unit which receives an output from the amplifier and, based on a level of the output, to output an amplitude control signal for controlling a gain of the amplifier to the amplifier such that the level of the output from the amplifier comes to be a predetermined level, wherein the voltage control unit controls the bias voltage applied to the oscillating member based on an operating temperature of the MEMS resonator such that a peak gain of the MEMS resonator comes to have a predetermined value regardless of the operating temperature, and the voltage control unit derives the operating temperature of the MEMS resonator by monitoring the amplitude control signal.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: October 29, 2013
    Assignee: Panasonic Corporation
    Inventors: Takehiko Yamakawa, Tomohiro Iwasaki, Kunihiko Nakamura, Keiji Onishi
  • Patent number: 8552806
    Abstract: An apparatus for providing clock and a method thereof are provided. The provided apparatus includes a frequency generation unit and a control unit. The frequency generation unit decides amplitude of a clock signal to be a first amplitude or a second amplitude in response to a mode signal. The frequency generation unit converts an external oscillation signal into the clock signal. The control unit receives the clock signal, and outputs the mode signal in response to a system status signal. The control unit outputs the clock signal to external when determining that the clock signal has a stable oscillation. When the system status signal is a power on signal, the first amplitude is used as the amplitude of the clock signal, and when the system status signal is a power off signal, the second amplitude smaller than the first amplitude is used as the amplitude of the clock signal.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: October 8, 2013
    Assignee: Altek Corporation
    Inventor: Yueh-Chang Chen
  • Patent number: 8552807
    Abstract: In one exemplary implementation, an electronic apparatus includes: a reference clock source, for generating a reference clock; a global navigation satellite system (GNSS) receiver for receiving satellites signals and the reference clock, comprising: a monitoring circuit, for monitoring a status of the GNSS receiver to generate a monitoring result; and a compensating circuit, coupled to the reference clock source and the monitoring circuit, for compensating the reference clock according to the monitoring result.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: October 8, 2013
    Assignee: Mediatek Inc.
    Inventor: Cheng-Yi Ou-Yang
  • Patent number: 8553827
    Abstract: A Phase-Locked Loop (PLL) includes a Phase-to-Digital Converter (PDC), a programmable digital loop filter, a Digitally-Controlled Oscillator (DCO), and a loop divider. Within the PDC, phase information is converted into a stream of digital values by a charge pump and an Analog-to-Digital Converter (ADC). The stream of digital values is supplied to the digital loop filter which in turn supplies digital tuning words to the DCO. A number of types of ADCs can be used for the ADC including a continuous-time delta-sigma oversampling Digital ADC and a Successive Approximation ADC. The voltage signal on the charge pump output is a small amplitude midrange voltage signal. The small voltage amplitude of the signal leads to numerous advantages including improved charge pump linearity, reduced charge pump noise, and lower supply voltage operation of the overall PLL.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: October 8, 2013
    Assignee: Qualcomm Incorporated
    Inventor: Gang Zhang
  • Patent number: 8525605
    Abstract: A MEMS oscillator including: an oscillator unit being capable of outputting an output from an amplifier as an original oscillator signal that includes a feedback type oscillator circuit including a MEMS resonator and an amplifier, and an automatic gain controller receiving the output from the amplifier and controlling a gain of the amplifier based on a level of the output to maintain a level of the output from the amplifier constant; and a corrector unit that receives the original oscillator signal, that generates from the original oscillator signal a signal of a predetermined set frequency, and that outputs the generated signal of the predetermined set frequency as an output signal.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: September 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Takehiko Yamakawa, Kunihiko Nakamura, Keiji Onishi
  • Patent number: 8508304
    Abstract: Reducing a gain of a VCO, which may be used in a serdes system, includes using an oscillator replicating the VCO. The oscillator frequency varies according to PVT conditions of circuit elements of the oscillator, which affect a speed of the circuit elements. A first circuit receives an output of the oscillator to produce a current that varies inversely proportionally to the oscillator frequency. A second circuit injects the current into a power supply line of the VCO. Thus, high VCO frequencies can be attained. By reducing the gain of the VCO, thermal noise contribution of the loop resistor and the loop capacitor required for desired loop bandwidth are reduced. During fast corner conditions, minimal current is injected into the VCO. During slow corner conditions, high current is injected into the VCO. These help keep VCTRL of the PLL loop close to a mid-rail operating region.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: August 13, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Vishnu Ravinuthula
  • Patent number: 8502611
    Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Osada
  • Patent number: 8494455
    Abstract: Methods and apparatus for a resonant transmit/receive switch with transformer gate/source coupling. The resonant transmit/receive (T/R) switch includes a switchable inductor having a first inductance value for use in receive (Rx) mode and a second inductance value for use in transmit (Tx) mode. The first inductance value is used for input matching to a low noise amplifier in Rx mode. The second inductance value is selected to resonant with parasitic capacitance of the antenna port to produce a high impedance in Tx mode. In one implementation, the switchable inductor is gate sourced coupled to at least one of first and second inductors of a low noise amplifier (LNA), thereby allowing use of smaller inductors due to the resulting coupling factor.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: July 23, 2013
    Assignee: QUALCOMM, Incorporated
    Inventor: Ngar Loong A. Chan
  • Patent number: 8471642
    Abstract: Embodiments of the invention relate to resonant circuits; particularly but not exclusively the embodiments relate to resonant circuits in RPID (radio frequency identification) responsive to a wide frequency range. A controllable electric resonator comprising an inductor coupled to a first capacitor to form a resonant circuit, the resonator further comprising a controllable element, a second capacitor controllable coupled across said first capacitor by said controllable element, and a control device to control said controllable element such that a total effective capacitance of said first and second capacitor varies over a duty cycle of an oscillatory signal on said resonator.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: June 25, 2013
    Assignee: Cambridge Resonant Technologies Ltd.
    Inventor: Nicholas Patrick Roland Hill
  • Patent number: 8456243
    Abstract: A failsafe oscillator monitor and alarm circuit receives clock pulses from an external oscillator that if a failure thereto occurs, the failsafe oscillator monitor and alarm circuit will notify a digital processor of the external oscillator failure. The failsafe oscillator monitor and alarm circuit is a very low current usage circuit that charges a storage capacitor with clock pulses from the external oscillator when functioning normally and discharges the storage capacitor with a constant current sink if the external oscillator stops functioning. When the voltage charge on the storage capacitor becomes less than a reference voltage an alarm signal is sent to the digital processor for exception or error handling of the failed external oscillator.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: June 4, 2013
    Assignee: Microchip Technology Incorporated
    Inventors: Enrique Aleman, Jonathan Dillon, Vivien Delport, Joseph Julicher
  • Patent number: 8422194
    Abstract: A Susceptance-Mode Inductor with infinite order resonance cavity which includes an inductor section is formed by a physical inductor coil wound about a permanent magnetic materials, with both ends of the coil connecting to a electric damper and a capacitor of the infinite order resonance cavity; thereby that power is coupled into the incoming end of the infinite order resonance cavity through a radio frequency (RF) radiation electric field and the outgoing end thereof is electrically connected to a set of resonance power storage section, or alternatively the incoming end is connected to electric charge and the outgoing end is connected to the load; accordingly, the resonance of the infinite order resonance cavity, thus allowing to convert the current or electron flow at the magnetic field end into charge output by means of Lorenz force.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: April 16, 2013
    Inventor: Fu-Tzu Hsu
  • Publication number: 20130088302
    Abstract: The present application discloses a voltage-controlled oscillator device and a method of correcting the voltage-controlled oscillator. The voltage-controlled oscillator device comprises predistortion module, configured to predistort an input voltage to obtain a predistorted voltage; and a voltage-controlled oscillator, configured to generate an output signal with a corresponding oscillation frequency according to the predistorted voltage, wherein the predistortion module corrects a non-linear characteristic of the voltage-controlled oscillator, so that there is a linear relationship between the input voltage and the oscillation frequency of the output signal. The voltage-controlled oscillator device may be applied to a phase-locked circuit in a communication system.
    Type: Application
    Filed: October 9, 2011
    Publication date: April 11, 2013
    Inventors: Yuping Wu, Lan Chen
  • Publication number: 20130027148
    Abstract: A complex resonant circuit includes: a first current path performing a first gain control to an AC power signal being supplied; at least one second current path performing a second gain control different from the first gain control to the AC power signal; at least two resonant circuits provided on the respective first and second current paths, having mutually different resonance or antiresonance points for the AC power signals passing through the respective first and second current paths and capturing the respective AC power signals; at least one compensation current path performing a compensation phase shift to the AC power signal; a compensation circuit, provided on the compensation current path, for removing an unnecessary component of the resonant circuit; and an analog operational circuit performing analog addition or subtraction on the AC power signal having passed through the first and second current paths, and the compensation current path.
    Type: Application
    Filed: February 7, 2011
    Publication date: January 31, 2013
    Applicant: MARCDEVICES CO., LTD.
    Inventor: Koichi Hirama
  • Patent number: 8351867
    Abstract: The present invention provides an oscillator and a communication system using the oscillator, in particular, an LC oscillator adapted to lessen phase noise deterioration due to harmonic distortions and increase the amplitude of oscillation, thereby having a favorable low phase noise characteristic. The oscillator comprises at least one voltage to current converter consisting of a transistor and a resonator comprising two LC tanks consisting of a pair of conductive elements and inductive elements. A feedback loop is formed such that an output terminal of the voltage to current converter is connected to the resonator and a current input to the resonator is converted to a voltage which is in turn fed back to an input terminal of the voltage to current converter. Inductive elements constituting the two LC tanks constituting the resonator are mutually inductively couple and a coefficient of the mutual induction is about ?0.6.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: January 8, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Yusuke Wachi