Amplitude Control Or Stabilization Patents (Class 331/182)
  • Patent number: 9473150
    Abstract: Various techniques for automatic amplitude control of an oscillator are described. An apparatus includes an oscillator circuit configured to generate an oscillating signal. The apparatus includes a feedback circuit configured to control a bias signal of the oscillator circuit to maintain a target peak amplitude of the oscillating signal based on a current-mode indicator of a peak amplitude of the oscillating signal and a reference current. The feedback loop includes a rectifier circuit configured to generate the current-mode indicator and a summing node configured to provide a bias control signal based on a difference between the current-mode indicator and the reference current. The feedback circuit may include a capacitor coupled to the summing node and configured to accumulate charge according to the difference. A magnitude of the current-mode indicator may be at least two orders of magnitude less than a magnitude of the current through an output node of the oscillator circuit.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: October 18, 2016
    Assignee: Silicon Laboratories Inc.
    Inventor: Aaron J. Caffee
  • Patent number: 9008601
    Abstract: A circuit for a single differential-inductor oscillator with common-mode resonance may include a tank circuit formed by coupling a first inductor with a pair of first capacitors; a cross-coupled transistor pair coupled to the tank circuit; and one or more second capacitors coupled to the tank circuit and the cross-coupled transistors. The single differential-inductor oscillator may be configured such that a common mode (CM) resonance frequency (FCM) associated with the single differential-inductor oscillator is at twice a differential resonance frequency (FD) associated with the single differential-inductor oscillator.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: April 14, 2015
    Assignee: Broadcom Corporation
    Inventors: David Patrick Murphy, Hooman Darabi
  • Patent number: 8988159
    Abstract: There is provided an oscillator capable of lowering the power supply voltage without degrading the phase noise, while employing the conventional circuit configuration. According to one aspect of the present invention, there is provided an oscillator comprising: an oscillation circuit; a bias generation circuit for generating a bias signal to drive the oscillation circuit; and a booster circuit for boosting a power supply voltage to generate a boosted voltage for driving the bias generation circuit. In addition, the oscillation circuit, the bias generation circuit, and the booster circuit are provided in a single IC chip, and the booster circuit may receive the power supply voltage VDD from the power supply arranged at the exterior of the IC chip.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: March 24, 2015
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Haruhiko Maru
  • Patent number: 8975976
    Abstract: A power management apparatus and method for maintaining a substantially constant duty cycle of a reference clock signal in a multi-power oscillator, includes a first output power transistor in electrical parallel with a series arrangement of a second output power transistor and a switch, and a crystal oscillator capacitively coupled to a common gate of the first and second output power transistors, wherein a level of the reference clock signal power output is a normal power level when the switch is open and the level of the reference clock signal power output is a higher power level when the switch is closed to operate the second output power transistor in parallel with the first output power transistor.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: March 10, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jingyu Hu, Michael Naone Farias
  • Patent number: 8970311
    Abstract: In one embodiment, a voltage-controlled oscillator (VCO) is provided having an output signal having a frequency responsive to a tuning signal. The VCO includes: a plurality of inverters coupled to form a loop, each differential inverter having a differential pair of transistors configured to steer a tail current from a current source, the current source sourcing the tail current responsive to a bias voltage, each inverter stage including a plurality of switched-capacitor circuits configured to control a signal delay through the inverter stage response to the tuning signal so as to control the frequency of the output signal; and a bias circuit configured to generate the bias voltage responsive to a reference signal such that an amplitude of the output signal is substantially independent of the output signal frequency and depends upon the reference signal.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: March 3, 2015
    Inventor: Mohammad Ardehali
  • Patent number: 8896390
    Abstract: A circuit of inductance/capacitance (LC) voltage control oscillator (VCO) includes an LC VCO unit, a peak detector and a processing unit. The LC VCO unit receives a current control signal and outputs an oscillating voltage signal. The peak detector receives the oscillating voltage signal to obtain an averaged voltage value. The processing unit receives the averaged voltage value to accordingly output the current control signal and feedback to the LC VCO unit. The processing unit also detects whether or not the averaged voltage value has reached to a saturation state and a corresponding critical current. After the current control signal reaches to the critical current, the current control signal is set within a variance range near the critical current.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: November 25, 2014
    Assignee: Novatek Microelectronics Corp.
    Inventor: Chih-Hung Chen
  • Patent number: 8884718
    Abstract: A substantially temperature-independent LC-based oscillator uses bias control techniques. Temperature independence may be achieved by controlling the harmonic frequency content of the output of the oscillator by controlling the amplitude. Amplitude control may be achieved by inserting a control mechanism in the feedback loop of the oscillator.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: November 11, 2014
    Assignee: Si-Ware Systems
    Inventors: Nabil M. Sinoussi, Mohamed M. Weheiba, Ahmed A. Helmy, Ahmed H. A. Razek, Ayman Ahmed
  • Publication number: 20140306775
    Abstract: A system and method are provided for increasing a voltage range associated with a voltage controlled oscillator. A voltage-to-current converter is provided. Additionally, a current controlled oscillator is provided that is in communication with the voltage-to-current converter. Further, at least one circuit component is provided that is in communication with the voltage-to-current converter for increasing a voltage range with which the apparatus operates as a voltage controlled oscillator.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 16, 2014
    Applicant: NVIDIA Corporation
    Inventors: Dong-Myung Choi, Anuradha Subbaraman
  • Patent number: 8836444
    Abstract: An illustrative system includes an amplifier operably connected to a phase shifter. The amplifier is configured to amplify a voltage from an oscillator. The phase shifter is operably connected to a driving amplitude control, wherein the phase shifter is configured to phase shift the amplified voltage and is configured to set an amplitude of the phase shifted voltage. The oscillator is operably connected to the driving amplitude control. The phase shifted voltage drives the oscillator. The oscillator is at an internal resonance condition, based at least on the amplitude of the phase shifted voltage, that stabilizes frequency oscillations in the oscillator.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: September 16, 2014
    Assignee: Uchicago Argonne, LLC
    Inventors: Omar Daniel Lopez, Dario Antonio
  • Patent number: 8810329
    Abstract: An LC oscillator tank that generates a tank oscillation at a phase substantially equal to a temperature null phase. The oscillator further includes frequency stabilizer circuitry coupled to the LC oscillator tank to cause the LC oscillator tank to operate at the temperature null phase. In one aspect of the disclosure, a feedback loop may split the output voltage of the LC tank into two voltages having different phases, where each voltage is independently transformed into a current through programmable transconductors, The two currents may be combined to form a resultant current which is then applied to the LC tank. The phase of the resultant current is such that the LC tank operates at an impedance condition that achieves frequency stability across temperature.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: August 19, 2014
    Inventors: Nabil M. Sinoussi, Bassel Hanafi
  • Patent number: 8798198
    Abstract: A calibration system may be provided for calibrating wireless communications circuitry in an electronic device during manufacturing. The calibration system may include data acquisition equipment for receiving an amplitude-modulated calibration signal from the electronic device. The calibration system may include calibration computing equipment for extracting pre-distortion coefficients from the amplitude-modulated calibration signal. The calibration computing equipment may be configured to detect a bulk phase drift in the amplitude-modulated calibration signal. The calibration computing equipment may be configured to remove the bulk phase drift from the amplitude-modulated calibration signal. The wireless communications circuitry may include a power amplifier that distorts a signal generated by the wireless communications circuitry. The wireless communications circuitry may include a pre-distortion compensator for countering the distortion.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: August 5, 2014
    Assignee: Apple Inc.
    Inventor: Gary Lang Do
  • Publication number: 20140210565
    Abstract: Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values.
    Type: Application
    Filed: January 30, 2013
    Publication date: July 31, 2014
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Andre Luis Vilas Boas, Alfredo Olmos, Eduardo Ribeiro da Silva, Ricardo Maltione
  • Patent number: 8710933
    Abstract: A disclosed oscillation circuit includes a constant-voltage generation circuit, an oscillation generation circuit configured to generate an oscillation output, an output circuit including a plurality of parallelly arranged MOSFET circuits, to which a constant voltage generated by the constant-voltage generation circuit is supplied as a supply voltage, output points of the plurality of MOSFET circuits being mutually connected, and a drive circuit configured to drive a selected MOSFET circuit selected in response to a selection input among the plurality of MOSFET circuits by the oscillation output, wherein an output from an unselected MOSFET circuit among the plurality of MOSFET circuits other than the selected MOSFET circuits has a high impedance.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: April 29, 2014
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Takayuki Nakamura, Minoru Sakai
  • Patent number: 8710929
    Abstract: A system and method are provided for combined generation of I and Q signal references according to a periodic input signal and selective phase interpolation of an output signal with reference thereto. A ring oscillator portion generates an oscillator signal, and includes a plurality of delay stages interconnected in cascade to collectively execute an odd number of signal state inversions within a closed loop. The delay stages establish at respective nodes defined therebetween correspondingly delayed oscillator signal versions, successively shifted in phase by a predetermined phase difference. A signal injection portion selectively applies to at least one node of the ring oscillator portion a current bias according to the periodic input signal, and selectively adjusts each current bias in amplitude. The oscillator signal is thereby frequency locked to the periodic input signal, defining I/Q references with respect to the delayed oscillator signal version established at the current biased node.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: April 29, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Eric Naviasky, Chris Moscone, Rajagopal Vijayaraghavan, Benjamin Louis Heilmann
  • Patent number: 8648625
    Abstract: There is provided a frequency synthesizer capable of improving phase noise. A sinusoidal signal with a frequency set by a frequency setting part is output as a digital signal from a set signal output part, and the digital signal is D/A-converted. A difference between a sinusoidal signal with a frequency corresponding to an output frequency of a voltage controlled oscillating part and a sinusoidal signal output from a D/A converting part is amplified by a differential amplifier, and an amplified signal is input via an A/D converting part to a means for extracting a phase difference between the aforesaid sinusoidal signals. A voltage corresponding to a signal being the result of integration of the phase difference is input as a control voltage to the voltage controlled oscillating part. Then, a gain of the differential amplifier is set larger than a maximum value of phase noise degradation of the A/D converting part, whereby the phase noise degradation of the A/D converting part is cancelled.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: February 11, 2014
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Kazuo Akaike, Nobuo Tsukamoto, Tsukasa Kobata
  • Patent number: 8648662
    Abstract: An oscillator circuit for producing a frequency signal has a resonator element, an amplifier circuit and a coupling apparatus. The coupling apparatus connects the amplifier circuit to the resonator element for the duration of a switching-on process in the oscillator circuit.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: February 11, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Klaus Getta, Giuseppe Li Puma
  • Patent number: 8638173
    Abstract: A method of calibrating a phase-locked loop (PLL) while maintaining lock includes detecting that a control signal to an oscillator in a PLL has exceeded a threshold value while the PLL is locked to an input signal. In response, an operating current of the oscillator is adjusted to return the control signal below the threshold value while maintaining lock of the PLL to the input signal. Adjusting the operating current includes slowly varying an output current of a calibration circuit coupled to the PLL, enabling the PLL to maintain lock to the input signal during adjustment of the operating current.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: January 28, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Glenn A. Murphy, Xiaohua Kong, Nam V. Dang
  • Patent number: 8618889
    Abstract: There is provided an oscillation drive device that forms an oscillation loop with a vibrator for exciting a driving vibration on the vibrator.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: December 31, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Naoki Yoshida, Masahiro Kanai
  • Patent number: 8618888
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an output signal oscillating at a frequency in response to a first control signal and a second control signal. The second circuit may be configured to generate the second control signal in response to (i) an input voltage and (ii) the output signal. The second circuit (i) generates the second control signal by comparing a peak voltage of the output signal to the input voltage and (ii) adjusts an amplitude of the control signal in response to the comparison.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: December 31, 2013
    Assignee: LSI Corporation
    Inventor: Heung S. Kim
  • Patent number: 8614606
    Abstract: An electrical, magnetic or electromagnetic delay line self oscillator is described with a delay line arrangement, an oscillator control circuitry, and a frequency selection impedance connecting the delay line arrangement and the oscillator control circuitry and presenting an impedance to the delay line arrangement. The oscillator control circuitry includes an amplifier, a non linear amplitude control element (N-LACE) such as an active device with a negative differential conductance that provides an output amplitude has a negative second derivative with respect to an input signal, and a driver. The modal characteristics of electromagnetic delay lines can thus be exploited across a wide range of instrumentation applications, and a means is provided to enhance the achievable functionality and/or performance of the instrumentation without the need for expensive additional electrical hardware or electronics.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: December 24, 2013
    Assignee: Salunda Limited
    Inventors: John Francis Gregg, Alexy Davison Karenowska
  • Patent number: 8558630
    Abstract: An amplifier circuit for amplifying output signal from the crystal oscillator circuit is connected to the output side of the crystal oscillator circuit. The amplifier circuit amplifies the difference between the output voltage of the crystal oscillator circuit and the input voltage of a CMOS inverter of the crystal oscillator circuit. For example, a differential amplifier is connected to the output side of the crystal oscillator circuit, then the output voltage of the crystal oscillator circuit and the input voltage of the CMOS inverter are connected to the inputs of the differential amplifier.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: October 15, 2013
    Assignee: Seiko Instruments Inc.
    Inventor: Hiroyuki Souma
  • Patent number: 8552808
    Abstract: Embodiments of the present invention provide an oscillator having circuitry that measures the power dissipated in a resonator and circuitry that controls the power delivered to the resonator in response to the measured power. In some embodiments, the circuitry that measures the power dissipated in the resonator comprises circuitry that measures the voltage across the resonator, circuitry that measures the current through the resonator, and circuitry that calculates the power dissipated in the resonator based on the measured voltage and current.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: October 8, 2013
    Assignee: Tektronix, Inc.
    Inventors: Donald J. Delzer, Laszlo J. Dobos
  • Patent number: 8471644
    Abstract: A gain control circuit, suitable for controlling the amplitude of a voltage-controlled oscillator, includes a duty cycle detector, an analog-to-digital converter, and a function generator. The gain control circuit provides a digitally enabled negative feedback loop. The duty cycle detector generates an estimate of the amplitude. The function generator receives a target amplitude as well as a digital representation of the estimate of the amplitude. The function generator calculates a modified estimate and periodically compares the same to the target value to generate a control word. The control word is arranged to enable current sources in the voltage-controlled oscillator.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: June 25, 2013
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Robert Thelen, Herman H. Pang
  • Patent number: 8427252
    Abstract: A method and apparatus for configuring an oscillator circuit to selectively switch between a low power mode and a normal mode of operation. The oscillator circuit includes an oscillator core in parallel with a dynamically configurable gain circuit. The oscillator core is configured to generate a clock signal. One or more gain elements of the gain circuit can be selectively disabled to reduce the operating power level of the oscillator circuit during a low power mode.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: April 23, 2013
    Assignee: QUALCOMM Incorporated
    Inventor: Michael P. Mack
  • Patent number: 8368480
    Abstract: Phase locked loop circuits are provided, in which a phase locked loop module includes a voltage controlled oscillator to generate an oscillation signal with an output frequency according to a control voltage, and a gain calibration module triggers the phase locked loop module to induce a frequency variation characterized by a delta function in the output frequency and calculates a gain of the voltage controlled oscillator according to a phase error caused by the frequency variation in the output frequency.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: February 5, 2013
    Assignee: Mediatek Inc.
    Inventor: Ping-Ying Wang
  • Publication number: 20120306585
    Abstract: A method and apparatus for configuring an oscillator circuit to selectively switch between a low power mode and a normal mode of operation. The oscillator circuit includes an oscillator core in parallel with a dynamically configurable gain circuit. The oscillator core is configured to generate a clock signal. One or more gain elements of the gain circuit can be selectively disabled to reduce the operating power level of the oscillator circuit during a low power mode.
    Type: Application
    Filed: May 31, 2011
    Publication date: December 6, 2012
    Inventor: Michael P. MACK
  • Patent number: 8305153
    Abstract: An oscillator comprises an inverter, with a resonator connected between an input and an output of the inverter. A transistor external to the inverter is connected in a current mirror mode with a transistor of the inverter so that the inverter's transistor copies the current of the external transistor. The external transistor has its drain terminal connected to the gate terminals of the inverter's transistor and of the external transistor. A current source is connected to the gate terminal of the inverter's transistor, and a switch is connected between the drain and gate terminals of the external transistor. Circuitry controls the switch so as to open the connection between the drain and gate terminals of the external transistor at the beginning of a start-up phase of the oscillator.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: November 6, 2012
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Serge Ramet
  • Patent number: 8183939
    Abstract: A ring oscillator has at least one latch connected to the outputs of at least one oscillator stage, where the latch drives the outputs of the oscillator stage to opposite states during startup, and drive strength reduction circuitry to reduce drive strength of the latch after startup when the oscillator is oscillating.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: May 22, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Ajay Kumar, Krishnaswamy Nagaraj
  • Patent number: 8120430
    Abstract: A semiconductor device having a phase-locked loop (“PLL”) (100) drives a VCO (114) of the PLL circuit with a first control voltage (VCTRL) produced by a loop filter (112) when a first clock signal (clk_ref) is present. The VCO produces an output frequency while the PLL circuit is operating off the first clock signal. When the first clock signal is lost (ref_lost), a control voltage maintenance circuit (120) produces a second control voltage maintaining the VCO output frequency. In one device, the control voltage maintenance circuit includes a phase-frequency detector (104) that can operate off of either the clock reference signal or a master clock signal. In an alternative device, the control voltage maintenance circuit includes a voltage generator (334, 362) that produces a generated voltage that drives the loop filter when lock is lost.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: February 21, 2012
    Assignee: Xilinx, Inc.
    Inventor: Narasimhan Vasudevan
  • Patent number: 8093958
    Abstract: Exemplary embodiments of the invention provide a reference signal generator having a controlled quality (“Q”) factor. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, which generates a first reference signal having a resonant frequency, and a plurality of reactance modules couplable to the reference resonator. Each reactance module comprises one or more reactance unit cells, and each reactance unit cell comprises a reactance element coupled in series to a switching element. In exemplary embodiments, the reactance element is a capacitor having a predetermined unit of capacitance, and the switching element is a transistor having a predetermined resistance when in an off state. The ratio of capacitance to resistance is substantially constant for all reactance modules of the plurality of reactance modules.
    Type: Grant
    Filed: January 12, 2008
    Date of Patent: January 10, 2012
    Assignee: Integrated Device Technology, Inc.
    Inventors: Justin O'Day, Michael Shannon McCorquodale, Scott Michael Pernia, Nam Duc Nguyen, Ralph Beaudouin, Sundus Kubba
  • Patent number: 8085098
    Abstract: A PLL circuit comprising an oscillation unit, a frequency division unit, a phase comparison unit, and a generation unit comprises a switching unit that switches between a first state in which a control voltage output from the generation unit is input into the oscillation unit and a second state in which a reference voltage is input into the oscillation unit; and a correction unit that, in the second state, compares the control voltage output from the generation unit with the reference voltage, and corrects a frequency at which the oscillation unit oscillates with respect to a voltage input into the oscillation unit, such that the control voltage output from the generation unit is equivalent to the reference voltage.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: December 27, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoshikazu Yamazaki
  • Publication number: 20110304407
    Abstract: A circuit and method for calibrating a VCO (voltage controlled oscillator) is disclosed. In one embodiment, a circuit includes a VCO and a bias control circuit coupled to a tail node of the VCO. An amplitude control unit may also be coupled to the tail node, wherein the amplitude control unit is configured to determine the amplitude of a VCO output signal based on a voltage present on the tail node. The amplitude control unit may also be configured to generate a bias voltage based on the amplitude of the VCO output signal and a target voltage. The bias control circuit may be coupled to receive the bias voltage from the amplitude control unit and may be further configured to adjust the voltage on the tail node based on the received bias voltage.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 15, 2011
    Inventors: Meei-Ling Chiang, Dennis M. Fischette, Alvin Leng Sun Loke, Michael M. Oshima
  • Patent number: 8044734
    Abstract: Techniques for mitigating VCO pulling are described. In an aspect, VCO pulling may be mitigated by (i) injecting an oscillator signal, which is a version of a VCO signal from a VCO, into a transmitter and (ii) using coupling paths from the transmitter to the VCO to re-circulate the oscillator signal back to the VCO. In one design, an apparatus includes a VCO and a coupling circuit. The VCO generates a VCO signal at N times a desired output frequency. The coupling circuit receives an oscillator signal generated based on the VCO signal and injects the oscillator signal into a transmitter to mitigate pulling of the frequency of the VCO due to undesired coupling from the transmitter to the VCO. The apparatus may include a phase adjustment circuit that adjusts the phase of the oscillator signal and/or an amplitude adjustment circuit that adjusts the amplitude of the oscillator signal.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: October 25, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Mark Vernon Lane
  • Patent number: 7982553
    Abstract: This invention discloses a clock generator capable of automatically adjusting output clock when process, voltage, or temperature variation occurred. The clock generator comprises a current generator, for generating a first current and a second current according to a control voltage; a oscillator, coupled to the current generator, for generating a clock signal according to the first current; and a voltage adjuster, coupled to the current generator and the oscillator, for adjusting the control voltage according to the clock signal and the second current; wherein, when the signal frequency of the clock signal changed, the voltage adjuster correspondingly adjusts the control voltage so as to adjust the first current.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: July 19, 2011
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chen-Chih Huang, Tsung Yen Tsai
  • Patent number: 7978017
    Abstract: Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, a control voltage generator adapted to provide a temperature-dependent control voltage; and a plurality of variable reactance modules. The reference resonator generates a first reference signal having a resonant frequency, and each reactance module is adapted to modify a corresponding reactance in response to the control voltage to maintain the resonant frequency substantially constant or within a predetermined variance over a predetermined temperature range. A frequency controller may also be included to maintain substantially constant a magnitude of a peak amplitude of the first reference signal and maintains substantially constant a common mode voltage level of the reference resonator.
    Type: Grant
    Filed: January 12, 2008
    Date of Patent: July 12, 2011
    Assignee: Integrated Device Technology, Inc.
    Inventors: Scott Michael Pernia, Nam Duc Nguyen, Michael Shannon McCorquodale, Justin O'Day, Ralph Beaudouin, Sundus Kubba
  • Patent number: 7936223
    Abstract: A low spur phase-locked loop (PLL) architecture is provided. A frequency-synthesizing PLL that includes a differential Kvco gain linearization circuit with adjustable DC offset is used to reduce clock jitter. The free-running oscillation frequency of the VCO of the PLL is centered near the desired frequency using programmable loads to minimize the required control voltage range. The PLL uses a differential architecture that includes a charge pump that compensates for variations in Kvco and a LC tank oscillator with differential controlled varactor. The differential PLL architecture demonstrates that the reference spur can be well controlled to below ?80 dBc.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: May 3, 2011
    Assignee: Vintomie Networks B.V., LLC
    Inventors: James M. Little, Perry Leigh Heedley, David Vieira, Maoyou Sun
  • Patent number: 7911284
    Abstract: A voltage controlled oscillator circuit comprises a variable current generator to supply an operation current to a voltage controlled oscillator, the voltage controlled oscillator to include a resonance circuit having a variable capacitor and inductor, and to output an output signal having an amplitude based on a current generated by the variable current generator, and a first optimization circuit to which the output signal is inputted, the first optimization circuit generating and outputting a current setting signal based on an amplitude change of the output signal corresponding to a change of a current outputted by the variable current generator to the variable current generator.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: March 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Akira Kuwano
  • Patent number: 7902933
    Abstract: Described is a circuit comprising an oscillator, an amplifier unit and a control unit. The amplifier unit is coupled to the oscillator and to the control unit; and the control unit is arranged to regulate a load capacitance to the oscillator at startup.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: March 8, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventor: Aaron Brennan
  • Patent number: 7893781
    Abstract: An electronic device for generating an electric oscillating signal is described based on a micro-electromechanical system (MEMS). The electronic device typically comprises a substrate a moveable element which is moveable with respect to the substrate and an actuating means and a sensor. The actuating means is used to induce vibration of the moveable element and comprises two inductive elements, a first one provided fixed to the substrate and a second one provided fixed to the moveable element. The induced vibration of the moveable element is sensed using the sensor and converted into an electric oscillating signal.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: February 22, 2011
    Assignee: NXP B.V.
    Inventor: Jean-Claude Six
  • Patent number: 7888974
    Abstract: An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As a specific solving means, a sinusoidal signal of an output frequency of a voltage-controlled oscillator is subjected to orthogonal detection, a vector rotating at the differential frequency (speed) between the output frequency and the frequency of the frequency signal used for the detection is created, and the frequency of a vector when the output frequency of the voltage-controlled oscillator is equal to a set value is calculated in advance. The voltage signal corresponding to the difference between the frequency of the vector and the calculated frequency is fed back to the voltage-controlled oscillator when the voltage-controlled oscillator is driven, and PLL is formed so that the difference is equal to zero.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: February 15, 2011
    Assignee: Nihon Dempa Kogyo Co. . Ltd.
    Inventors: Tsukasa Kobata, Tsuyoshi Shiobara, Kazuo Akaike, Nobuo Tsukamoto
  • Patent number: 7863989
    Abstract: A gain control system comprises a reference stage, a bias replication stage, an operational amplifier, an automatic gain control block, a gain stage, and a crystal oscillator in one embodiment. A negative feedback loop is formed by portions of the operational amplifier, the replica biasing stage, the gain stage, and the automatic gain control stage. The negative feedback loop operatively controls an amplitude of oscillation in the crystal oscillator. The automatic gain control block produces output currents at reference levels in proportion to an input current source. The output current reference levels provide a corresponding yet independent scaling of currents in the bias replication stage and the gain stage. By the scaling capabilities provided a high common mode of voltage is provided between the crystal oscillator and the voltage reference section while stable oscillating characteristics are provided over a broad frequency range.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: January 4, 2011
    Assignee: Spectra Linear, Inc.
    Inventors: Omer Fatih Orberk, Alexei Shkidt
  • Patent number: 7855606
    Abstract: An oscillator device having an oscillation system including an oscillator and a resilient supporting member, a driving member configured to supply a driving force to the oscillation system based on a driving signal, a detecting member configured to detect at least an oscillation amplitude of the oscillator, a driving amplitude control unit configured to control at least a driving amplitude of the driving signal, and a driving frequency control unit configured to control a driving frequency of the driving signal to be supplied to the driving member, wherein, in a state in which the driving amplitude control unit controls the driving amplitude of a driving signal so that the oscillation amplitude to be detected becomes equal to a target value, and on the basis of information including driving frequencies in different driving states being driven with driving signals of these driving frequencies as well as the controlled driving amplitude, the driving frequency control unit acquires, as a resonance frequency of t
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: December 21, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazufumi Onuma
  • Patent number: 7839230
    Abstract: Provided is a PLL oscillation circuit that can reduce the variability of modulation sensitivity of a VCO 101 and obtain a desired output amplitude quickly with high precision. An amplitude detector 103 detects an output amplitude of the VCO 101. An amplitude controller 105 controls a current value of a variable current source 109 so as to have an output amplitude of the VCO 101 detected by the amplitude detector 103 to be a desired amplitude. A LPF 108 is connected between the amplitude controller 105 and the variable current source 109. A switch 107 connects or disconnects the LPF 108 between the amplitude controller 105 and the variable current source 109. The amplitude controller 105 is connected to the variable current source 109 through either the LPF 108 or the switching switch 107.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: November 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Masakatsu Maeda, Takayuki Tsukizawa, Hiroyuki Yoshikawa, Shunsuke Hirano
  • Patent number: 7825701
    Abstract: An object of the present invention provides a frequency synthesizer having a broad frequency entraining range which can finely set a frequency over a broad band by a novel principle. As s specific solving means, a sinusoidal signal of an output frequency of a voltage-controlled oscillator is subjected to orthogonal detection, a vector rotating at the differential frequency (speed) between the output frequency and the frequency of the frequency signal used for the detection is created, and the frequency of a vector when the output frequency of the voltage-controlled oscillator is equal to a set value is calculated in advance. The voltage signal corresponding to the difference between the frequency of the vector and the calculated frequency is fed back to the voltage-controlled oscillator when the voltage-controlled oscillator is driven, and PLL is formed so that the difference is equal to zero.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: November 2, 2010
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Tsukasa Kobata, Tsuyoshi Shiobara, Kazuo Akaike, Nobuo Tsukamoto
  • Patent number: 7800452
    Abstract: The present invention provides a PLL circuit containing a loop gain circuit capable of suppressing loop gain variation. This PLL circuit includes a counter that is driven by a voltage controlled oscillator within the PLL circuit, an accumulator (ACL) that accumulates the output of the counter, and a comparison operation circuit block that compares the count value of the ACL and the design value pre-stored in a register, and the loop gain of the PLL circuit is detected taking advantage of the fact that the ACL count value is inversely proportional to the loop gain. Based on the detection result, the loop gain is calibrated by correcting the loop gain with a charge pump current, etc. This allows the PLL circuit to maintain stable loop characteristics that will not affect the characteristics variation of each element constituting the PLL.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: September 21, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Manabu Kawabe, Kazuyuki Hori, Satoshi Tanaka, Yukinori Akamine, Masumi Kasahara, Kazuo Watanabe
  • Patent number: 7778356
    Abstract: A modulator including a direct modulation synthesizer circuit, a reference frequency oscillator for providing an input reference signal to the direct modulation synthesizer circuit for locking a carrier frequency to a stable frequency and a pre-emphasis unit for data bits and for producing a modulating signal for direct modulation of the direct modulation synthesizer circuit, the modulating signal having data bit dependent voltage levels.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: August 17, 2010
    Assignee: Given Imaging Ltd.
    Inventor: Ido Bettesh
  • Patent number: 7760031
    Abstract: A method is provided for reducing inter modulation distortion products using multi-carrier phase alignment of the type where a combined carrier signal is generated from the combined output carried waves of a plurality of numerically controlled oscillators in which the frequency of the carrier wave can be altered by changing an input value into the oscillator. In particular the initial phase of the output carrier waves is adjusted so that the peak amplitude of the combined carrier signal is minimized so that compression of the higher amplitude portions of the combined signal is reduced.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 20, 2010
    Assignee: Vecima Networks Inc.
    Inventors: Gregory Clayton Whittet, Surinder Kumar
  • Patent number: 7737797
    Abstract: A controllable oscillating system for generating a differential oscillating signal is disclosed. The controllable oscillating system includes an oscillating circuit and a current adjusting device. The oscillating circuit includes a controllable resonator, a cross-coupling driving device, and a current source. The cross-coupling driving device is coupled to the controllable resonator and utilized for driving the controllable resonator to generate the differential oscillating signal. The current source is coupled to the cross-coupling driving device and utilized for providing a first current. The current adjusting device is coupled to the cross-coupling driving device and utilized for adjusting currents passing through the cross-coupling driving device.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: June 15, 2010
    Assignee: Mediatek Inc.
    Inventor: Chih-Hsien Shen
  • Patent number: 7728679
    Abstract: A calibration circuit (20, 50) and method (60) for calibrating the bias current of a VCO (10, 40) to minimize phase noise. The calibration circuit (20, 50) monitors the average voltage at the common-mode node of the VCO (10, 40) while varying the bias current over a predetermined range. The calibration circuit (20, 50) identifies the bias current associated with the minimum average common-mode voltage and utilizes this bias current for calibrating the biasing transistor of the VCO (10, 40).
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: June 1, 2010
    Assignee: Microchip Technology, Inc.
    Inventors: Stanley Wang, Bendik Kleveland, Thomas H. Lee
  • Patent number: 7728688
    Abstract: A power supply circuit includes a first voltage regulator to generate a first supply voltage for a first circuit of a phase-locked loop and a second voltage regulator to generate a second supply voltage for a second circuit of the phase-locked loop. The first and second supply voltages are independently generated by the first and second voltage regulators based on the same reference signal. The first circuit may be a charge pump and the second circuit may be a voltage-controlled oscillator. Different circuits may be supplied with the independently generated supply voltages in alternative embodiments.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: June 1, 2010
    Assignee: Intel Corporation
    Inventor: Joseph Shor