Abstract: A power supply circuit includes a first voltage regulator to generate a first supply voltage for a first circuit of a phase-locked loop and a second voltage regulator to generate a second supply voltage for a second circuit of the phase-locked loop. The first and second supply voltages are independently generated by the first and second voltage regulators based on the same reference signal. The first circuit may be a charge pump and the second circuit may be a voltage-controlled oscillator. Different circuits may be supplied with the independently generated supply voltages in alternative embodiments.

Abstract: A calibration circuit (20, 50) and method (60) for calibrating the bias current of a VCO (10, 40) to minimize phase noise. The calibration circuit (20, 50) monitors the average voltage at the common-mode node of the VCO (10, 40) while varying the bias current over a predetermined range. The calibration circuit (20, 50) identifies the bias current associated with the minimum average common-mode voltage and utilizes this bias current for calibrating the biasing transistor of the VCO (10, 40).

Abstract: An oscillator signal stabilization method is provided for a radio transceiver, for example. In the present stabilization method, amplitude variation of a radio frequency oscillator signal generated by a frequency-adjustable oscillator signal generator is stabilized in an adaptive compensation circuit having adjustable compensation parameters. The stabilized oscillator signal is fed from the compensation circuit to one or more frequency dividers for frequency division. The compensation circuit is configured to stabilize signal variations caused by component non-idealities and, thereby, prevent undesired frequency division errors in the frequency dividers.

Abstract: An apparatus includes a filter and a gain control circuit. The filter receives and filters an input signal and provides an output signal in a first mode and operates as part of an oscillator in a second mode. The gain control circuit varies the amplitude of an oscillator signal from the oscillator in the second mode, e.g., by adjusting at least one variable gain element within the oscillator to obtain a target amplitude and/or non rail-to-rail signal swing for the oscillator signal. The apparatus may further include a bandwidth control circuit to adjust the bandwidth of the filter in the second mode. The bandwidth control circuit receives the oscillator signal, determines a target oscillation frequency corresponding to a selected bandwidth for the filter, and adjusts at least one circuit element within the filter to obtain the target oscillation frequency.

Abstract: In one embodiment, a voltage-controlled oscillator is provided having an output signal whose frequency is responsive to a tuning signal and is independent of amplitude of oscillation. The voltage-controlled oscillator includes: a plurality of differential inverter stages coupled to form a loop, each differential inverter stage having a differential pair of transistors configured to steer a tail current from a current source, the current source sourcing the tail current responsive to a feedback signal; and a control circuit configured to generate the feedback signal responsive to a reference signal such that an amplitude of the output signal is independent of the tuning signal and depends on the reference signal, and the frequency of oscillation is decoupled from the amplitude of oscillation.

Abstract: Provided are a PLL apparatus for an OFDM system having variable channel band and an operating method thereof. The PLL apparatus includes a frequency divider for dividing an oscillating signal; a phase detector for detecting a phase difference between a reference signal and the divided oscillating signal from the frequency divider and outputting the phase difference signal; a variable loop filter for filtering a phase difference signal outputted from the phase detector; a voltage control oscillator for outputting the oscillator signal to the frequency divider according to the voltage control signal filtered from the variable loop filter; and a variable loop filter controller for varying a filtering band of the variable loop filter according to each of the channel bands.

Abstract: The object of the present invention is to provide a crystal oscillator with one IC capable of effectively responding to specifications or a frequency of an installed set, an output terminal of the oscillator 1 is connected to an input terminal of the inverter 2, an output terminal of which is connected to the first resistor 7 and one terminal of the second resistor 8, the other terminal of the first resistor 7 is connected to one terminal of the first capacitor 9 and an input terminal of the first transistor 3, the other terminal of the first capacitor 9 is connected to one terminal of the first switch 11, and the other terminal of the first switch 11 is grounded, the other terminal of the second resistor 8 is connected to one terminal of the second capacitor 10 and an input terminal of the second transistor 4, the other terminal of the second capacitor 10 is connected to one terminal of the second switch 12, and the other terminal of the second switch 12 is grounded, an output terminal of the first transisto

Abstract: A digitally controlled oscillator device includes a programming input, a selection input and an oscillator core with a first capacitive element which is frequency determining and programmable. The first capacitive element is coupled to the programming input that receives a first data word by which an oscillating frequency of the oscillator device is programmed with a predetermined frequency step size. The oscillator device further includes a selection unit for selecting a mode which is coupled to the selection input that receives a mode selection signal. The mode is selectable from a plurality of modes depending on the mode selection signal and each mode from the plurality of modes is characterized by a predetermined frequency step size. The digitally controlled oscillator device also includes a deattenuation amplifier.

Abstract: In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more amplitude calibration techniques prior to enabling the PLL. For example, an amplitude calibration unit may be used to selectively activate switched unit current sources within a tail current source of the VCO. In this manner, the amplitude the signal generated by the oscillator can be adjusted without requiring closed-loop amplitude monitoring or control.

Abstract: The present invention provides a clock signal generator capable of reducing current consumption and stably outputting a clock signal early. When it is discriminated that the amplitude of an amplification oscillation signal obtained by amplifying an oscillation signal produced from a crystal oscillator according to a constant current value has exceeded threshold amplitude, the clock signal generator generates a clock signal, based on the amplification oscillation signal. When it is discriminated that the total number of clock pulses of the clock signal has exceeded a predetermined pulse number, the clock signal generator reduces the constant current value.

Abstract: An ultra-low power crystal oscillator architecture that draws less than 2 ?A during steady state operation. An amplifier stage is self biased and has input and output clamp circuits that limit its signal swing. Circuit values are selected such that there is sufficient transient load current for the first amplifier stage to oscillate, while at the same time the input and output clamp circuits maintain a sufficiently low swing of the stage such that the steady state average load current is on the order of less than 1 ?A.

Abstract: Disclosed is a frequency synthesizer capable of preventing occurrence of a frequency shift upon occurrence of a change in the level of an input to an A/D converter by preventing PLL control from being properly operated. The frequency synthesizer includes a carrier remove, an inverse rotational vector multiplier, a phase time difference detector, an adder, a phase difference accumulator, a loop filter, a parameter output part, an amplitude information detector, a filter, and a multiplier configured by an FPGA. Unlock detection means monitors the value of amplitude information detected by the amplitude information detector. When the value lies within a proper range, a lock (synchronization) process is performed under PLL control, whereas when the value is off the proper range, an unlock state in PLL control is detected.

Abstract: The present invention provides a voltage controlled oscillator having a wide frequency variation range and an oscillation frequency that shows favorable linearity with respect to control voltage. The present invention includes an amplifier circuit 21, a piezoelectric element 22 connected in parallel to the amplifier circuit 21 and forming a feedback loop, variable capacitive elements 24 and 25 respectively connected to an input terminal and an output terminal of the amplifier circuit 21 and having a capacitance value that is dependent on control voltage, and an analog operation circuit 26 that generates a control voltage Vcs based on an inputted control voltage Vc. In this arrangement, the control voltage Vc is applied to the variable capacitive element 24 and the control voltage Vcs generated by the analog operation circuit 26 is applied to the variable capacitive element 25.

Abstract: A novel mechanism for gain normalization of a digitally controlled oscillator (DCO) in an all digital phase locked loop (ADPLL)-based transmitter that is operative to split the gain normalization multiplication functionality between a modulating path and a PLL loop. The gain normalization of the modulation loop (referred to as modulation path multiplier) comprises a full bit resolution high precision multiplication function. The gain normalization of the PLL loop, on the other hand, is of significantly lower resolution, hence much lower complexity multiplier logic circuitry is required.

Abstract: Disclosed is a push-push voltage controlled oscillator which obtains output signals having a frequency two times the fundamental resonance frequency of an LC resonator with differential signals having the same amplitude and opposite phases, creating the advantage of high frequency differential outputs which are obtained using such a voltage controlled oscillator, and thus reducing current consumption.

Abstract: A voltage controlled oscillator with anti supply voltage variation and/or process variation includes an oscillation circuit for outputting an oscillatory signal; a current source coupled to the oscillation circuit for providing an input current to the oscillation circuit; and a variation compensation circuit for compensating the variations generated by the supply voltage and process. The variation compensation circuit includes a peak detector for generating a peak voltage proportional to the amplitude of the oscillatory signal; a compensating voltage generator for generating a reference voltage according to the process variation so that the oscillation circuit achieves the same working conditions under the process variation; and a comparator for comparing the peak voltage and the reference voltage to generate a control voltage. When the variation compensation circuit includes an amplifier, the supply voltage can be compensated.

Abstract: An apparatus for generating an oscillating signal that includes a circuit to accelerate the time in which an oscillating signal reaches a defined steady-state condition from a cold start. The apparatus includes an oscillating circuit to generate an oscillating signal; a first circuit to supply a first current to the oscillating circuit; and a second circuit to supply a second current to the oscillating circuit, wherein the first and second currents are adapted to reduce the time duration for the oscillating signal to reach a defined steady-state condition. The apparatus may be useful in communication systems that use low duty cycle pulse modulation to establish one or more communications channels, whereby the apparatus begins generating an oscillating signal at approximately the beginning of the pulse and terminates the oscillating signal at approximately the end of the pulse.

Abstract: It is therefore the object of the present invention to disclose a device for power calibration of an oscillator in the high-frequency range, which has a reduced number of components and/or has less-expensive components. A method for power calibration of an oscillator is also to be disclosed, which eliminates the disadvantages of the known methods, that is, determining the output power of the oscillator via an additional, expensive component. To that end, the input (31) of the control module (40) is embodied as electrically connectable to the HF switch (comprising (22) and (24)) and the output (34) of the control module (40) is embodied as electrically connectable to the HF switch and/or to the amplifier.

Abstract: In a voltage controlled oscillator, a resonant circuit generates a resonant frequency in response to a tuning voltage. A differential oscillator includes first and second transistors differentially cross-coupled to the resonant circuit. The first and second transistors supply energy to the resonant circuit to oscillate the resonant frequency from the resonant circuit, thereby generating first and second oscillation signals having a phase difference of 180 degree. Also, the first and second transistors adjust the first and second oscillation signals to a uniform level in response to a body bias voltage. In addition, an output level detector detects a level of the first and second oscillation signals from the differential oscillator and supplies the body bias voltage corresponding to the detected level to a body of each of the first and second transistors.

Abstract: A circuit for generating an output oscillation signal with low jitter includes an oscillator to generate an oscillation signal at an initial frequency based upon a control input to vary an amplitude of the oscillation signal. A first frequency multiplier multiplies the oscillation signal to result in a first signal with first frequency and first undesired frequency components. A filter minimizes the first undesired frequency components of the first signal. A second frequency multiplier multiplies the first signal to result in the output oscillation signal with second frequency and second undesired frequency components. A second feedback circuit compares a predetermined range and at least one of the first signal and the output oscillation signal to result in a reference value. A first feedback circuit varies the control input based upon a comparison between the reference value and the amplitude of the oscillation signal to minimize the second undesired frequency components.

Abstract: A method, circuit, and/or system for controlling an amplitude and/or limiting or reducing the energy consumed by an LC voltage controlled oscillator (LCVCO). In one embodiment, an oscillator can include: (i) a bias circuit that can provide first and second bias signals; (ii) an oscillator core that can provide a periodic signal with a frequency related to the first bias signal and an amplitude, where the oscillator core can also provide a feedback signal; and (iii) a current/amplitude controller that can control the amplitude by dynamically dusting the first bias signal in response to the feedback signal. Embodiments of the present invention can advantageously provide a reliable and simplified design approach for amplitude control and substantial energy reduction in an oscillator, such as an LCVCO circuit or a Colpitts differential oscillator.

Abstract: An automatic gain control (AGC) circuit is applied to control a margin voltage of an oscillator. The margin voltage is the voltage difference between a high-level output and a low-level output of the oscillator. The AGC circuit of the present invention includes a comparator and a processing unit. Wherein, the comparator compares the margin voltage of the oscillator and a reference voltage. Based on the output of the comparator, the processing unit outputs a ripple code to determine the value of a driving current output from a current generator. The oscillator generates an oscillation output to the comparator based on the driving current.

Abstract: Amplitude level control circuit for an oscillator comprising first means arranged to generate a first current for driving the oscillator; and second means arranged to generate a second current such that in direct current conditions the second current is arranged to be a predetermined ratio of the first current, wherein the second current is arranged to be added to a reference current to form a feedback current such that in direct current conditions the first current is determined by the reference current, the ratio of the feedback current and first current and the ratio of the first current and second current, wherein the second means is further arranged to reduce the second current as oscillations of the oscillator increase, thereby reducing the first current.

Abstract: A problem of the present invention is to provide a wide band modulation PLL having good modulation accuracy at low cost. With respect to a PLL having a VCO (21), a frequency divider (22), a phase comparator (23), a charge pump (24) and a loop filter (25), the VCO (21) and a frequency dividing ratio of the frequency divider (22) are controlled to perform modulation. The VCO (21) has two control terminals for PLL and modulation, and a control signal generation part (28) generates a control voltage Vtm of the VCO (21) based on phase modulation data and an input voltage Vtl to the control terminal for PLL. At the time of adjusting a modulation factor, the control voltage Vtm to the control terminal for modulation of the VCO (21) is controlled and also the input voltage Vtl is measured and a modulation sensitivity of a frequency of the VCO (21) to Vtm is calculated and a modulation factor of the phase modulation data is adjusted based on the modulation sensitivity obtained.

Abstract: Stereo recovery circuitry for a digital receiver is disclosed that provides increased accuracy and efficiency in recovering stereo signal information from transmitted stereo signals. The stereo decoder includes a digitally controlled oscillator that recovers a pilot tone signal from transmitted stereo signal information. By processing demodulated stereo signals on the digital side and digitally controlling the oscillator, the stereo decoder has increased efficiency and accuracy. In one embodiment, the oscillator may be a phase-locked-loop having a loop filter and an amplitude stabilized tunable resonator. Additional circuitry is disclosed for utilizing the pilot tone signal to recover left and right channel signal information from the demodulated stereo signals.

Abstract: The output amplitude of a variable gain amplifier is compared with a reference value by a differential amplifier. When the amplitude is less than the reference value, the gain of the variable gain amplifier is increased to augment the output amplitude. When the amplitude is greater than the reference value, the gain of the variable gain amplifier is decreased to reduce the output amplitude. Only part of the variable gain range of the variable gain amplifier is corresponded to the potential at VLP by installing an input switching unit for inverting the output polarity of the differential amplifier, an input switching unit for inverting the output polarity of a differential amplifier, comparator, an IDAC, and a logic circuit for controlling the ON and OFF of switches of the input switching units and the output current value of the IDAC.

Abstract: A circuit arrangement for controlling an amplitude of an oscillator signal is accomplished by comparing the oscillator signal to reference signals. The amplitude of the oscillator signal is capable of being adjusted by means of a control signal. The control signal is developed by a regulating circuit that depends upon a comparison result of the oscillator signal with a reference signal such that the amplitude of the oscillator signal adopts a desired value. At least one further reference signal is compared to the oscillator signal and the regulating circuit is adjusted depending on the comparison.

Abstract: The ring oscillator circuit with the current mirror type current limit circuit of this invention prevents the malfunction and the halt of the ring oscillator. The ring oscillator is configured with the serially connected CMOS inverters INV1–INV5 where the output of the last CMOS inverter INV5 is fed back to the input of the first CMOS inverter INV1. Also, the current mirror type current limit circuit for controlling the electric current going through the CMOS inverters INV1–INV5 is formed. The first supporting transistor T1 that helps the output of the CMOS inverter INV5 achieve the full-swing for reaching the power supply voltage Vdd and the second supporting transistor T2 that helps the output of the CMOS inverter INV5 achieve the full-swing for reaching the ground voltage Vss according to the output of the CMOS inverter INV3 two positions ahead of the last inverter INV5 are also formed.

Abstract: A voltage controlled oscillator amplitude control circuit has a voltage controlled oscillator circuit to output an oscillating signal having a controlled amplitude. It also has a control circuit to control the amplitude of the oscillating signal by providing a dominant pole, a filtering function, rectification, and a gain at a single node of the circuit.

Abstract: A semiconductor device or a circuit includes a controllable oscillator and circuitry that senses a voltage which may control the controllable oscillator and digitally controls a gain compensation, adaptively compensating for a drop in a gain against overall loop gain within a closed loop. In one embodiment, a single supply source may be used to power the closed loop while a variable gain stage that is digitally controllable may adjust the gain in a feed-forward manner based on the drop.

Abstract: A circuit for varying an amplitude of an oscillation signal comprises an oscillator, signal processing circuitry, a first feedback circuit, and a second feedback circuit. The oscillator generates the oscillation signal and has a control input to vary the amplitude of the oscillation signal. The signal processing circuitry processes the oscillation signal. The first feedback circuit is configured to control the control input of the oscillator by comparing a reference value and an input amplitude of an input of the signal processing circuitry. The second feedback circuit generates the reference value by comparing an output amplitude of an output of the signal processing circuitry and a predetermined value.

Abstract: A CMOS Pierce crystal oscillator. A clock generator with activation control, for generating a clock signal. The clock generator comprises an amplifier, a shaping circuit and a diagnostic circuit. The amplifier is capable of being coupled to an external oscillation source through an input pad and an output pad to generate an oscillating signal, the shaping circuit is capable of being coupled to the output pad, for shaping the oscillating signal to generate a clock signal, and the diagnostic circuit is capable of being coupled to the output pad, for asserting a ready signal when amplitude of the oscillating signal exceeds a predetermined portion of a full swing voltage.

Abstract: A gain controlled voltage controlled oscillator. A current controlled oscillator is adapted to provide an output signal oscillating at a frequency controllable by controlling a current applied thereto. A first current source provides a first control current controllable by controlling a voltage applied thereto that has a predetermined range. A first current mirror is adapted to mirror the control current to the current controlled oscillator. A second current source is adapted to provide a second control current for mirroring to the current controlled oscillator by the first current mirror when the control voltage is in a low portion of the range.

Abstract: A structure and associated method to allow an oscillator circuit to operate with a plurality of different crystals. The oscillator circuit comprises a semiconductor device and a crystal. The semiconductor device comprises a primary inverting amplifier and a crystal substitution damping resistor. The crystal is electrically coupled to the primary inverting amplifier. A resistance value of the crystal substitution resistor is adapted to vary in order to control an amount of current flow from the primary inverting amplifier to the crystal. The amount of the current flow to the crystal is dependent upon an electrical property of the crystal.

Abstract: An LC voltage controlled oscillator for use in a SERDES. The oscillator comprises a pair of cross coupled field effect transistors coupled with a pair of multi-layer inductors.

Abstract: A method and circuit are disclosed for detecting the performance of an oscillator circuit. In particular, the circuit may detect a signal, such as the output of the oscillator circuit, failing to oscillate as desired. The second circuit may be capable of detecting whether the signal oscillates at a frequency that is less than a predetermined frequency. The second circuit may include timing circuits for determining whether the signal remains in a first logic state for at least a predetermined period of time and whether the signal remains in a second logic state for at least the predetermined period of time.

Abstract: A voltage controlled LC resonance oscillation circuit has a plurality of capacitive elements connected to an output node. These capacitive elements are applied with voltages at opposing terminals for selecting an oscillating frequency band, so that the oscillating frequency band can be changed step by step in accordance with the selection voltage. The capacitive elements include at least one variable capacitive element such as a MOS capacitor, the capacitance of which is varied in accordance with a voltage applied thereto. The MOS capacitor is similar in structure to a MOS transistor. The variable capacitive element can be supplied at a terminal opposite to the output node with a voltage from a variable voltage source, for example, in place of the selection voltage. The voltage controlled LC resonance oscillation circuit can measure the output amplitude and oscillating frequency without affecting the characteristics thereof, and reduce the parasitic capacitance.

Abstract: A level detector (110, 104) and corresponding method detects (602) whether an output signal level of a VCO (102) is within a window bounded by minimum and maximum thresholds. When the output signal level is not within the window, a loop-control element (108) closes (604) an AGC loop of the VCO and controls the gain of the VCO with a gain-control signal that tracks an AGC bias signal. When the output signal level is within the window, the loop-control element opens (606) the AGC loop and controls the gain with a fixed bias signal derived from the AGC bias signal at the time the AGC loop is opened.

Abstract: An oscillator circuit is specified, having an LC resonator, to which two or more current paths are connected, which are connected in parallel with one another and can be connected and disconnected individually by switches. The attenuation compensation amplifiers are in this case coupled to the resonant circuit in order to compensate for its attenuation. The oscillator circuit allows the gradient of the compensation for the attenuation of the resonant circuit to be adjusted, without moving the operating point of the amplifiers. This makes it possible to compensate for manufacturing-dependent component tolerances and any amplitude discrepancy caused by them, in a simple way. The oscillator circuit is suitable, for example, for use in voltage-controlled oscillators in order to form phase-locked loops when using mass production technologies.

Abstract: A highly stable single chip resonator controlled oscillator with automatic amplitude control and biasing is designed for manufacture with monolithic integrated circuit technologies. Analog and digital output buffers with elaborate control for power saving purposes and sophisticated start-up and power-up circuits ensure, that a crystal controlled oscillation is safely induced at start-up and that the amplitude of oscillation is continuously controlled during operation to reach low phase noise and reduce power consumption of the circuit.

Abstract: A semiconductor device or a circuit includes a controllable oscillator and circuitry that senses a voltage which may control the controllable oscillator and digitally controls a gain compensation, adaptively compensating for a drop in a gain against overall loop gain within a closed loop. In one embodiment, a single supply source may be used to power the closed loop while a variable gain stage that is digitally controllable may adjust the gain in a feed-forward manner based on the drop.

Abstract: A highly stable single chip resonator controlled oscillator with automatic amplitude control and biasing is designed for manufacture with monolithic integrated circuit technologies. Analog and digital output buffers with elaborate control for power saving purposes and sophisticated start-up and power-up circuits ensure, that a crystal controlled oscillation is safely induced at start-up and that the amplitude of oscillation is continuously controlled during operation to reach low phase noise and reduce power consumption of the circuit.

Abstract: Voltage controlled oscillator assembly which includes at least one voltage controlled oscillator, and a regulator for regulating the output power from the at least one voltage controlled oscillator.

Abstract: Stereo recovery circuitry for a digital receiver is disclosed that provides increased accuracy and efficiency in recovering stereo signal information from transmitted stereo signals. The stereo decoder includes a digitally controlled oscillator that recovers a pilot tone signal from transmitted stereo signal information. By processing demodulated stereo signals on the digital side and digitally controlling the oscillator, the stereo decoder has increased efficiency and accuracy. In one embodiment, the oscillator may be a phase-locked-loop having a loop filter and an amplitude stabilized tunable resonator. Additional circuitry is disclosed for utilizing the pilot tone signal to recover left and right channel signal information from the demodulated stereo signals.

Abstract: An oscillator circuit including an integrated circuit amplifier, an integrated circuit active resistance circuit to set the gain of the amplifier, a crystal resonator to set the frequency of the signal generated by the oscillator circuit, and a pair of capacitors respectively situated at the inputs and outputs of the amplifier to assist in the starting of the oscillation signal. The active resistance circuit is responsive to an input signal in order to set the gain of the amplifier slightly above unity gain in order to meet the criterion for oscillation, but not too much above unity gain where the oscillator would unduly consume too much power. Thus, the oscillator has inherent low power characteristics. The active resistance circuit allows the amplifier gain to be set by software or other electronic means.

Abstract: An oscillator with oscillator and voltage control circuitry for generating an oscillation signal having an amplitude that is automatically controlled for a selectively minimized phase noise. Automatic level control is used for controlling the amplitude of the oscillation signal such that the phase noise of the oscillation signal can be maintained at some selected level, e.g., minimized. The minimum signal voltage appearing across the oscillation circuit is monitored for controlling the bias of the circuit to prevent it from entering a saturation state, thereby avoiding adverse loading effects responsible for degraded phase noise performance.

Abstract: There is provided an adaptive loop gain control circuit for a voltage-controlled oscillator (VCO). The adaptive loop gain control circuit for a voltage-controlled oscillator (VCO) includes a detected voltage generating unit which generates a detected voltage signal according to changes in an operating voltage and an operating temperature, and a control circuit unit which outputs an oscillation control current signal according to the detected voltage signal and an input control voltage signal. The adaptive loop gain control circuit for a voltage-controlled oscillator (VCO) compensates for an oscillation control current according to changes in operating voltage and temperature and compensates for the gain of a phase locked loop (PLL) system, thereby ensuring high operating stability in the PLL circuit.

Abstract: Briefly, in accordance with one embodiment of the invention, an oscillator with an automatic amplitude control loop is provided. The oscillator may include a pair of cross-coupled amplifying devices having at least two outputs. The first output may provide an oscillations and the second output may provide an amplitude detect signal.

Abstract: A voltage controlled oscillator includes an oscillation controller, first and second current sources, oscillation section, and first and second fluctuation transmitters. The oscillation controller generates first and second control potentials. The first and second current sources generate control currents corresponding to the first and second control potentials, respectively. The oscillation section is connected to a power source potential node via the first current source and connected to a ground potential node via the second current source, and generates a clock. The first fluctuation transmitter is disposed between the power source potential node and the first control potential node, and transmits a potential fluctuation in the power source potential node to the first control potential node.

Abstract: In an electronic circuit supplied from supply terminals, a terminal in the circuit being biased to a voltage between the supply terminal voltages, connections from power supply terminals are made via current generator means. The circuit is preferably an RF, balanced and/or oscillator circuit. The current generator means are preferably controllable current generators, preferably controlled by an AGC, or a common mode or differential voltage control circuit. Preferably, the controllable current generators comprise a FET or are substantially constituted by each one MOS-FET. A balanced, common-base, low-voltage Pierce crystal oscillator with two transistors and four to six current generator means is disclosed.