Adjustable Frequency Patents (Class 331/48)
  • Patent number: 9608602
    Abstract: Methods and an apparatus related to generating parameters and guidelines used in the manufacture of semiconductor IC devices are described. A method includes measuring a first oscillating signal produced by a first ring oscillator that includes a first interconnect provided in a first interconnect layer of an IC, selecting a first mode of operation for a second ring oscillator circuit that includes a second interconnect disposed in alignment with the first interconnect, selecting a second mode of operation for the second ring oscillator circuit, and determining one or more characteristics of the first interconnect based on a difference in frequency of the first oscillating signal produced when the second ring oscillator circuit is operated in the first mode and frequency of the first oscillating signal when the second ring oscillator circuit is operated in the second mode.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: March 28, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Chunchen Liu, Oscar Ming Kin Law, Ju-Yi Lu, Po-Hung Chen, Zhengyu Duan
  • Patent number: 9413344
    Abstract: Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systems, are disclosed. The adaptive clock distribution system includes a tunable-length delay circuit to delay distribution of a clock signal provided to a clocked circuit, to prevent timing margin degradation of the clocked circuit after a voltage droop occurs in a power supply supplying power to the clocked circuit. The adaptive clock distribution system also includes a dynamic variation monitor to reduce frequency of the delayed clock signal provided to the clocked circuit in response to the voltage droop in the power supply, so that the clocked circuit is not clocked beyond its performance limits during a voltage droop. An automatic calibration circuit is provided in the adaptive clock distribution system to calibrate the dynamic variation monitor during operation based on operational conditions and environmental conditions of the clocked circuit.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: August 9, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Keith Alan Bowman, Jeffrey Todd Bridges, Sarthak Raina, Yeshwant Nagaraj Kolla, Jihoon Jeong, Francois Ibrahim Atallah, William Robert Flederbach, Jeffrey Herbert Fischer
  • Patent number: 9106179
    Abstract: Apparatus are provided for voltage-controlled oscillators and related systems. An exemplary voltage-controlled oscillator includes an active-circuit arrangement that facilitates generation of an oscillating signal, and a resonator arrangement capacitively coupled to the active-circuit arrangement to influence an oscillation frequency of the oscillating signal based on a difference between a first control voltage and a second control voltage.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: August 11, 2015
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventors: Vishal P. Trivedi, Kun-Hin To
  • Patent number: 8933757
    Abstract: A voltage controlled oscillator (VCO) with low phase noise and a sharp output spectrum is desirable. The present disclosure provides embodiments of LC tank VCOs that generate output signals with less phase noise compared with conventional LC tank VCOs, while at the same time limiting additional cost, size, and/or power. The embodiments of the present disclosure can be used, for example, in wired or wireless communication systems that require low-phase noise oscillator signals for performing up-conversion and/or down-conversion.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: January 13, 2015
    Assignee: Broadcom Corporation
    Inventors: Farid Shirinfar, Tirdad Sowlati, Maryam Rofougaran, Ahmadreza Rofougaran
  • Patent number: 8928416
    Abstract: A transceiver includes a phase lock loop (PLL) and a clock data recovery circuit (CDR). The phase lock loop generates a first level control signal. The clock data recovery circuit, coupled to the phase lock loop, locks an incoming data signal to generate a data recovery clock according to a second level control signal. Wherein the clock data recovery circuit receives the first level control signal to further control a frequency range of the data recovery clock.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: January 6, 2015
    Assignee: Realtek Semiconductor Corp.
    Inventor: Haibing Zhao
  • Patent number: 8884713
    Abstract: This invention compensates for the unintentional magnetic coupling between a first and second inductor of two different closely spaced inductors separated by a conversion circuit. A cancellation circuit formed from transistors senses the magnetic coupling in the first inductor and feeds a current opposite to the induced magnetic coupling captured by the second inductor such that the coupled magnetic coupling can be compensated and allows the first and second inductors to behave independently with regards to the coupled magnetic coupling between the first and second inductors. This allows the distance between the first and second inductors to be minimized which saves silicon area. In addition, the performance is improved since the overall capacitance in both circuits can be decreased. This cancellation technique to reduce the magnetic coupling between two closed placed inductively loaded circuits allows the design of a more compact and faster performing circuit.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: November 11, 2014
    Assignee: Tensorcom, Inc.
    Inventor: KhongMeng Tham
  • Patent number: 8816778
    Abstract: A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: August 26, 2014
    Assignee: INSIDE Secure
    Inventors: Gaetan Bracmard, Jean-Pascal Maraninchi, Julien Roche
  • Patent number: 8810322
    Abstract: A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: August 19, 2014
    Assignee: Qualcomm Incorporated
    Inventors: Rajagopalan Rangarajan, Chinmaya Mishra, Maulin Bhagat, Zhang Jin
  • Patent number: 8797105
    Abstract: The present disclosure provides a tunable signal source having a plurality of oscillator cores having a coupling input, a coupling output, and a power output that is common to each of the plurality of oscillator cores. Also included is a plurality of tunable phase shifters wherein corresponding ones of the plurality of tunable phase shifters are communicatively coupled between the coupling input and the coupling output of corresponding ones of the plurality of oscillator cores, thereby forming a loop of alternating ones of the plurality of oscillator cores and alternating ones of the plurality of tunable phase shifters.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: August 5, 2014
    Assignee: Cornell University
    Inventors: Ehsan Afshari, Yahya M. Tousi
  • Patent number: 8779865
    Abstract: A design for an oscillator, and a PLL incorporating such an oscillator, which takes up little physical area but maintains a large tuning range and low phase noise. Two LC-tanks are nested and switched. Through tuning the inactive tank, the range of the active tank may be increased and finer tuning becomes possible.
    Type: Grant
    Filed: January 16, 2012
    Date of Patent: July 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Herschel A. Ainspan, John F. Bulzacchelli, Daniel J. Friedman, Ankush Goel, Alexander V. Rylyakov
  • Publication number: 20140139293
    Abstract: An integrated circuit device for generating an output frequency includes a master oscillator and a slave oscillator formed on an integrated circuit substrate. The master oscillator utilizes a bulk acoustic wave resonator that provides a reference frequency source to the device. The frequency of the slave oscillator is periodically adjusted with respect to the reference frequency source and provided as an output. The master oscillator is periodically enabled to adjust the slave oscillator. Additional automatic temperature compensation is enabled as necessary.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 22, 2014
    Applicant: CYMATICS LABORATORIES CORP.
    Inventors: Anthony L. Tsangaropoulos, David Francois Guillou
  • Patent number: 8723609
    Abstract: A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: May 13, 2014
    Assignee: Idustrial Technology Research Institute
    Inventors: Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang
  • Patent number: 8723608
    Abstract: Embodiments of the present invention relate to a self injection locked voltage controlled oscillator arrangement, a pair of coupled first and second voltage controlled oscillator devices are arranged on a chip, an amplifier device is arranged on the same of the refection type chip, and an off-chip delay line is arranged with one terminal connected to an output terminal of the coupled first and second voltage controlled oscillator devices, and on terminal adapted to reflect a signal from the output terminal, the amplifier device being arranged to amplify an injection signal from said output terminal and to supply the amplified injection signal to one of said first and second voltage controlled oscillation devices to provide a VCO arrangement that exhibits low phase noise and a small size.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: May 13, 2014
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Mingquan Bao, Thomas Per Lewin, Yinggang Li
  • Patent number: 8704603
    Abstract: A tunable Injection-Locked Oscillator (ILO) having a wide locking range is used in a Local Oscillator (LO) of a wideband wireless transceiver to generate differential signals. The ILO includes a resonator with an adjustable natural oscillating frequency. In one example, the ILO is part of a quadrature divider that can lock onto a Phase-Locked Loop (PLL) output signal in a wide frequency band while achieving lower power consumption and lower phase noise than a differential latch type divider. The ILO is tuned by disabling a Voltage-Controlled Oscillator (VCO) from driving the ILO, adjusting the natural oscillating frequency, making a measurement indicative of the natural oscillating frequency, and determining whether the measurement is within a predetermined range. If the measurement is below the predetermined range, capacitances of resonators within the ILO are decreased, whereas if the measurement is above the predetermined range, capacitances of the resonators are increased.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: April 22, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Jeongsik Yang
  • Patent number: 8610511
    Abstract: The high-frequency digitally controlled oscillator includes fully digital cells capable of being ported to any CMOS fabrication process. The oscillator has a basic modular architecture comprising a digitally controlled digital ring oscillator (DRO) having a plurality of delay stages, a counter divider and a selection multiplexer. The DRO generates the basic (intrinsic) high frequency range and the counter provides the remaining ranges through division by multiples of two. The multiplexer provides a selection mechanism for the required range of frequencies. Load capacitances to the delay stages are added/removed to control delay via utilization of a unique capacitive cell driven synchronously by two ring oscillators such that the capacitance could be added or removed utilizing the Miller effect. Moreover, multiple capacitive load cells can be added to the same stage.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: December 17, 2013
    Assignees: King Fahd University of Petroleum and Minerals, King Abdulaziz City for Science and Technology
    Inventor: Muhammad E. S. Elrabaa
  • Patent number: 8564375
    Abstract: In one general aspect, an apparatus can include a reference oscillator counter circuit configured to produce a reference oscillator count value based on a reference oscillator signal, and a target oscillator counter circuit configured to produce a target oscillator count value based on a target oscillator signal where the target oscillator signal has a frequency targeted for calibration against a frequency of the reference oscillator signal. The apparatus can include a difference circuit configured to calculate a difference between the reference oscillator counter value and the target oscillator counter value, and a summation circuit configured to define a trim code based on only a portion of bit values from the difference.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: October 22, 2013
    Assignee: Fairchild Semiconductor Corporation
    Inventors: John R. Turner, Tyler Daigle
  • Patent number: 8558625
    Abstract: A technique for enhancing the frequency tuning range for monolithic RF source generation using fully-integrated coupled Voltage-Controlled-Oscillator (VCO) arrays that contain an odd number of VCOs. Fully-monolithic SiGe VCO arrays using on-chip inductor and varactor with on-chip bias current sources have been carefully designed and simulated in IBM 7HP 0.18 ?m BiCMOS technology and taped out for fabrication. The SPICE simulated frequency and phase tuning of the 1-D VCO×5 array is dependent on the edge VCOs termination impedance, the tuning voltages, and the VCO coupling strength. The simulated data suggests that the enhanced tuning range and beam steering can be accomplished using coupled-VCO arrays without needing complex and bulky phase shifters. This design technique imposes no apparent phase noise penalty but can provide simulated RF frequency tuning range of ˜40% and also ˜+/?25° beam steering for active antennas applications.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: October 15, 2013
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Yu-Chun Donald Lie, Brian Meadows, Joseph Neff, John Cothern, Jerry Lopez
  • Patent number: 8558624
    Abstract: A semiconductor integrated circuit capable of reliably detecting oscillation stop of a vibrator-type oscillation circuit and reliably restarting the oscillation circuit when oscillation stop is detected is provided. The semiconductor integrated circuit includes one or more main oscillation circuits configured to generate a main clock signal by a vibrator, a ring oscillator configured to always operate independently of the main oscillation circuit, a main clock detection circuit configured to monitor the main clock signal on the basis of an output clock signal of the ring oscillator and to determine an operation state of the main oscillation circuit, and an switch circuit configured to switch a combination of elements making up the main oscillation circuit in response to a detection result of the main clock detection circuit.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: October 15, 2013
    Assignee: Panasonic Corporation
    Inventor: Kazuhisa Raita
  • Patent number: 8552804
    Abstract: An apparatus includes an adjustable oscillator circuit configured to generate an output signal having a frequency that varies responsive to a frequency control signal and a frequency reference generator circuit configured to produce a frequency reference signal. The apparatus further includes a calibration circuit configured to determine a relationship of the output signal to the frequency reference signal and to enable and disable the frequency reference generator circuit based on the determined relationship.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 8, 2013
    Assignee: Integrated Device Technology Inc.
    Inventors: Chenxiao Ren, Tao Jing
  • Publication number: 20130241661
    Abstract: A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.
    Type: Application
    Filed: July 26, 2012
    Publication date: September 19, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang
  • Patent number: 8525599
    Abstract: Aspects of a method and system for frequency tuning based on characterization of an oscillator are provided. A value of a first control word which controls a variable impedance of an oscillator may be determined. The determined value may be mapped to a corresponding value of a second control word which controls a variable impedance of a tuned circuit. The mapping may be based on a relationship between the variable impedance of the oscillator and the variable impedance of the tuned circuit, such as logical and/or mathematical relationship. The value of the first control word may be determined based on desired frequency of the tuned circuit and/or based on a desired impedance of the variable impedance of the tuned circuit. The tuned circuit may comprise, for example, an oscillator or a filter.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: September 3, 2013
    Assignee: Broadcom Corporation
    Inventor: Ahmadreza Rofougaran
  • Patent number: 8456246
    Abstract: A quadrature VCO includes a first oscillator unit and a second oscillator unit. Each of the first and second oscillator unit is composed of a DC bias source, a complementary cross-coupled pair, an LC resonator unit, a frequency-doubling sub-harmonic coupler unit, and a ground terminal. When the LC resonator units of the first and second oscillator units are operated, four signals of different phases can be outputted via the output terminals. In this way, the output phase difference of the two oscillator units can keep 180 degrees and allow the two oscillator units to mutually inject signals to generate quadrature output signals.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: June 4, 2013
    Assignee: National Chung Cheng University
    Inventors: Shuenn-Yuh Lee, Liang-Hung Wang, Yu-Heng Lin
  • Publication number: 20130082785
    Abstract: The present disclosure provides a tunable signal source having a plurality of oscillator cores having a coupling input, a coupling output, and a power output that is common to each of the plurality of oscillator cores. Also included is a plurality of tunable phase shifters wherein corresponding ones of the plurality of tunable phase shifters are communicatively coupled between the coupling input and the coupling output of corresponding ones of the plurality of oscillator cores, thereby forming a loop of alternating ones of the plurality of oscillator cores and alternating ones of the plurality of tunable phase shifters.
    Type: Application
    Filed: October 4, 2012
    Publication date: April 4, 2013
    Applicant: Cornell University with its principal place of business at Cornell Center for Technology
    Inventors: Ehsan Afshari, Yahya M. Tousi
  • Publication number: 20130021106
    Abstract: A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.
    Type: Application
    Filed: July 19, 2012
    Publication date: January 24, 2013
    Applicant: INSIDE SECURE
    Inventors: Gaetan BRACMARD, Jean-Pascal MARANINCHI, Julien ROCHE
  • Patent number: 8351867
    Abstract: The present invention provides an oscillator and a communication system using the oscillator, in particular, an LC oscillator adapted to lessen phase noise deterioration due to harmonic distortions and increase the amplitude of oscillation, thereby having a favorable low phase noise characteristic. The oscillator comprises at least one voltage to current converter consisting of a transistor and a resonator comprising two LC tanks consisting of a pair of conductive elements and inductive elements. A feedback loop is formed such that an output terminal of the voltage to current converter is connected to the resonator and a current input to the resonator is converted to a voltage which is in turn fed back to an input terminal of the voltage to current converter. Inductive elements constituting the two LC tanks constituting the resonator are mutually inductively couple and a coefficient of the mutual induction is about ?0.6.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: January 8, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Yusuke Wachi
  • Patent number: 8339208
    Abstract: A tunable multiphase ring oscillator includes a plurality of stages connected in series in a ring structure, where each stage generating a stage output from a stage input. Each stage of the tunable multiphase ring oscillator includes a plurality of trans-conductance cells, each generating an output from at least one portion of the stage input. Each stage further includes at least one phase shifting module for imparting at least one phase shift to the at least one portion of the stage input, an oscillator unit for generating the stage output from a combination of the plurality of outputs, and means for varying at least one of the plurality outputs so as to adjust a phase of the stage output.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: December 25, 2012
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Howard Cam Luong, Sujiang Rong
  • Patent number: 8306067
    Abstract: The invention discloses a dual frequency multiplexer by which a first and second coaxial harmonic oscillator type band pass filters are disposed in a box. The box includes a base body, a cover plate and a cover body. The two coaxial harmonic oscillator type hand pass filters are located on the base body and spaced each other by a metal plate; the multiplexer port, first and second ports are positioned on lateral side of the base body. The blocking capacitors are contained in the coaxial chamber of the two coaxial harmonic oscillator type band pass filters. The cover plate is secured on the base body; the first and second direct current circuits are placed on the cover plate; the low pass filters of the first and second direct current circuits are fixed on an edge of a top surface of the coaxial chamber by means of a support member; the cover body and the base body are fastened with each other. The blocking capacitors each are of distributed parameter capacitor.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: November 6, 2012
    Assignee: Comba Telecom System (China) Ltd.
    Inventors: Yingjie Di, Tao He, Bin He, Mengmeng Shu, Jingmin Huang
  • Publication number: 20120194280
    Abstract: An oscillation device capable of highly accurate temperature compensation of an output frequency is provided. The oscillation device includes: first and second oscillator circuits oscillating first and second quartz-crystal resonators with overtones respectively; a frequency difference detecting part finding a value corresponding to a difference value between values corresponding to differences between f1 and f1r and between f2 and f2r, where f1 and f2 are oscillation frequencies of the first and second oscillator circuits, and f1r and f2r are oscillation frequencies of the first and second oscillator circuits at a reference temperature; and a correction value obtaining part which, based on the value corresponding to the difference value and a relation between the value corresponding to the difference value and a frequency correction value of the oscillation frequency f1, obtains the frequency correction value of f1, wherein the output frequency is corrected based on the found frequency correction value.
    Type: Application
    Filed: January 24, 2012
    Publication date: August 2, 2012
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Kazuo AKAIKE, Shinichi Sato
  • Publication number: 20120182078
    Abstract: A quadrature VCO includes a first oscillator unit and a second oscillator unit. Each of the first and second oscillator unit is composed of a DC bias source, a complementary cross-coupled pair, an LC resonator unit, a frequency-doubling sub-harmonic coupler unit, and a ground terminal. When the LC resonator units of the first and second oscillator units are operated, four signals of different phases can be outputted via the output terminals. In this way, the output phase difference of the two oscillator units can keep 180 degrees and allow the two oscillator units to mutually inject signals to generate quadrature output signals.
    Type: Application
    Filed: June 3, 2011
    Publication date: July 19, 2012
    Inventors: Shuenn-Yuh Lee, Liang-Hung Wang, Yu-Heng Lin
  • Patent number: 8160168
    Abstract: A first oscillating signal may be generated via a first direct digital frequency synthesizer of a communication device. One or more second oscillating signals may be generated via one or more second direct digital frequency synthesizers of the communication device. Signals received via a plurality of antennas may be processed utilizing the first oscillating signal. Signals to be transmitted via the plurality of antennas may be processed utilizing the first oscillating signal and the one or more second oscillating signals. The communication device may comprise a plurality of receive channels, a plurality of transmit channels, and a multiplexer. The first oscillating signal may be coupled, via the multiplexer, to the plurality of receive paths and one of the transmit paths. During time intervals in which the communication device is configured to receive signals via the plurality of antennas, the multiplexer may route the first oscillating signal to the first one or more direct digital frequency synthesizers.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: April 17, 2012
    Assignee: Broadcom Corporation
    Inventor: Ahmadreza Rofougaran
  • Publication number: 20120081155
    Abstract: The invention provides a dual-mode voltage-controlled oscillator (DMVCO), a frequency synthesizer and a wireless receiving device, and pertains to the technical field of integrated circuit of radio frequency wireless receiver. The DMVCO and the frequency synthesizer can operate in a wideband mode and a quadrature mode. When operating in the quadrature mode, a quadrature signal is provided for a Single Sideband Mixer of the frequency synthesizer by a quadrature coupling of a first voltage-controlled oscillator unit and a second voltage-controlled oscillator unit in the DMVCO in the overlapped frequency band so that the frequency synthesizer can cover a higher output frequency band. Therefore, the tuning range of the DMVCO of the invention is wide, and the frequency synthesizer using the DMVCO is low in power consumption, simple in structure and has good frequency spur performance.
    Type: Application
    Filed: April 14, 2011
    Publication date: April 5, 2012
    Applicant: FUDAN UNIVERSITY
    Inventors: Wei Li, Jin Zhou
  • Patent number: 8143955
    Abstract: Oscillator circuit for radio frequency transceivers. An oscillator circuit includes a first oscillator that generates a signal having a first frequency and a second oscillator that generates a signal having a second frequency. The oscillator circuit includes a mixer that is responsive to the signal having the first frequency and the signal having the second frequency to provide a signal having a third frequency and one or more frequency components. The oscillator circuit includes a filter that is responsive to the signal from the mixer to attenuate the one or more frequency components and provide a signal having a desired frequency. The oscillator circuit includes a correction circuit to correct a drift in at least one of the first frequency and the second frequency by controlling the second frequency, thereby correcting the drift in the third frequency and the desired frequency.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: March 27, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Gireesh Rajendran, Debapriya Sahu, Alok Prakash Joshi, Ashish Lachhwani
  • Patent number: 8144249
    Abstract: A multi-slicing horizontal synchronization signal generating apparatus and method is provided. The apparatus includes a slicer, a numerically controlled oscillator (NCO), a first phase detector, a second phase detector and a calibration circuit. The slicer performs edge detection on a video signal having a first horizontal synchronization, and generates a first detection signal and a second detection signal according to a first voltage level and a second voltage level, respectively. The NCO generates a second horizontal synchronization signal. The first phase detector detects a first phase difference between the first detection signal and the second horizontal synchronization signal, and the second detector detects the second phase difference between the second detection signal and a reference time point. The calibration circuit generates a calibration signal according to the first phase difference and the second phase difference.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: March 27, 2012
    Assignee: MStar Semiconductor, Inc.
    Inventors: Cheng Ting Ko, Chung Hsiung Lee
  • Patent number: 8134421
    Abstract: A voltage control oscillator includes: first and second field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; third and fourth field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; a first inductor connected between the drain of the first field effect transistor and the drain of the second field effect transistor; a second inductor connected between the drain of the third field effect transistor and the drain of the fourth field effect transistor; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; a first capacitor that capacitively couples one end of the third inductor and one end of the fourth inductor; and a second capacitor that capacitively couples the other end of the third inductor and the other end of the fourth inductor.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: March 13, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Hirashiki, Shinichiro Ishizuka, Nobuyuki Itoh
  • Patent number: 8130044
    Abstract: Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having inputs and an output. The phase-locked loop circuitry may include multiple voltage-controlled oscillators. The phase-locked loop circuitry may be configured to switch a desired one of the voltage-controlled oscillators into use. Each voltage-controlled oscillator may be controlled by control signals applied to a control input for that voltage-controlled oscillator. The control input of each voltage-controlled oscillator may be connected to the buffer output. The output of each voltage-controlled oscillator may be connected to a respective one of the multiplexer inputs. Power-down transistors may be used to disable unused voltage-controlled oscillators to conserve power. The power-down transistors and the multiplexer may be controlled by signals from programmable elements.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: March 6, 2012
    Assignee: Altera Corporation
    Inventors: William W. Bereza, Rakesh H. Patel
  • Patent number: 8125282
    Abstract: In a dual band capable voltage controlled oscillator VCO circuit comprising two voltage controlled oscillator units VCO1, VCO2, the voltage controlled oscillator units VCO1, VCO2 are synchronized and connected via at least two coupled transmission lines TL1, TL2, the transmission lines (TL1, TL2) are arranged to operate according to one of two modes to enable varying a combined inductance of the synchronized oscillator units VCO1, VCO2 and the oscillation frequency for the voltage controlled oscillator circuit VCO.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: February 28, 2012
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Mingquan Bao, Björn Albinsson
  • Publication number: 20120032745
    Abstract: In one embodiment, a method includes generating, by a LCVCO, a first signal having a first phase based on a resonant frequency of a first LC tank; generating, by a second LCVCO, a second periodic signal having a second phase based on a resonant frequency of a second LC tank; determining a phase offset between the first LC tank and the second LC tank based on the first and second signals; generating a first output signal and a second output signal based on the determined phase offset; and adjusting the phase offset such that the phase offset is substantially equal to a predetermined phase offset. In one embodiment, the adjusting comprises modulating a first impedance of the first LC tank based on the first output signal, and/or modulating a second impedance of the second LC tank based on the second output signal.
    Type: Application
    Filed: August 9, 2010
    Publication date: February 9, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Nikola Nedovic
  • Patent number: 8058934
    Abstract: A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: November 15, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Rajagopalan Rangarajan, Chinmaya Mishra, Maulin Bhagat, Zhang Jin
  • Publication number: 20110215876
    Abstract: Embodiments of the present invention relate to a self injection locked voltage controlled oscillator arrangement, a pair of coupled first and second voltage controlled oscillator devices are arranged on a chip, an amplifier device is arranged on the same of the refection type chip, and an off-chip delay line is arranged with one terminal connected to an output terminal of the coupled first and second voltage controlled oscillator devices, and on terminal adapted to reflect a signal from the output terminal, the amplifier device being arranged to amplify an injection signal from said output terminal and to supply the amplified injection signal to one of said first and second voltage controlled oscillation devices to provide a VCO arrangement that exhibits low phase noise and a small size.
    Type: Application
    Filed: November 18, 2008
    Publication date: September 8, 2011
    Inventors: Mingquan Bao, Thomas Lewin, Yinggang Li
  • Publication number: 20110210797
    Abstract: An apparatus and a method for compensating for a mismatch in temperature coefficients of two oscillator frequencies to match a desired frequency ratio between the two oscillator frequencies over a temperature range. In one embodiment of a temperature sensor, first and second oscillators of different temperature characteristics are coupled to a differential frequency discriminator (DFD) circuit. The DFD circuit compensates for the different characteristics in order to match a frequency difference between the first and second frequencies over a temperature range.
    Type: Application
    Filed: May 3, 2011
    Publication date: September 1, 2011
    Inventors: Emmanuel P. Quevy, Manu Seth
  • Patent number: 8000162
    Abstract: A voltage-controlled oscillator comprises a first oscillator and a second oscillator. The first oscillator may generate a plurality of intermediate clock signals at a plurality of first nodes, multiply connected to a plurality of first ring shape circuits, in response to a control voltage. The plurality of intermediate clock signals may have a different phase from each other and a same phase difference with each other. The second oscillator may generate a plurality of output clock signals at a plurality of second nodes, multiply connected to a plurality of second ring shape circuits, by changing a voltage level of the intermediate clock signals. The plurality of second ring shape circuits may pass the plurality of first nodes.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: August 16, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chan-Kyung Kim
  • Publication number: 20110187463
    Abstract: Oscillator circuit for radio frequency transceivers. An oscillator circuit includes a first oscillator that generates a signal having a first frequency and a second oscillator that generates a signal having a second frequency. The oscillator circuit includes a mixer that is responsive to the signal having the first frequency and the signal having the second frequency to provide a signal having a third frequency and one or more frequency components. The oscillator circuit includes a filter that is responsive to the signal from the mixer to attenuate the one or more frequency components and provide a signal having a desired frequency. The oscillator circuit includes a correction circuit to correct a drift in at least one of the first frequency and the second frequency by controlling the second frequency, thereby correcting the drift in the third frequency and the desired frequency.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 4, 2011
    Applicant: Texas Instruments Incorporated
    Inventors: Gireesh Rajendran, Debapriya Sahu, Alok Prakash Joshi, Ashish Lachwani
  • Patent number: 7961056
    Abstract: Embodiments of the present invention include a low phase noise oscillator circuit using a current-reuse technique to reduce power consumption and improve phase noise, where the oscillator circuit comprises a first VCO coupled to a second VCO, and the outputs of the first and second VCOs are coupled with passive elements, such as capacitors. The overall power consumption of both the first and second VCOs is about the same as a single VCO. Furthermore, the phase noise is lowered by around 3 dB. Thus, the phase noise performance is improved without increasing the power consumption of the oscillator circuit.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: June 14, 2011
    Assignee: Intel Corporation
    Inventors: Stewart S. Taylor, Diptendu Ghosh
  • Patent number: 7952438
    Abstract: An injection locking clock generator can vary the free running frequency of an injection locking oscillator to broaden an operating frequency range of an oscillation signal injected to itself, thereby performing an injection locking with respect to all frequencies of an operating frequency range. The clock generator includes a main oscillator configured to generate oscillation signals of a frequency corresponding to a control voltage, and an injection locking oscillator configured to generate division signals synchronized with the oscillation signals by dividing the oscillation signals, wherein a free running frequency of the injection locking oscillator is set according to the frequency of the oscillation signals.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: May 31, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Taek-Sang Song, Kyung-Hoon Kim, Dae-Han Kwon
  • Patent number: 7898344
    Abstract: In a multi-radar system, configured comprising a plurality of radar units which generate and output signals the frequency of which increases and decreases periodically, each radar unit generates and outputs signals synchronized with a prescribed sync signal, such that the upper limit and lower limit of the periodically increasing and decreasing frequency is different for the signals of each radar unit, and moreover the timing of the upper limit and lower limit of the signals substantially coincide. By this means, the frequency intervals between signals can be reduced, and more channels can be set, without causing radio wave interference.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: March 1, 2011
    Assignee: Fujitsu Limited
    Inventor: Hironobu Hongo
  • Patent number: 7868705
    Abstract: In a high-frequency oscillator, a first resonance circuit and a second resonance circuit are respectively connected to a first amplifier circuit and a second amplifier circuit. A selection circuit includes a first switch circuit and a second switch circuit which selectively operate one of the first amplifier circuit and the second amplifier circuit. A grounded capacitor is connected to output sides of the first amplifier circuit and the second amplifier circuit. The grounded capacitor is commonly used by both the first amplifier circuit and the second amplifier circuit. An auxiliary grounded capacitor is connected between the first switch circuit and the first amplifier circuit. Accordingly, the grounded capacitor and the auxiliary grounded capacitor are connected to each other in parallel only when the first amplifier circuit is activated.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: January 11, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tomohide Aramata
  • Publication number: 20100308924
    Abstract: A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 9, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Rajagopalan Rangarajan, Chinmaya Mishra, Maulin Bhagat, Zhang Jin
  • Patent number: 7812679
    Abstract: A frequency generation unit (FGU) 100 includes a plurality of selectable voltage controlled oscillators (110) whose output frequencies are chosen in relationship with a predetermined intermediate frequency (IF) and frequency divider value (M) to provide multi-band frequency generation capability in a single communication device. A programmable reference divider (104), phase detector (174) and programmable charge pump (106) take an incoming reference frequency (120) and generate a charge pump output (124) to optimize the in-band phase noise in the FGU 100. A fixed loop filter (108) filters the charge pump output (124) to generate a control voltage (126) for the selectable VCOs (110). The desired frequency band is selected and enabled using control logic (128).
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 12, 2010
    Assignee: Motorola, Inc.
    Inventor: Armando J. Gonzalez
  • Patent number: 7808327
    Abstract: Methods and systems to provide digitally controlled crystal oscillators are disclosed. One example method includes determining a state of an oscillator system and selecting a first output of a digitally controlled crystal oscillator or a second output of a second oscillator based on the determination. In an example implementation, the second oscillator is a ring oscillator.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: October 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Gennady Feygin, Khurram Muhammad, Chih-Ming Hung, Meng-Chang Lee
  • Patent number: 7791423
    Abstract: The present invention relates to a two-frequency switchover type crystal oscillator in which first and second IC chips and first and second crystal resonators are connected to wiring patterns of a circuit substrate to form first and second oscillation circuits, and the first and second oscillation circuits are selectively operated in accordance with a selection mechanism; a two-frequency switchover type crystal oscillator in which surfaces opposite to circuit function surfaces of the first and second IC chips are connected to form a two-stage structure; IC terminals of the circuit function surface of the first IC chip are directly connected both electrically and mechanically to the wiring patterns; and IC terminals of the circuit function surface of the second IC chip are connected electrically by wire bonding to the wiring patterns; wherein those wiring patterns of the wiring patterns that are connected to power source, output, and ground terminals of the first and second IC chips are connected in common wit
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: September 7, 2010
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Makoto Watanabe