Plural Oscillators Patents (Class 331/46)
  • Patent number: 9692464
    Abstract: A signal transmitter includes a modulation circuit, a signal separation circuit, and a signal combining circuit. The modulation circuit modulates a first signal to a modulated signal. The signal separation circuit separates the modulated signal into N separated signals. The N separated signals have different phases. The signal combining circuit combines the N separated signals to eliminate at least one order of harmonic signals of the N separated signals so as to generate an output signal.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: June 27, 2017
    Assignee: RichWave Technology Corp.
    Inventors: Ting-Yuan Cheng, Da-Cheng Peng, Zhuo Fu, Hwey-Ching Chien
  • Patent number: 9673754
    Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: June 6, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Egidio Ragonese, Vincenzo Fiore, Nunzio Spina, Giuseppe Palmisano
  • Patent number: 9479144
    Abstract: A clock system including a ring oscillator having a plurality of cascaded inverters, each of the cascaded inverters having a pair of inputs coupled to outputs of a respectively adjacent inverter stage and having a pair of outputs coupled to inputs of another respectively adjacent inverter stage, each inverter stage having a common mode control circuit provided therein, and a feedback controller adapted to transmit a control signal to the common mode control circuit of at least one of the inverters.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: October 25, 2016
    Assignee: Analog Devices, Inc.
    Inventor: Shawn S. Kuo
  • Patent number: 9473067
    Abstract: Reducing coupling and mismatch in multi-core VCOs, including: arranging a plurality of inductors in a plurality of VCO cores in a parallel differential inductor configuration with shared leads to form a single node, wherein the plurality of inductors includes at least a first inductor and a second inductor; connecting power/ground traces to the first inductor from a first side only; and connecting the power/ground traces to the second inductor from another side different from the first side only to avoid making a current loop.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 18, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jianlei Shi, Jeongsik Yang, Young Gon Kim
  • Patent number: 9448125
    Abstract: A method, in one embodiment, can include modeling and calibrating two types of sensors that are part of a semiconductor device. In addition, the method can include determining a temperature and voltage based on data received from the two sensors.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: September 20, 2016
    Assignee: NVIDIA CORPORATION
    Inventors: Abhishek Singh, Wojciech Jakub Poppe, Ilyas Elkin
  • Patent number: 9438167
    Abstract: An oscillation circuit includes: an oscillation unit which includes a first terminal and a second terminal connected to a resonator, a third terminal, a fourth terminal to which at least one of a power supply potential and a signal for inspecting the resonator is applied, a first switching unit which switches modes of electrical connection between the first terminal and the third terminal, and a second switching unit which switches modes of electrical connection between the second terminal and the fourth terminal.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: September 6, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Yosuke Itasaka, Masayuki Ishikawa, Takehiro Yamamoto, Akihiro Fukuzawa
  • Patent number: 9385729
    Abstract: A system includes: a phase frequency detector (PFD) having an output switchably connectable and disconnectable to a first signal path via a first switch, and switchably connectable and disconnectable to a second signal path via a second switch; a first filter disposed in the first signal path; a second filter disposed in the second signal path; and, a voltage controlled oscillator (VCO) operatively coupled to the first signal path downstream of the first filter, and operatively coupled to the second signal path downstream of the second filter. The VCO includes: a capacitive device or a current controlling device operatively coupled to the first signal path; and, a bulk terminal operatively coupled to the second signal path.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: July 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Run Levinger, Jakob Vovnoboy
  • Patent number: 9319082
    Abstract: A receiver and a transmitter that copes with interference in a super-regenerative communication system, and a method of using the receiver and the transmitter, are provided. A super-regenerative receiver includes a resonance frequency adjusting unit configured to adjust a resonance frequency associated with a filtering band of a transmission signal that is received from a transmitter. The super-regenerative receiver further includes an oscillation signal generating unit configured to generate an oscillation signal, using a positive feedback amplification, based on the resonance frequency and the transmission signal. The super-regenerative receiver further includes an oscillation characteristic detecting unit configured to detect a characteristic of the oscillation signal. The super-regenerative receiver further includes a determining unit configured to determine whether interference is included in the transmission signal based on the characteristic of the oscillation signal and the resonance frequency.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: April 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon Seong Kang, Jae Sup Lee, Hyo Sun Hwang
  • Patent number: 9287731
    Abstract: According to one aspect of the present disclosure, there is provided a battery charging system. The battery charging system includes battery charging circuitry configured to provide charging current to a battery. The battery charging system further includes feedback circuitry configured to generate a feedback signal indicative of a battery charging condition, wherein the battery charging system is configured to control the battery charging current based on, at least in part, the feedback signal. The battery charging system further includes feed forward circuitry configured to adjust the feedback signal to decrease battery charging current when a decrease in battery current draw exceeds a threshold, and wherein the feed forward circuitry is configured to decrease the battery charging current faster than the feedback circuitry.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: March 15, 2016
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Rendon Holloway, Qinghung (Michelle) Lee, Jonathan Klein
  • Patent number: 9270289
    Abstract: A system for signal generation may include a phase-locked-loop including a first oscillator. The system may also include a second oscillator. The first oscillator may be configured to generate a first signal based on a phase-locked-loop control signal generated by the phase-locked-loop. The second oscillator may be configured to generate a second signal based on the phase-locked-loop control signal such that a free-running frequency of the first signal is approximately equal to a free-running frequency of the second signal to obtain injection locking between the first oscillator and the second oscillator when energy from the first oscillator is coupled into the second oscillator.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: February 23, 2016
    Assignee: FUJITSU LIMITED
    Inventors: William W. Walker, Nikola Nedovic
  • Patent number: 9246469
    Abstract: A manufacturing method of an oscillator is a manufacturing method of an oscillator which includes a vibrator and a semiconductor circuit device including an oscillation part connected to the vibrator and a control part to switch an operation mode between a normal mode in which the oscillation part performs an oscillation operation and an inspection mode in which characteristics of the vibrator are inspected, and the manufacturing method includes preparing the semiconductor circuit device in which the operation mode is set to the inspection mode, connecting the semiconductor circuit device and the vibrator electrically, and inspecting the characteristics of the vibrator which is in a state electrically connected to the semiconductor circuit device.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: January 26, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Masayuki Ishikawa, Yosuke Itasaka, Takehiro Yamamoto, Akihiro Fukuzawa
  • Patent number: 9093949
    Abstract: There is provided an integrated electronic circuit. The integrated electronic circuit includes a voltage controlled oscillator and a frequency doubler connected to the voltage controlled oscillator. A frequency doubling input of the frequency doubler is load isolated from an output of the voltage controlled oscillator.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: July 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Bodhisatwa Sadhu, Mihai A. Sanduleanu, Alberto Valdes Garcia, Scott K. Reynolds
  • Patent number: 9041478
    Abstract: An electronic oscillator circuit has a first oscillator, for supplying a first oscillation signal, a second oscillator, for supplying a second oscillation signal, a first controller for delivering the first control signal as a function of a phase difference between a first controller input and a second controller input of the first controller; a second controller for delivering the second control signal as a function of a phase difference between a first controller input of the second controller and a second controller input of the second controller; a resonator; at least a second resonance frequency, with a first phase shift dependent on the difference between the frequency of a second exciting signal and the second resonance frequency and processing means, for receiving the first oscillator signal and the second oscillator signal, determining their mutual proportion, looking up a frequency compensation factor in a prestored table and outputting a compensated oscillation signal.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: May 26, 2015
    Assignee: ANHARMONIC B.V.
    Inventor: Antonius Johannes Maria Montagne
  • Patent number: 9019021
    Abstract: Embodiments provide a multi-phase voltage controlled oscillator (VCO) that produces a plurality of output signals having a common frequency and different phases. In one embodiment, the VCO may include a passive conductive structure having a first ring and a plurality of taps spaced around the first ring. The VCO may further include a capacitive load coupled to the passive conductive structure, one or more feedback structures coupled between a pair of opposing taps of the plurality of taps, and one or more current injection devices coupled between a pair of adjacent taps of the plurality of taps.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: April 28, 2015
    Assignee: Intel Corporation
    Inventors: Rotem Banin, Ofir Degani, Eran Socher
  • Patent number: 9007132
    Abstract: An oscillation signal generator includes a quadrature voltage-controlled oscillator (QVCO), a phase corrector and a frequency adjusting circuit. The QVCO provides multiple oscillation signals having difference phases. The phase corrector selects one of the oscillation signals as a first oscillation signal and outputs the first oscillation signal from a first output terminal, and selects one of the oscillation signals as a second oscillation signal and outputs the second oscillation signal from a second output terminal. A phase difference between the first and second oscillation signals satisfies a predetermined relationship. The frequency adjusting circuit is coupled to the phase corrector, and generates a quadrature signal and an in-phase signal according to the oscillation signals. The frequency of the oscillation signals is a non-integral multiple of the frequencies of the quadrature and in-phase signals.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: April 14, 2015
    Assignee: MStar Semiconductor, Inc.
    Inventor: Jian-Yu Ding
  • Patent number: 9000849
    Abstract: A phase-modification circuit is described. This phase-modification circuit reduces jitter by injecting a divided reference clock in a phase-locked loop from an auxiliary oscillator and by effectively gradually and completely transferring its phase to a master oscillator. The phase-correction strength in the phase-modification circuit is increased by successively coupling an edge in the divided reference clock over many cycles of a clock in the master oscillator. By increasing the correction strength, the phase error is effectively nulled out, thereby reducing the total absolute peak jitter. Moreover, because the correction is gradual and successive, the phase-modification circuit also significantly reduces the cycle-to-cycle jitter and half-cycle or edge jitter.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: April 7, 2015
    Assignee: Oracle International Corporation
    Inventors: Suwen Yang, Frankie Y. Liu
  • Patent number: 8994461
    Abstract: A cascaded oscillator array includes a first oscillator array and a second oscillator array. The first oscillator array includes at least three oscillator elements coupled unidirectionally in a first ring such that the first oscillator array outputs a first oscillating signal. Each of the at least three oscillator elements is coupled to receive a signal from a sensing element. The second oscillator array includes at least three oscillator elements coupled unidirectionally in a second ring such that the second oscillator array outputs a second oscillating signal. A first number of the at least three oscillator elements of the first oscillator array is the same as a second number of the at least three oscillator elements of the second oscillator. Each oscillator element of the at least three oscillator elements of the second oscillator array is coupled to receive an output signal from a single oscillator element of the at least three oscillator elements of the first oscillator.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: March 31, 2015
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Visarath In, Patrick Longhini, Yong (Andy) Kho, Antonio Palacios
  • Patent number: 8994465
    Abstract: A method for reducing the phase noise of a oscillator includes monitoring a phase slope of a resonator, and controlling the resonator to operate the resonator at a high phase slope condition, wherein the resonator comprises a piezoelectric material, or piezoelectric quartz.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: March 31, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Randall L. Kubena, Richard J. Joyce, Harris P. Moyer
  • Patent number: 8975975
    Abstract: According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: March 10, 2015
    Assignee: Intel Corporation
    Inventors: Gerhard Schrom, William Dawson Kesling, Alexander Lalexan Lyakhov, Maynard C. Falconer, Harry G. Skinner
  • Patent number: 8975936
    Abstract: An integrated circuit includes a plurality of resonant clock domains of a resonant clock network. Each resonant clock domain has at least one clock driver that supplies a portion of clock signal to an associated resonant clock domain. The resonant clock network operates in a resonant mode with inductors connected to pairs of resonant clock domains at boundaries between the resonant clock domains. Each inductor forms an LC circuit with clock load capacitance in the pair of resonant clock domains to which the inductor is connected.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: March 10, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Visvesh S. Sathe, Samuel D. Naffziger
  • Publication number: 20150065068
    Abstract: An inductor layout (200, 300, 400) comprising a first inductor (210, 310, 410) and a second inductor (220, 320, 420). The first and second inductors (210, 310, 410; 220, 320, 420) are electrically and magnetically independent inductors concentrically arranged on an integrated circuit 800. At least one of the first and second inductors (210, 310, 410; 220, 320, 420) is a multi-loop inductor with a first axis (226a, 316a, 326a, 416a, 426a) of symmetry.
    Type: Application
    Filed: April 2, 2013
    Publication date: March 5, 2015
    Applicant: Ericsson Modems SA
    Inventors: Thomas Mattsson, Pietro Andreani
  • Patent number: 8957739
    Abstract: The present disclosure relates to a device and method to reduce voltage headroom within a voltage-controlled oscillator by utilizing trifilar coupling or transformer feedback with a capacitive coupling technique. In some embodiments of trifilar coupling, a VCO comprises cross-coupled single-ended oscillators, wherein the voltage of first gate within a first single-ended oscillator is separated from the voltage of a second drain within a second single-ended oscillator within the cross-coupled pair.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: February 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ying-Ta Lu, Hsien-Yuan Liao, Ho-Hsiang Chen, Chewn-Pu Jou
  • Patent number: 8947168
    Abstract: Electronic circuitry comprising operational circuits of active switching type requiring timing signals, and conductive means for distributing said timing signals to the operational circuits, wherein the timing signal distribution means includes a signal path that has different phases of a drive signal are supplied via active means at different positions about the signal path where that path exhibits endless electro-magnetic continuity without signal phase inversion or has interconnections with another signal path having different substantially unidirectional signal flow where there is no endless electromagnetic continuity between those signal paths and generally has non-linear associated circuit means where the signal path is of a transmission line nature.
    Type: Grant
    Filed: March 19, 2013
    Date of Patent: February 3, 2015
    Assignee: Analog Devices, Inc.
    Inventor: John Wood
  • Patent number: 8943352
    Abstract: A device reduces its energy consumption using a relatively lower frequency and lower power secondary oscillator to maintain timing information when a higher frequency and higher power primary oscillator is inactivated. The secondary oscillator maintains timing information at a higher resolution than the period of the oscillator, so as to conserve synchronization when the higher frequency, higher power primary oscillator is inactivated. In some embodiments, a microsequencer is programmably configured to control an integrated radio receiver and transmitter using less power than an associated microprocessor would use to perform the same functions. In other embodiments, flexible event timing facilitates the merging of wake-up events to reduce the energy consumed by wake-up operations in the device.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: January 27, 2015
    Assignee: Dust Networks, Inc.
    Inventor: Brett Warneke
  • Patent number: 8933757
    Abstract: A voltage controlled oscillator (VCO) with low phase noise and a sharp output spectrum is desirable. The present disclosure provides embodiments of LC tank VCOs that generate output signals with less phase noise compared with conventional LC tank VCOs, while at the same time limiting additional cost, size, and/or power. The embodiments of the present disclosure can be used, for example, in wired or wireless communication systems that require low-phase noise oscillator signals for performing up-conversion and/or down-conversion.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: January 13, 2015
    Assignee: Broadcom Corporation
    Inventors: Farid Shirinfar, Tirdad Sowlati, Maryam Rofougaran, Ahmadreza Rofougaran
  • Patent number: 8928416
    Abstract: A transceiver includes a phase lock loop (PLL) and a clock data recovery circuit (CDR). The phase lock loop generates a first level control signal. The clock data recovery circuit, coupled to the phase lock loop, locks an incoming data signal to generate a data recovery clock according to a second level control signal. Wherein the clock data recovery circuit receives the first level control signal to further control a frequency range of the data recovery clock.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: January 6, 2015
    Assignee: Realtek Semiconductor Corp.
    Inventor: Haibing Zhao
  • Patent number: 8912852
    Abstract: A quartz transducer having four or more crystal-controlled oscillators intended for measurement of applied pressure and temperature. All four oscillators are controlled by crystal quartz resonators operating in the thickness-shear mode. Two crystals measure the pressure and temperature respectively. A third crystal is a reference, and the fourth crystal may be another reference crystal or a second temperature crystal. The output of the latter is either phase leading or phase lagging the thermal response of the main temperature sensor.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: December 16, 2014
    Assignee: Sensor Developments AS
    Inventor: Oivind Godager
  • Patent number: 8896384
    Abstract: A phase locked loop (PLL) includes a detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO), a divider, and a frequency change module. The detector provides a phase difference based on a reference signal and a feedback signal. The charge pump provides a charge based on the phase difference. The loop filter provides a voltage based on the charge. The VCO provides an output signal based on the voltage received from the loop filter. The divider divides a frequency of the output signal by a value to provide the feedback signal. The frequency change module processes an input signal having a first frequency to provide a processed signal having a second frequency that is different from the first frequency. The frequency change module selects the input signal or the processed signal to provide as the reference signal to the detector. Changing the frequency of the reference signal can change a frequency of a spur.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: November 25, 2014
    Assignee: Broadcom Corporation
    Inventor: Hung-Ming Chien
  • Patent number: 8896385
    Abstract: Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: November 25, 2014
    Assignee: Sand 9, Inc.
    Inventors: Klaus Juergen Schoepf, Reimund Rebel, Jan H. Kuypers
  • Patent number: 8854091
    Abstract: Circuitry capable of performing fractional clock multiplication by using an injection-locked oscillator is described. Some embodiments described herein perform fractional clock multiplication by periodically changing the injection location, from a set of injection locations, where the injection signal is injected and/or by periodically changing a phase, from a set of phases, of the injection signal that is injected into the ILO.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: October 7, 2014
    Assignee: Rambus Inc.
    Inventors: Masum Hossain, Farshid Aryanfar, Mohammad Hekmat, Reza Navid
  • Publication number: 20140292419
    Abstract: An oscillator circuit includes first and second oscillators arranged in a series configuration between a supply voltage node and a reference voltage node. The first and second oscillators are configured to receive a synchronizing signal for controlling synchronization in frequency and phase. An electromagnetic network provided to couple the first and the second oscillators includes a transformer with a primary circuit and a secondary circuit. The primary circuit includes a first portion coupled to the first oscillator and second portion coupled to the second oscillator. The first and second portions are connected by a circuit element for reuse of current between the first and second oscillators. The oscillator circuit is fabricated as an integrated circuit device wherein the electromagnetic network is formed in metallization layers of the device. The secondary circuit generates an output power combining power provided from the first and second portions of the primary circuit.
    Type: Application
    Filed: March 17, 2014
    Publication date: October 2, 2014
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Egidio Ragonese, Vincenzo Fiore, Nunzio Spina, Giuseppe Palmisano
  • Publication number: 20140266473
    Abstract: A method is described for detecting a correlation between at least two ring oscillators and to a system for carrying out the method. In the method a memory field is used in which combinations of concatenations are each assigned a bit.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: ROBERT BOSCH GMBH
    Inventors: Matthew LEWIS, Eberhard BOEHL
  • Patent number: 8810322
    Abstract: A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: August 19, 2014
    Assignee: Qualcomm Incorporated
    Inventors: Rajagopalan Rangarajan, Chinmaya Mishra, Maulin Bhagat, Zhang Jin
  • Publication number: 20140225639
    Abstract: One feature pertains to an integrated circuit (IC) that includes a first plurality of ring oscillators configured to implement, in part, a physically unclonable function (PUF). The IC further includes a second plurality of ring oscillators configured to implement, in part, an age sensor circuit, and also a ring oscillator selection circuit that is coupled to the first plurality of ring oscillators and the second plurality of ring oscillators. The ring oscillator selection circuit is adapted to select at least two ring oscillator outputs from at least one of the first plurality of ring oscillators and/or the second plurality of ring oscillators. Notably, the ring oscillator selection circuit is commonly shared by the PUF and the age sensor circuit. Also, the IC may further include an output function circuit adapted to receive and compare the two ring oscillator outputs and generate an output signal.
    Type: Application
    Filed: February 11, 2013
    Publication date: August 14, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Xu GUO, Brian M. Rosenberg
  • Patent number: 8797105
    Abstract: The present disclosure provides a tunable signal source having a plurality of oscillator cores having a coupling input, a coupling output, and a power output that is common to each of the plurality of oscillator cores. Also included is a plurality of tunable phase shifters wherein corresponding ones of the plurality of tunable phase shifters are communicatively coupled between the coupling input and the coupling output of corresponding ones of the plurality of oscillator cores, thereby forming a loop of alternating ones of the plurality of oscillator cores and alternating ones of the plurality of tunable phase shifters.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: August 5, 2014
    Assignee: Cornell University
    Inventors: Ehsan Afshari, Yahya M. Tousi
  • Patent number: 8797108
    Abstract: A voltage control oscillator includes: first and second field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; third and fourth field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; a first inductor connected between the drain of the first field effect transistor and the drain of the second field effect transistor; a second inductor connected between the drain of the third field effect transistor and the drain of the fourth field effect transistor; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; a first capacitor; and a second capacitor.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: August 5, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Hirashiki, Shinichiro Ishizuka, Nobuyuki Itoh
  • Patent number: 8791762
    Abstract: Frequency synthesizers for use with oscillators that generate an arbitrary frequency are described, as well as related devices and methods. Divider information can be generated or otherwise accessed for use in configuring a phase lock loop device that is adapted for coupling with the oscillator, where the phase lock loop device can include a plurality of integer dividers without utilizing a fractional divider, where the divider information can include frequency deviations corresponding to groups of integer divider settings for the phase lock loop device, and where each deviation of the frequency deviations can be based on a frequency differential between a standard operating frequency and an output frequency for the phase lock loop utilizing one group of integer divider settings from the groups of integer divider settings.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: July 29, 2014
    Assignee: Sand 9, Inc.
    Inventors: Reimund Rebel, Klaus Juergen Schoepf
  • Patent number: 8779862
    Abstract: An oscillator having a plurality of operatively coupled ring oscillators arranged in hyper-matrix architecture. The operatively coupled ring oscillators are either identical or non-identical and are coupled through a common inverter or tail current transistors. Due to the arrangement of the ring oscillators in a hyper-matrix structure, the ring oscillators are synchronized and resist any variation in frequency or phase thereby maintaining a consistent phase noise performance.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: July 15, 2014
    Assignee: STMicroelectronics International N.V.
    Inventor: Prashant Dubey
  • Publication number: 20140191813
    Abstract: A random number generator and method for testing the same are described. In one embodiment, the random number generator comprises one or more ring oscillator structures, each of the one or more ring oscillator structures having a ring oscillator for use in generating random numbers and having a test structure to reconfigure the ring oscillator into a testable structure.
    Type: Application
    Filed: February 28, 2014
    Publication date: July 10, 2014
    Applicant: Silicon Image, Inc.
    Inventors: Chinsong Sul, Hyukyong Kwon, Andy Ng
  • Patent number: 8766730
    Abstract: A frequency tunable signal source (100) with first (105) and a second (115, 315) oscillators, each of which outputs a signal at a fundamental frequency (f1, f2) and at least one signal at a harmonic frequency (f1?, f2?) and a mixer (120) with first (121) and second (122) input ports and an output port (124), and a control unit (110) which controls switches (S1, S2, S3, S4), by means of which two of said signals (f1, f2, f1?, f2?) are switchably connected to the first input port. The other two signals are switchably to the other input port, with one switch (S1, S2, S3, S4) for each signal (f1, f2, f1?, f2?). There is also comprised a third oscillator (125), with an output signal connected to a third input port (123) of the mixer (120). At least one of the oscillators (105, 115, 315, 125) is a VCO, a Voltage Controlled Oscillator.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: July 1, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Mingquan Bao, Herbert Zirath
  • Patent number: 8749313
    Abstract: An electronic device has two oscillators, for example a first highly accurate crystal oscillator and a second less accurate low power oscillator. In a normal mode of operation, time is counted based on an output from the crystal oscillator, but in a low power mode of operation, time is counted based on an output from the less accurate oscillator. During the low power mode of operation, a calibration process is performed repeatedly. During a first calibration time period the second oscillator is calibrated against the first oscillator to obtain a first calibration result, and a recalibration is performed during a second calibration time period to obtain a second calibration result. A correction factor is determined from the first and second calibration results, and the correction factor is applied when subsequently counting time based on the output from the second oscillator.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: June 10, 2014
    Assignee: ST-Ericsson SA
    Inventor: Andrew Ellis
  • Patent number: 8744073
    Abstract: A system for random number generation includes a digital oscillator circuit, which has a set of available configurations and is operative to generate a random number sequence in accordance with a current configuration selected from the set. The system further includes a randomization circuit, which is operative to produce a pseudo-random stream of values corresponding to the available configurations of the digital oscillator circuit, and to control the digital oscillator circuit to alternate among the available configurations in accordance with the pseudo-random stream of values.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: June 3, 2014
    Assignee: SanDisk IL Ltd.
    Inventors: Itai Dror, Leonid Minz, Boris Dolgunov, Michael Koun
  • Patent number: 8704603
    Abstract: A tunable Injection-Locked Oscillator (ILO) having a wide locking range is used in a Local Oscillator (LO) of a wideband wireless transceiver to generate differential signals. The ILO includes a resonator with an adjustable natural oscillating frequency. In one example, the ILO is part of a quadrature divider that can lock onto a Phase-Locked Loop (PLL) output signal in a wide frequency band while achieving lower power consumption and lower phase noise than a differential latch type divider. The ILO is tuned by disabling a Voltage-Controlled Oscillator (VCO) from driving the ILO, adjusting the natural oscillating frequency, making a measurement indicative of the natural oscillating frequency, and determining whether the measurement is within a predetermined range. If the measurement is below the predetermined range, capacitances of resonators within the ILO are decreased, whereas if the measurement is above the predetermined range, capacitances of the resonators are increased.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: April 22, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Jeongsik Yang
  • Patent number: 8698565
    Abstract: A method and apparatus is disclosed for voltage-controlled oscillator selection in a multi-mode system having multiple voltage-controlled oscillators. Part of oscillator selection is a calibration operation that utilizes maximum and minimum capacitance limits for a voltage-controlled oscillator, which translates to a frequency range, to calculate overlap regions. Overlap regions comprise frequency ranges that overlap such that the overlap region may be generated by two voltage-controlled oscillators with adjacent frequency ranges. One voltage-controlled oscillator selection routine comprises a real time voltage-controlled oscillator calibration and selection routine that executes every time the system requests a new frequency. Another selection routine comprises a start-up routine that executes only at power up or periodically.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: April 15, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Thomas Obkircher, Bipul Agarwal, Georgi Taskov
  • Patent number: 8692626
    Abstract: An oscillation device for reducing memory capacity includes a frequency difference detecting unit and a compensation value obtaining unit. When oscillation frequencies of the first and second oscillation circuits are respectively f1 and f2, and oscillation frequencies of the first and second oscillation circuits at a reference temperature are respectively f1r and f2r, the frequency difference detecting unit determines a difference corresponding value x corresponding to a difference value between a value corresponding to a difference between f1 and f1r, and a value corresponding to a difference between f2 and f2r. The compensation value obtaining unit obtains a frequency compensation value of f1 resulting from ambient temperature different from reference temperature based on the difference corresponding value x, and calculates the frequency compensation value of f1 by calculating nth-order polynomial for X being a value corresponding to x/k, where k is a divide coefficient specific to a device.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: April 8, 2014
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Kaoru Kobayashi
  • Patent number: 8686804
    Abstract: An orthogonally referenced integrated ensemble for navigation and timing includes a dual-polyhedral oscillator array, including an outer sensing array of oscillators and an inner clock array of oscillators situated inside the outer sensing array. The outer sensing array includes a first pair of sensing oscillators situated along a first axis of the outer sensing array, a second pair of sensing oscillators situated along a second axis of the outer sensing array, and a third pair of sensing oscillators situated along a third axis of the outer sensing array. The inner clock array of oscillators includes a first pair of clock oscillators situated along a first axis of the inner clock array, a second pair of clock oscillators situated along a second axis of the inner clock array, and a third pair of clock oscillators situated along a third axis of the inner clock array.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: April 1, 2014
    Assignee: UT-Battelle, LLC
    Inventors: Stephen Fulton Smith, James Anthony Moore
  • Patent number: 8670736
    Abstract: A circuit includes, in part, a receiver, a received signal strength indicator (RSSI), and an oscillator. The receiver receives an incoming signal and an oscillating signal. The RSSI is responsive to the receiver and generates an output signal representative of the strength of the incoming signal. The oscillator receives different biasing conditions in response to different outputs of the RSSI. The oscillator generates the oscillating signal received by the receiver. The oscillator receives a first biasing condition when the incoming signal is detected as having a strength lower than or equal to a predetermined threshold value and a second biasing condition when the incoming signal is detected as having a strength higher than the predetermined threshold value. The first biasing condition may be defined by a first current, and the second biasing condition may be defined by a sum of the first current and a second current.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: March 11, 2014
    Assignee: MaxLinear, Inc.
    Inventor: Sheng Ye
  • Publication number: 20140062606
    Abstract: A method and apparatus is disclosed herein for testing of multiple ring oscillators. In one embodiment, the apparatus comprises at least one ring oscillator structure having a ring oscillator having an inverter chain with an odd number of inverters connected back-to-back and operable to produce an oscillatory output, and a test structure coupled to provide either an observability chain input or a test input to the ring oscillator and to receive the oscillatory output as a feedback from the ring oscillator.
    Type: Application
    Filed: September 6, 2012
    Publication date: March 6, 2014
    Inventors: Chinsong Sul, Hyukyong Kwon, Andy Ng
  • Patent number: 8659364
    Abstract: A value corresponding to a difference value between a value corresponding to a difference between f1 and f1r and a value corresponding to a difference between f2 and f2r is treated as an instantaneous temperature, where f1 and f2 denote oscillation outputs of the first and second oscillation circuits, respectively, and f1r and f2r denote oscillation frequencies of the first and second oscillation circuits, respectively, at a reference temperature. A first correction value is obtained using an approximation formula of the frequency correction value of f1 based on the value corresponding to the difference value, and a second correction value for canceling a correction residual error is obtained from the correction residual error which is a difference between the first correction value and the frequency correction value actually measured. The frequency correction value is obtained from a sum of the first and second correction values.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: February 25, 2014
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Kaoru Kobayashi
  • Patent number: 8659472
    Abstract: An apparatus includes a stable local oscillator, which includes a first control loop. The first control loop includes a first voltage-controlled oscillator configured to generate a first output signal and a first phase-locked loop. The apparatus also includes a frequency up-converter configured to increase a frequency of the first output signal. The apparatus further includes a second control loop configured to receive the up-converted first output signal. The second control loop includes a second voltage-controlled oscillator configured to generate a second output signal and a second phase-locked loop. The second control loop may further include a mixer having a first input coupled to the frequency up-converter, a second input coupled to the second voltage-controlled oscillator, and an output coupled to the second phase-locked loop. A reference frequency source may be configured to generate a signal identifying a reference frequency and to provide that signal to the phase-locked loops.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: February 25, 2014
    Assignee: Enraf B.V.
    Inventors: Bin Sai, Ronald C. Sehrier