Abstract: A power supply connected to an ultrasonic treatment instrument. The power supply includes an oscillator, a field programmable gate array (FPGA), and a drive circuit. The oscillator generates a basic clock. The FPGA receives the basic clock generated by the oscillator. The FPGA generates a pulse width modulation (PWM) wave for driving a ultrasonic transducer based on the basic clock. The drive circuit is connected to the FPGA, and digitally amplifies the PWM wave to output the amplified PWM wave. The FPGA outputs the PWM wave when an output signal for driving the ultrasonic treatment instrument is input, and the PWM wave is modulated by comparing a value of first data representing a sine wave in constant current control with a value of second data representing a reference wave. The FPGA outputs a rectangular wave with a predetermined duty ratio when the output signal is not input.

Abstract: A self-setting power supply monitors a supply current drawn by a power amplifier and sets a supply voltage based on the supply current to achieve efficient power operation. In order to maintain operation of the power amplifier above minimum operating conditions, the self-setting power supply sets the supply voltage to the minimum operating voltage when the supply current drops below a threshold bias current. When the supply current is above the threshold bias current, the self-setting power supply adjusts the supply voltage approximately proportionally to the supply current to maintain approximately constant gain of the power amplifier.

Abstract: Techniques for decimating a first periodic signal to generate a second periodic signal. In an exemplary embodiment, the first periodic signal is divided by a configurable integer ratio divider, and the output of the divider is delayed by a configurable fractional delay. The configurable fractional delay may be noise-shaped using, e.g., sigma-delta modulation techniques to spread the quantization noise of the fractional delay over a wide bandwidth. In an exemplary embodiment, the first and second periodic signals may be used to generate the transmit (TX) and receive (RX) local oscillator (LO) signals for a communications transceiver from a single phase-locked loop (PLL) output.

Abstract: A crystal oscillator that outputs an oscillation output signal of an oscillator circuit oscillated by a crystal resonator as a resonation source via a buffer circuit, includes: a plurality of waveform output circuits provided in the buffer circuit, each converting, when inputted, the oscillation output signal into a different waveform and outputting the converted signal; a circuit selection switch that selects any one of the plurality of waveform output circuits as a waveform output circuit of the buffer circuit; and a memory circuit that stores data used by the circuit selection switch to select any one of the waveform output circuits.

Abstract: The present invention relates to a multiple output crystal oscillator having a plurality of output terminals for implementing multiple output and Integrated Circuit (IC) chips. More particularly, the crystal oscillator comprises a crystal resonator, a first IC chip having an oscillating circuit block and a frequency-adjusting circuit block, a second IC chip having an output-adjusting block, and a substrate structure for mounting said first and second IC chips, wherein said output terminals include a basic output terminal for outputting the oscillating signal from said first IC chip and at least one additional output terminal for outputting at least one wave form-adjusted oscillation signal from said second IC chip. In the present invention, said basic output terminal is placed on one of four underside corners of said substrate, and said additional output terminal is placed on the portion of the underside except the corners.

Abstract: An apparatus according to a preferred embodiment of the present invention includes two memories each storing different octants of a sine (or cosine) waveform. The sine and cosine waveforms may be concurrently generated by alternately accessing each memory in succession. It is unnecessary to access one memory concurrently, so that both waveforms may be concurrently generated without requiring either two accesses to the same memory or a doubled memory size.

Abstract: An oscillator for generating a varying amplitude feed forward power factor correction (PFC) modulation ramp signal includes a clock generating circuit and a ramp generating circuit. The PFC ramp signal generated by the ramp generating circuit is used within a power factor correction circuit of a switching mode power converter. The timing capacitor used within the ramp generating circuit is charged from the full wave rectified line input voltage so that the amplitude of the generated ramp output signal will follow the full wave rectified input signal, thereby maintaining the current loop bandwidth at a constant value and improving the transient response of the circuit. A one-shot circuit is coupled between the discharge transistor of the clock generating circuit and the discharge transistor of the ramp generating circuit for synchronizing the clock and ramp reference signals generated by the oscillator so that the frequency of the ramp reference signal is equal to the frequency of the clock signal.

Abstract: A crystal oscillator circuit wherein first and second transistors are connected to form a differential pair. The second transistor functions as an inverting gain stage for the oscillator and two capacitors are provided to complete a feedback path in series with a crystal which essentially functions as an inductor. The capacitors are large enough to minimize the effect of device parasitics and small enough for monolithic implementation. The square-wave output from the circuit is completely isolated from the oscillator gain stage, thus subsequent logic gates will not have any effect on the oscillator performance and DC-coupling can be used without a need for AC-coupling capacitors. The circuit is completely monolithic, requiring only an external crystal. The circuit inherently suppresses the fundamental frequency without a need for a tank circuit or a feedback resistor and does not influence the biasing.

Abstract: A phase-controllable oscillator consists of a capacitance and an apparatus for charging and an apparatus for discharging the capacitance. In addition, feedback is provided for activating the charging and discharging apparatus in dependence on the oscillator signal. An amplifier for amplifying the capacitance voltage can be phase-controlled by providing the amplifier with a control input for adjusting the phase difference between a zero-crossing of an amplifier output signal on the one hand and a reference phase in the oscillator signal on the other hand. In order to maintain the duty cycle, a switching apparatus is provided for reversing the polarity of the control input under the control of the oscillator signal.

Abstract: An integrated circuit includes provision for connecting to a discrete capacitor, a charger current-mirror circuit for charging the capacitor and a discharger current-mirror circuit for discharging the capacitor. A constant current source is alternately switched to the input branches, respectively, of the charger and discharger circuits. The discharger circuit is made up of an output transistor and an input diode, the latter being connected into the circuit by means of an external link that may be in place to generate a triangle waveform or removed to generate a sawtooth waveform.

Abstract: A circuit arrangement for feeding a sinusoidal signal current to a wide range of loads, such as ringing current transmitted over subscriber lines from a telephone exchange, comprises a modulator which converts a rectified sine wave into a sequence of unipolar constant-amplitude pulses of varying width controlling, through a logic network, the energization of a load impedance via a resonant circuit from a d-c source. A switchover unit, including a transistor bridge having a diagonal connected across the d-c source, receives command signals from the logic network in response to the control pulses and to the outputs of two sensors determining the instant polarities of the load voltage and the load current in the output of the resonant circuit. The switchover unit produces a train of bipolar driving pulses, of constant amplitude and synchronized with the control pulses, whose polarity changes with alternate half-cycles of the sine wave fed in rectified form to the modulator.

Abstract: A circuit for synchronizing a microwave oscillator with a reference source of known frequency. The synchronizing circuit includes a phase-lock loop which compares the output of a free-running, crystal-controlled, voltage-controlled oscillator with the output of a burst oscillator. The output of the burst oscillator has a comb spectrum comprising harmonics of the reference frequency and the phase-lock loop locks onto a selected one of the comb harmonics.

Abstract: A precision test frequency generator capable of selectively providing a sinusoidal output wave within a frequency range simulating the output of a flowmeter yielding a sinusoidal signal whose frequency is proportional to flow rate, the signal having a noise component superimposed thereon. The generator is constituted by a stable high-frequency standard coupled to a selectable output counter providing intermediate-frequency pulses whose repetition rate is a sub-multiple of the high-frequency standard and a predetermined multiple of the desired output frequency of the generator. The pulses are converted into a triangular wave whose frequency corresponds to the desired output frequency, the triangular wave having a staircase formation whose number of steps is determined by the multiple. The triangular wave is converted into a sinusoidal wave of the same frequency with a staircase modulation component simulating the flowmeter output signal.

Abstract: A precision crystal-controlled oscillator circuit with provision for separate sinusoidal and square-wave output signals which can be realized as a silicon integrated circuit without the use of external capacitors or resistors is disclosed. Two feedback loops are utilized in addition to the oscillating loop. The first feedback loop maintains the gain of the oscillation loop at substantially unity when the amplitude of the oscillation is at a predetermined level, thereby ensuring both spectral purity and amplitude stability of the sinusoidal output signal. The second feedback loop maintains the duty cycle of the square-wave output signal substantially equal to 50 percent by controlling the circuit operation to equally space the signal zero crossings at the input of the square-wave output stage.