Abstract: An LC oscillator powering arrangement comprises an LC oscillator configured to provide an oscillating signal output; a current source configured to supply the LC oscillator with a supply current, the current source during operation being controlled by a control voltage and supplied with a supply voltage subject to supply voltage ripple; and a replication block configured to generate an amplified replica of the supply voltage ripple directly from the supply voltage and to overlay the replica on the control voltage.

Abstract: A haptic electromagnetic actuator for track pad is provided. The actuator includes an array of electromagnets with alternating South and North poles on a first end, each magnet comprising a metal core and an electrical wire around the metal core. The array of magnets is coupled to a base plate on a second end opposite to the first end. The actuator also includes an attraction plate at a distance from the first end of the array of the magnets such that the attraction plate moves toward the magnets when an electrical current flows through the electrical wire around the metal core and moves away from the magnets when the current becomes zero. The array of magnets is configured to form a uniform gap from the attraction plate.

Abstract: Methods and apparatus for a circuit including a DC-DC converter including: a boost converter to provide a DC voltage output from a DC input voltage, the DC output voltage configured to connect with a first load terminal, a feedback module configured to connect with a second load terminal, a switching module having a switching element coupled to the boost converter, and a control circuit coupled to the switching module to control operation of the switching element, the control circuit coupled to the feedback module, wherein the control circuit includes a slope generator to generate a ramp signal having a slope that can vary cycle to cycle.

Abstract: Provided are a percussion instrument tuning system and method. A position sensor determines at least one first position of a tuning mechanism of a timpano. A control unit generates a calibration result by measuring a first pitch of the timpano corresponding to the at least one first position of the tuning mechanism and estimates a second pitch of the timpano corresponding to at least one second position of the tuning mechanism from the calibration result.

Abstract: Disclosed is a logarithmic detector comprising: an amplifier element; means for setting a frequency of operation of the detector; and a controller, wherein an input signal to the amplifier element is arranged to cause an oscillation in the amplifier element, and the controller is operable to sense a pre-determined threshold, indicative of oscillation and, in response to sensing said threshold, to interrupt the oscillation of the amplifier such that the frequency of said interruption is proportional to the logarithm of the power of the input signal.

Abstract: A device includes a plurality of channel-capture circuits. Each circuit may include an array of N non-linear oscillators, wherein N?3, circularly connected to each other in series such that unidirectional signal flow occurs between the oscillators. Each circuit may be configured to capture a respective channel signal from a wideband signal containing a plurality of channel signals and convert its captured channel signal to a lower frequency. Each oscillator may include an oscillator input configured to receive an output signal from another oscillator, an oscillator output configured to provide an output for an input of another oscillator, a frequency capture input configured to receive at least a portion of the wideband signal, at least two amplifiers, and a control capacitor coupled to the output of the amplifiers. An analog-to-digital converter may be coupled to the output of each channel-capture circuit.

Abstract: A circuit for voltage limitation is provided in a transponder with a resonant circuit, which comprises at least one inductor, a capacitor, a depletion layer component with an input, output, and a control input, a first resonant circuit terminal, which is connected to the input of the depletion layer element, and a second resonant circuit terminal, which is connected to the output of the depletion layer element, whereby there is a connection between the control input of the depletion layer component and the first resonant circuit terminal and the second resonant circuit terminal. A method for voltage limitation in a transponder is provided, whereby for voltage limitation in the transmitting and receiving resonant circuit, the control terminal of the depletion layer element is driven by the voltage of the first and second resonant circuit terminal.

Abstract: A voltage controlled oscillator (VCO) is provided that includes an output buffer having a first buffer stage including a first transistor and a second buffer stage including a second transistor. The first and second transistors are connected in a cascaded emitter follower buffer arrangement.

Abstract: The present invention concerns a differential oscillator device, comprising resonant electronic means, capable to provide on at least two terminals at least one oscillating signal VOUT, which comprises a generator electronic means capable to supply at least one power supply pulsed signal to said resonant electronic means in phase relation with said at least one oscillating signal VOUT. The present invention further concerns a process of supplying pulsed power to such a differential oscillator device.

Abstract: Oscillatory signal output circuitry includes a bias circuit generating a bias voltage, which is applied to an amplifier and an oscillatory circuit to generate an oscillatory signal. The oscillatory signal is capacitively coupled and level-shifted up by the bias voltage to produce output signals. The produced output signals are operatively applied to PMOS and NMOS transistors of an output part. When the voltages of the output signals decrease at the same time, the drain current of the NMOS transistor decreases to output a high level. When the voltages of the output signals increase at the same time, the drain current of the NMOS transistor increases to output a low level. Therefore, the output part attains its large gain, and is ensured to operate to develop the output signal. A variation in threshold voltage would cause the bias voltages to change accordingly, thus being ensured to output the output signal.

Abstract: A crystal oscillator that outputs an oscillation output signal of an oscillator circuit oscillated by a crystal resonator as a resonation source via a buffer circuit, includes: a plurality of waveform output circuits provided in the buffer circuit, each converting, when inputted, the oscillation output signal into a different waveform and outputting the converted signal; a circuit selection switch that selects any one of the plurality of waveform output circuits as a waveform output circuit of the buffer circuit; and a memory circuit that stores data used by the circuit selection switch to select any one of the waveform output circuits.

Abstract: A circuit controls the pulse width of an output signal from a voltage controlled oscillator. The voltage controlled oscillator includes a ring oscillator comprising a plurality of series-connected inverters. In one embodiment a selector selects at least one output signal from an inverter in the plurality of series-connected inverters. An output circuit receives the selected output signal and a reference signal to provide a final output signal having a time duration proportional to the number of inverters between the inverters providing the reference signal and the output signal to the selection circuit.

Abstract: A clock generator includes an active oscillator portion that generates an oscillating signal having a frequency determined by a resonator, such as a crystal or other type of resonator. A filter or delay module filters or delays the oscillating signal to generate a second oscillating signal that has a DC component that matches that of the original oscillating signal. A comparator then compares the original oscillating signal with the filtered or delayed oscillating signal to determine the amplitude cross points. In other words, the comparator determines where the amplitude of the original oscillating signal crosses that of the filtered or delayed oscillating signal, and generates a square wave pulse at the amplitude cross points. Since both compared signals have a common DC component then the amplitude cross points will be equally separated in time, which produces an output oscillating signal with a 50% duty cycle.

Abstract: An oscillator includes a resonant circuit generating a resonant signal, a drive circuit that feeds back the resonant signal to the resonant circuit, and an output terminal connected to a given node of the resonant circuit, an oscillation signal of the oscillator being output via the output terminal.

Abstract: An oscillator system is disclosed and includes an oscillator circuit having a differential output producing a differential output signal thereat having a frequency that is a function of an input voltage. The oscillator system further includes an output buffer coupled to the differential output of the oscillator circuit. The output buffer includes an inductive voltage divider circuit configured to weaken a loading at the oscillator differential output and it increases the output power.

Abstract: Method and related apparatus for realizing frequency-multiplication by generating a high frequency signal according to a plurality of low frequency signals. The method includes: according to a plurality output signals generated by a phase-locked loop (PLL) or a delay-locked loop (DLL), generating a plurality of reference signals with a same frequency and different phases; when a number of the reference signals with signal level high is greater than a number of the reference signals with signal level low, making a signal level of the output signal remains a first level; otherwise, making the signal level of the output signal remains a second level substantially different from the first level. Thus the frequency of the output signals is a multiplication of the frequency of the input signals.

Abstract: A folded starved inverter differential output apparatus for use in a voltage controlled oscillator includes a first polarity of two transistors that are cross-coupled and a second polarity of four transistors. Also included are two inverter gates and a supply regulator.

Abstract: A system for generating in-phase and quadrature phase signals is provided. The system includes a first and a second differential output, such as from a sinusoidal oscillator. A first injection-locked frequency divider, such as one that uses an LC oscillator in conjunction with cross-coupled transistors, receives the first differential output and generates a in-phase or in-phase output. A second injection-locked frequency divider receives the second differential output and generates a quadrature phase output.

Abstract: An improved single-ended input differential pair amplifier stage comprises: 1) a first p-n-p transistor having a base terminal coupled to an input voltage; 2) a first load impedance having a first terminal coupled to a ground reference and a second terminal coupled to a collector of the first p-n-p transistor; 3) a second p-n-p transistor having a base terminal coupled to the ground reference; 4) a second load impedance having a first terminal coupled to a ground reference and a second terminal coupled to a collector of the second p-n-p transistor; 5) an inductor having a first terminal coupled to an emitter of the first p-n-p transistor and a second terminal coupled to an emitter of the second p-n-p transistor; and 6) a constant current source coupled to the emitter of the second p-n-p transistor.

Abstract: A circuit, system, and method are provided for regulating the mark-to-space ratio of a clocking signal. In instances where the mark-to-space ratio is targeted at 1:1 (i.e., a 50% duty cycle), then a regulated signal is formed which will produce a 50% duty cycle whenever that regulated signal is forwarded to a buffer which will produce a duty cycle other than 50% if the input signal were not regulated. The regulated signal is derived from a feedback circuit which will take into account the periodic nature of the clocking signal and whatever threshold skews might be attributable to the clock buffer. The feedback signal derives its input from a tap connected to receive the clocking signal from an output of the buffer, and the tap forwards that clocking signal to switching transistors which impute the periodic clocking frequency onto a threshold skewed output which will then form the regulated signal. Any skew resulting from the oscillator will not be passed to the node which bears the regulated signal.

Abstract: A crystal oscillation circuit using a crystal oscillator comprises an inverting amplifier, a buffer, and a voltage shift circuit. The voltage shift circuit operates in such a way that within prescribed limits by which the output of the inverting amplifier satisfies excitation conditions of the crystal oscillator and by which the oscillation output of the buffer satisfies input conditions of a following circuit, a supply voltage (Vdd) is reduced by a gate threshold voltage of an n-channel MOS transistor, and a ground potential (GND) is increased by a gate threshold voltage of a p-channel MOS transistor with respect to both the inverting amplifier and the buffer. Thus, it is possible to prevent the crystal oscillator from being damaged while suppressing the excitation level of the crystal oscillator even though the gain of the inverting amplifier is increased to be relatively high.

Abstract: A periodic signal generation circuit includes a differential crystal oscillator suitable for integration on a semiconductor substrate. The oscillator utilizes an external crystal as a resonator. The circuit is designed such that differential sinusoidal signals are present on the resonator leads to provide superior noise rejection of interfering signals. Differential signal transmission is maintained throughout the oscillator to reject noise generated by other circuitry that may be present on the substrate. Noise radiated out from the oscillator through the power supply, substrate, bond wires and pads is reduced due to the generation of differential signals of controlled sinusoidal amplitude and low harmonic content. The oscillator produces low phase noise so that the oscillator may be used in applications, such as TV receivers, that are sensitive to distortion. The circuit is a square wave that has low jitter, thus reducing jitter produced in digital circuits that would utilize this square wave clock signal.

Abstract: A duty cycle correction circuit is provided for converting a pair of differential analog signals from an oscillator into an output pulse signal with 50% of duty cycle. The pulse signal has the same frequency as that of each of the differential analog signals. The duty cycle correction circuit includes a first differential-to-single-ended buffer circuit, a second differential-to-single-ended buffer circuit, a first frequency divider, a second frequency divider and a symmetrical exclusive OR element. The first and the second differential-to-single-ended buffer circuits are used for processing the pair of differential analog signals into a first and a second digital pulse signals, respectively. The first and the second frequency dividers are employed for frequency-dividing the first and the digital pulse signal into a third and a fourth digital pulse signal, respectively. The symmetrical exclusive OR element is used for performing an exclusive OR operation so as to produce the output pulse signal.

Abstract: An oscillator circuit adapted for a piezoelectric oscillator which has a weak oscillation output for generating high frequencies is provided. The speed of operation of the oscillator circuit is increased. An integrated circuit for such an oscillator circuit is also provided. The oscillator circuit has an amplifier portion consisting of CMOS inverters connected in cascade. MOS transistors forming the CMOS inverters have channel widths that decrease successively from the first stage to the last stage to improve the amplification factor of the amplifier portion at high frequencies. This makes it possible to amplify weak oscillation output from the quartz oscillator (XL). A filter circuit produces a peak of negative resistance at a frequency higher than conventional. This permit oscillation operation at higher frequencies.

Abstract: A voltage-controlled oscillator circuit includes a ring oscillator circuit for generating a signal having a series of pulses. The signal with the series of pulses is ac coupled to a filter circuit which converts the series of pulses into a substantially sinusoidal signal which is substantially symmetrical about the reference potential of the system. The sinusoidal signal is applied to an amplifier which converts the sinusoidal signal into a square wave. Because the square wave is generated as an amplified sine wave, it exhibits a high degree of symmetry, i.e., it has a highly accurate 50-50 duty cycle, which makes it applicable in demanding settings such as serving as a clock signal in a high-speed microprocessor system in which both rising and falling edges of the clock signal are used to synchronize events.

Abstract: An oscillator includes an oscillation circuit unit and an amplification circuit unit of the common-base type. The oscillation circuit unit includes an oscillation transistor and a resonance circuit, the collector of the oscillation transistor being grounded via a first capacitor. The amplification circuit unit includes an amplification transistor, the emitter thereof being directly connected to the collector of the oscillation transistor and the base thereof being grounded via a second capacitor. The resonance circuit is connected between the base of the oscillation transistor and the ground. An oscillation signal output from the collector of the oscillation transistor is input to the emitter of the amplification transistor while partially being bypassed to the ground via the first capacitor. Negative feedback is provided to the amplification transistor in association with the second capacitor.

Abstract: A voltage-controlled oscillator comprises a level converting circuit, an amplitude controller, a voltage-controlled oscillation section having differential delay cells connected in a ring form, and an output level converting circuit. The level converting circuit has limiters which respectively limit a maximum value and a minimum value of a control current. Those limiters permit only a region where the voltage-controlled oscillation section properly performs its oscillating operation to be used.

Abstract: The present invention relates to oscillator circuits for providing periodic signals. The oscillator circuit includes a crystal element having a high Q value and good stability. A high-gain amplifier is used with the crystal element to produce an oscillating signal. The oscillator is further configured to include an input protection circuit for reducing the effects of undesirably high input voltage levels, and a coupling capacitor to reduce leakage between the amplifier and the input protection circuit. A high output signal level is provided to a Schmidtt trigger amplifier through configuring the output to be taken from the input of the high-gain amplifier.

Abstract: An oscillator includes an oscillating circuit and a resonating circuit connected to the oscillating circuit, and an amplifying circuit for amplifying signals output from the oscillating circuit. The oscillator also includes an added circuit having an isolator, frequency filter, or other suitable elements, disposed between the output portion of the oscillating circuit and the input portion of the amplifying circuit, so as to prevent transmission of unwanted waves, such as the higher harmonic component of the basic wave, and other such undesirable waves. The oscillator, and a communication apparatus including such oscillator, eliminates deterioration of phase noise properties caused by generation of unwanted wave components such as higher harmonics.

Abstract: An amplification circuit includes an inverter whose input node is connected to an output node of an oscillation circuit and a resistance element connected in parallel with the inverter. A filter circuit is connected to an input node of the amplification circuit, and both a level-shift circuit and a Schmitt circuit are connected to a stage subsequent to the filter circuit. The filter circuit, level-shift circuit and Schmitt circuit eliminate noise from an oscillation signal. The Schmitt circuit wave-shapes the oscillation signal and outputs the wave-shaped signal as a clock.

Abstract: A programmable precise frequency divider cooperating with a low frequency crystal and an oscillating circuit is disclosed. The divider includes a low frequency oscillating circuit, a preset code memory, a programmable preset code loader, an adder, and a register. The programmable preset code loader loads and latches a preset code either from the preset code memory or a preset code input line coupled to an external data source. The latched preset code and the current value of the register are commonly supplied to the adder. The adder is used to sum up the latched preset code from the programmable preset code loader and the current value from the register and thereby supply a resultant value to the register. The register accumulates the resultant value from the adder to the oscillating signal from the oscillating circuit and then supplies a output clock signal with a required divided frequency.

Abstract: A stabilized oscillator circuit is provided with a differential amplifier type oscillator circuit for generating an oscillation signal, and a differential amplifier type buffer output circuit for amplifying and outputting the oscillation signal. The stabilized oscillator is also provided with a frequency variation stabilizing circuit. This circuit controls the amount of current of the constant current source I2 of the buffer output circuit, in accordance with fluctuations of the power supply voltage applied to the oscillator circuit. Accordingly, the collector-base capacitance of the transistors of the buffer output circuit is controlled, and the oscillation frequency variations are suppressed in spite of fluctuations of the power supply voltage.

Abstract: An oscillator circuit having a first node oscillating with a first indeterminate duty cycle and having a second node oscillating with a predetermined second duty cycle. Both nodes oscillate at similar frequencies. A variable current source and a switch are coupled in series between Vcc and ground with the output of the variable current source being the second node. The first node controls the switch, which is closed when the first node is at a first logic state and is opened when it is at a second logic state. During each cycle, a monitoring circuit measures the time span that the first node is at the first logic state and adjusts the magnitude of the variable current source to make it directly proportional to the measured time span. By adjusting the variable current source, the second node can be made to reach a desired voltage level in a desired amount of time during each cycle. In a second embodiment, a current limiting transistor is inserted between the second node and the switch.

Abstract: A microprocessor includes an on-chip low phase noise CMOS LC capacitance oscillator. The LC oscillator is relatively insensitive to power supply fluctuations. In addition, the LC oscillator is operable over a range of frequencies sufficient to support both normal full power operation, and reduced power operation of the microprocessor. The LC oscillator minimizes clock jitter problems and so permits extension of the microprocessor operating frequency to even higher levels than heretofore were possible. An output signal from a phase-frequency detector is a frequency control signal on a frequency control input line of a level converter and filter circuit of the LC oscillator. The output signal from level converter and filter circuit is a filtered frequency control signal on a control voltage input line to a continuously modifiable gigahertz frequency voltage controlled oscillator (VCO) circuit.

Abstract: A system for synchronizing circuit operation within an integrated circuit having a high frequency clock. The system includes an oscillator for providing a clock signal and a transmission line coupled to the oscillator for distributing the clock signal to load buffers. The load buffers provide sub-circuits within the integrated circuit with synchronized clock signals. The load buffers are resonant and convert the capacitive load impedance of receiving circuits into a virtual inductive load. The impedance converter boosts the clock signal transition times to provide improved high frequency circuit synchronization within the integrated circuit.

Abstract: A temperature sensitive oscillator circuit and control circuit which together form a current source. The temperature sensitive oscillator circuit generates an output signal which controls a frequency of a refresh oscillator circuit. The duty cycle of the output signal of the temperature sensitive oscillator circuit is temperature dependent and increases for increases in temperature. The output signal of the temperature sensitive oscillator circuit controls the control circuit which sources current between the refresh oscillator circuit and a supply node. As the duty cycle of the output signal of the temperature sensitive oscillator circuit increases a time duration during which the control circuit sources current between the refresh oscillator circuit and the supply node increases. This increase increases the frequency of the output signal of the refresh oscillator circuit. The output signal of the refresh oscillator circuit is an internal clock signal which controls a refresh cycle of a memory circuit.

Abstract: A transmitter circuit includes an output impedance and a buffered oscillator. The buffered oscillator includes a resonator for generating a reference signal and an amplifier coupled with the resonator for amplifying the reference signal. A first resonant tank generates an oscillating output signal in response to the amplified reference signal. A buffer circuit buffers the oscillating output signal and lowers the output impedance.

Abstract: A variable frequency oscillator providing a constant amplitude with variations in frequency. The variable frequency oscillator includes: an oscillator having an input connected for receiving a current I.sub.1, and outputs for providing complementary signals having a frequency varying in proportion to the current I.sub.1 ; first and second transistors, each having a base connected to a respective one of the oscillator outputs; current supply circuitry having a first output connected to the input of the oscillator for providing the current I.sub.1, and a second output connected to the emitters of the first and second transistors for providing a current I.sub.3, the current I.sub.3 varying in proportion to the current I.sub.

Abstract: The invention concerns oscillator circuits, more particularly coupling arrangements between an oscillator and an amplifier stage following the oscillator. The solution according to the invention optimizes the intensity of the coupling between the oscillator and the following amplifier stage so that the desired output level of the oscillator circuit is gained but the oscillator is loaded as little as possible. In the system according to the invention, the impedance value of the circuit element between the oscillator and the amplifier stage has been arranged to be automatically adjustable so that it is always adjusted to its smallest value, on which the desired output level of the oscillator coupling can still be gained. The coupling can, for example, be formed by means of a capacitance diode, the bias voltage of which is adjusted according to the direct voltage detected at the output level of the amplifier stage.

Abstract: A dual band oscillator circuit according to the present invention comprises an oscillator circuit portion that oscillates at a first frequency, an oscillator circuit portion that oscillates at a second frequency, a buffer amplifier circuit portion to which an output of the first oscillator circuit portion is input through a first stage-to-stage coupling element and an output of the second oscillator circuit portion is input through a second stage-to-stage coupling element. Operation is switched between the first and second oscillator circuits by an externally applied control voltage signal.

Abstract: An apparatus and method for generating signals. According to one embodiment, the apparatus has an oscillator generating a series of signals, an output stage for transforming the series of signals into a second series of signals, and a watchdog for providing a control signal to the output stage to hold the output stage in a selected state and for changing the control signal to enable the output stage in the selected state when the oscillator generates a first signal of the series of signals.

Abstract: A programmable frequency synthesizer comprised of a phase locked loop (PLL) including a current controlled oscillator (ICO), a level translator for receiving output signals from the ICO wherein the output signals have a finite slew rate, a reference source of signals, a phase-frequency detector for receiving signals from the reference source and output signals generated by the level translator and for providing pulse signals to the ICO having pulse widths which are directly proportional to phase difference between the signals from the reference source and the output signals from the level translator, and apparatus for varying the slew rate of the output signals from the ICO wherein the duty cycle and thus the frequency of output signals of the level translator may be varied.

Abstract: A low power consumption oscillator circuit is provided with an oscillator. The oscillator responds to a voltage by producing an oscillating signal at its output having an amplitude that depends on the level of the voltage. Furthermore, the low power consumption oscillator circuit has a level shifter. Illustratively, according to one embodiment, the level shifter includes a pull-up driver and a pull-down driver connected in parallel between the oscillator output and an output of the level shifter. The pull-up driver is configured so as to refrain from conducting current between a biasing input of the pull-up driver and the level shifter output simultaneously with the pull-down driver when the oscillating signal exceeds a certain voltage level. The level shifter illustratively includes an intrinsic PMOS device.

Abstract: A Colpitts type oscillator circuit for mitigating the effects of undesired oscillator ringing when write pulses are supplied, such as those encountered in compact disc, laser disc, and magneto-optical players or recording devices. Circuit elements are provided for mitigating the effects of oscillator ringing including replacement of an inductor with a suitable resistive load and an oscillator supply voltage maintained above a predetermined minimum voltage which is a function of the specific values of the related circuit elements.

Abstract: A balanced and buffered oscillator and transmitter arrangement includes a first and second oscillator, each of which include a resonator for generating a reference signal, an amplifier for amplifying the reference signal, a resonant tank for generating an oscillating output signal in response to the amplified reference signal, and a buffer circuit for buffering the respective oscillating output signal such that the effects of a parasitic impedance are minimized.

Abstract: A semiconductor IC used for synthesizer having a phase locked loop PLL, a voltage controlled oscillator (VCO) and a mixer (MIX) for intermediate frequency is formed on a one chip silicon wafer. A semiconductor IC used for synthesizer having a VCO portion and an internal circuit such as PLL on a silicon wafer chip includes a differential buffer circuit which separates the VCO portion from the internal circuit. A capacitor (C1) is connected to an output of the VCO portion. A constant voltage source (V1) may be connected to respective input of the differential transistors (Q4, Q5). Transistors (Q6,Q7) provide emitter follower output circuits in the differential buffer. Respective emitters of the transistors (Q6,Q7) are connected to corresponding constant current sources (I1,I2).

Abstract: An integrated circuit semiconductor device includes a charge pump to provide current at a potential which is greater than a supply potential. The charge pump utilizes an oscillator, which causes the charge pump to cycle, and thereby provide a continuous output at an elevated potential. In order to optimize efficiency of the charge pump, the oscillator is able to change its frequency in response to output potential. In the preferred embodiments, this is accomplished by selectively inserting a supplemental portion into a ring oscillator loop. When used with an integrated circuit device, such as a DRAM, the current from the charge pump may be supplied to nodes on isolation devices and nodes on word lines, thereby improving the performance of the DRAM without substantially changing the circuit configuration of the DRAM array.

Abstract: A single pin integrated oscillator circuit includes an amplifier having a first input terminal to which an external crystal may be connected, and a second input terminal which receives a feedback path from an output terminal of the amplifier. An oscillator output signal having a relatively large voltage swing is provided from the first input terminal through a buffer. The oscillator operates over a wide range of voltages and process variations, and it can accept an input signal from an external crystal or can accept any clock signal having a swing of approximately 1 V.

Abstract: A temperature sensitive oscillator circuit and control circuit which together form a current source. The temperature sensitive oscillator circuit generates an output signal which controls a frequency of a refresh oscillator circuit. The duty cycle of the output signal of the temperature sensitive oscillator circuit is temperature dependent and increases for increases in temperature. The output signal of the temperature sensitive oscillator circuit controls the control circuit which sources current between the refresh oscillator circuit and a supply node. As the duty cycle of the output signal of the temperature sensitive oscillator circuit increases a time duration during which the control circuit sources current between the refresh oscillator circuit and the supply node increases. This increase increases the frequency of the output signal of the refresh oscillator circuit. The output signal of the refresh oscillator circuit is an internal clock signal which controls a refresh cycle of a memory circuit.

Abstract: An oscillating circuit body 10 includes a first two-input NAND gate, a feedback resistor, a resonator and capacitors. One input terminal of the NAND gate functions as a control terminal to which is applied a first control signal to perform on-off control of oscillation operation of the circuit body. An output terminal of the circuit body is connected to an input terminal of a second two-input NAND gate via two inverters. The other input terminal of the second NAND gate is connected to a control terminal to which a second control signal is applied. The second NAND gate is used for masking the oscillatory output in response to the second control signal for a predetermined period, and the output from the second NAND gate is provided as a final clock output.