Rc Or Rl Type Patents (Class 333/172)
  • Patent number: 6094110
    Abstract: This invention relates to a radio frequency ("RF) choke having improved insertion loss and reduced hum modulation. The RF choke includes three conductors wound in series around an elongated core. The first conductor forms a first group of windings where each turn abuts the next turn. The second conductor forms a second group windings where each turn is spaced from the next. The third conductor forms a third group of windings where each turn abuts the next turn. The second and third groups of windings are wound in an opposite direction around the core than the first group of windings. The elongated core can include two separate diameters. A plurality of resistors are electrically connected to said conductors to provide an impedence that effectively blocks an RF signal at between 5 MHz and 1000 MHz. This type of choke can be employed in numerous circuits, including line splitters and couplers, trunk amplifiers, bridge amplifiers and line extender amplifiers.
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: July 25, 2000
    Assignee: National Electronic Devices, Inc.
    Inventor: Prabhakara Reddy
  • Patent number: 6091289
    Abstract: There is disclosed a low frequency filter. A low frequency cutoff filter includes a filter circuit having a capacitor connected between an input terminal and an output terminal and an active resistor connected to the output terminal, having a very large resistance, and a bias circuit having a negative feedback to set a biasing voltage of the active resistor to a desired value, thereby implementing the cutoff filter within a semiconductor chip as one set with the capacitor having a small capacitance. A low frequency pass filter includes an active resistor having a very large resistance, means for setting a biasing voltage of the active resistor to a desired value, and a capacitor connected between the output terminal and the ground. Therefore, the low pass filter can be integrated-circuited using even small capacitor.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: July 18, 2000
    Assignees: Electronics and Telecommunications Research Institute, Korea Telecom
    Inventors: Won Chul Song, Jong Ryul Lee, Chang Jun Oh, Jong Kee Kwon, Ook Kim, Kyung Soo Kim
  • Patent number: 6087906
    Abstract: An absorbent amplitude filter for HF signals employs a reflective filter and an absorption circuit comprising a load resistor. The absorption circuit inventively comprises another .lambda./4 line upstream of the filter, which comprises, at the input side, a series connection consisting of another diode and the load resistor. This series connection is connected with the reference potential, whereby an HF block is connected in parallel to the load resistor.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: July 11, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Peter Lampel
  • Patent number: 6075425
    Abstract: A power-line filter for operation with a converter is provided having a regulated voltage source and sinusoidal phase currents, with the power-line filter helping to eliminate interference voltages particularly in the frequency range from 2 kHz to 150 kHz, which are normally not taken into account. The leakage currents to ground, in this context, can be minimized to the point that it is possible to operate the converter in an (AC/DC sensitive) Interference Filter (IF) protective circuit-breaker.
    Type: Grant
    Filed: January 13, 1999
    Date of Patent: June 13, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Kurt Gopfrich, Manfred Karasek
  • Patent number: 6072360
    Abstract: A low pass filter includes an input, an output, a storage means, a switching means and a control means. The input receives an input signal. An output signal is generated on the output. The storage means is a sample storage element, for example, a capacitance. A first end of the storage means is connected to the output. The switching means is connected between the first end of the storage means and the input. The switching means, when closed, electrically connects the input to the first end of the storage means. When open, the switching means electrically isolates the input from the first end of the storage means. The control means controls the switching means. The control means generates a switching control signal. The switching control signal has a sampling frequency. The capacitance provided by the capacitance means and a pulse width of the switching control signal are selected so that a maximum cutoff frequency of the low pass filter is less than the sampling frequency divided by two.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: June 6, 2000
    Inventor: Rob McCullough
  • Patent number: 6057569
    Abstract: The present invention provides a diode limiter device in which a first penetration hole is formed on a wall surface of an H surface; the PIN diode is supported by the PIN diode mounting side of the post with the PIN diode being electrically connected to the waveguide at the first penetration hole; a second penetration hole is formed on the other wall surface opposite to the wall surface; a second conductive boss which grasps the PIN diode with the post is electrically insulated and supported with respect to the second penetration hole; a wiring substrate with the detection diode and the resistor mounted thereon is installed; and the wiring substrate is supported in the second penetration hole by a third boss, thereby improving productivity and reducing cost.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: May 2, 2000
    Assignee: New Japan Radio Co., Ltd.
    Inventors: Ikuo Kisanuki, Manabu Tomita
  • Patent number: 6043724
    Abstract: Described is a novel implementation of a medium and high frequency on-module (off-chip)/on-chip power noise filter for power noise sensitive circuits. To achieve this, a second order low-pass approach is used. The first stage capacitor is located on-module (off-chip), and the second stage capacitor is implemented on-chip.
    Type: Grant
    Filed: January 29, 1998
    Date of Patent: March 28, 2000
    Assignee: International Business Machines Corporation
    Inventors: Roland Frech, Erich Klink, William F. Shutler, Ulrich Weiss, Thomas-Michael Winkel
  • Patent number: 6031416
    Abstract: A CMOS elementary cell of the first order for time-continuous analog filters with non-linearity compensation, is connected between a first supply voltage reference and a second voltage reference. The cell is of a type which comprises at least a first MOS transistor having its conduction terminals connected to the first supply voltage reference and to an output terminal, and having a control terminal connected to an input terminal of the first order CMOS elementary cell. The cell further comprises a second MOS transistor in diode configuration, and an equivalent capacitor, both connected to the output terminal of the first order CMOS elementary cell. The second, diode-connected MOS transistor and the equivalent capacitor act as a load for the first MOS transistor. The first MOS transistor operates as a drive transistor operatively tied to an input voltage signal being supplied to the input terminal of the first order CMOS elementary cell. A second order filter CMOS elementary cell is similarly connected.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: February 29, 2000
    Assignee: STMicroeletronics S.r.l.
    Inventors: Andrea Baschirotto, Ugo Baschirotto, Guido Brasca, Rinaldo Castello
  • Patent number: 6014409
    Abstract: A network interface for receiving both high speed signals and low speed signals includes a passive filter manufactured entirely from passive electronic elements. The filter filters the low speed signal when a low speed signal is received, and does not distort a high speed signal transmitted to an encoder/decoder device when a high speed signal is received.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: January 11, 2000
    Assignee: Cabletron Systems, Inc.
    Inventor: Robert Curtis
  • Patent number: 6011432
    Abstract: Circuits having switched capacitors that are implemented with T-structures in which one of the three capacitors in the T-structure is implemented with a buffer amplifier configured to receive a control signal (e.g., a control voltage) and to apply a buffered control signal to an active device having a capacitance that is dependent on the control signal level. In one embodiment, the control signal is a control voltage, the active device is a varactor diode, and the circuit is a ladder filter having one or more switched capacitors, each of which is implemented using the T-structure of the present invention. Under the present invention, continuously tunable circuits can be implemented with discrete elements where the circuits can be tuned by changing the control signal in one or more of the switched capacitors, without having to provide a continuously tunable clock.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: January 4, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Roger A. Fratti, Douglas D. Lopata
  • Patent number: 5999043
    Abstract: A resistive element including a P-channel MOS device (101, 401, 402, 608a-608c) having a first and second current carrying electrodes, and a gate. The first current carrying electrode forms a first impedance terminal and the second current carrying electrode forms a second impedance terminal. A bias circuit (103, 104, 105, 106) coupled to the first current carrying electrode and gate of the P-channel MOS device (101, 401, 402, 608a-608c). The bias circuit (103, 104, 105, 106) generates a voltage less than the threshold voltage of the P-channel MOS device (101, 401, 402, 608a-608c).
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: December 7, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Zhengwei Zhang, James R. Hellums
  • Patent number: 5990757
    Abstract: Flip chip monolithic microwave integrated circuits (MMIC) devices formed on gallium arsenide substrates and use thermally bumped diodes and field effect transistor devices to achieve improved heat dissipation and power protection. Flip chip limiter MMIC devices and transmit/receive switch MMIC devices are specifically provided by the present invention. The flip chip gallium arsenide limiter and transmit/receive switch MMIC devices use plated metallized bumps for both I/O connections and for thermal connections to a host substrate (aluminum nitride). The present invention also incorporates coplanar waveguide transmission line, thereby eliminating backside processing of the gallium arsenide substrates. The transmit/receive switch device provides power protection in both transmit and receive modes.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: November 23, 1999
    Assignee: Raytheon Company
    Inventors: S. Doug Tonomura, James M. Harris, Christopher A. Moye
  • Patent number: 5986516
    Abstract: An attenuator includes a flat, substantially rectangular substrate of an insulating material having a surface. A plurality of termination areas of a conductive material are on the substrate surface and are spaced from each other. Three resistors are on the substrate surface and are connected in a series parallel combination between the termination areas. The resistors may be formed by three separate resistance layers extending between and connected to the termination areas, or a single resistance layer extending between and connected to the termination areas. A shunt capacitor is on the substrate surface and is connected to one of the resistors. The shunt capacitor is formed by an area of a conductive material on the substrate surface and overlapping a portion of the resistors, and a dielectric layer between the conductive area and the resistor.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: November 16, 1999
    Assignee: EMC Technology LLC
    Inventor: Joseph B. Mazzochette
  • Patent number: 5963112
    Abstract: The present invention provides a higher order filter with low sensitivity to component values and to a method of designing the same. The higher order filter is constructed of second and/or third order filter circuits which have been desensitized with respect to component values and gain by impedance tapering the filter circuits. The filter circuits are impedance tapered by successively scaling the resistors and/or capacitors from left to right to minimize loading on the first filter section and to maximize the quality factor of the passive pole. The impedance of the filter sections is increased from left to right by increasing the resistor values and/or by decreasing the capacitor values from left to right. Once the lower order filter circuits have been designed, they are cascaded to provide a higher order filter with low sensitivity to component values and gain.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: October 5, 1999
    Assignee: Globespan Technologies, Inc.
    Inventor: George S. Moschytz
  • Patent number: 5959510
    Abstract: The present invention provides a second order filter with low sensitivity to component values and a method for designing the filter. The filter is impedance tapered by increasing the impedance of the filter circuit from left to right so as to minimize loading on the first ladder section and to maximize the pole quality factor of the first section. The filter is designed so that the value of the resistor of the second ladder section of the filter is equal to the resistor value of the first section multiplied by a scaling factor r, which is greater than 1. The capacitor of the second ladder section has a value equal to the value of the capacitor of the first ladder section divided by a tapering factor .rho., which is also greater than 1. In accordance with the preferred embodiment, the capacitor and resistor tapering factors are equal, i.e., r=.rho.>1.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: September 28, 1999
    Assignee: Globespan Technologies, Inc.
    Inventor: George S. Moschytz
  • Patent number: 5936485
    Abstract: A resistor-capacitor network has a wound film capacitor as its capacitive component and, as its resistive component, a stripe of resistive material located on the surface of the spiral laminate which forms the wound film capacitor and extending onto at least one of the schoopage metal terminations of the capacitor. To form a parallel R-C network, the resistive stripe also extends onto the opposite schoopage metal termination. For other network connections, the stripe ends short of one of the metal terminations and is provided with an external connection at that end.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: August 10, 1999
    Assignee: Roederstein Electronics, Inc.
    Inventor: Geoffrey K. Hooper
  • Patent number: 5929698
    Abstract: A low-pass filter circuit including a first sub-filter designed in integrated circuit technology. The first sub-filter includes high-impedance resistor elements and smaller capacitances. A second sub-filter preceding the first sub-filter is constructed with low-impedance resistor elements and higher capacitances.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: July 27, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Stephan Weber, Volker Thomas
  • Patent number: 5929699
    Abstract: An active RC integrator filter with finite operational amplifier bandwidth can be compensated by biasing the operational amplifier input stage such that its transconductance becomes a function of the resistance. Thereafter, by inserting another resistance of the same material in series with the integrating capacitor, a zero results in the overall transfer function of the filter according to the present invention. In this manner, the passband peaking of the active RC integrator filter resulting from the integrator phase shift can be avoided.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: July 27, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Laurence Douglas Lewicki
  • Patent number: 5914633
    Abstract: A tuning circuit for generating a digital code to be used to calibrate a capacitor array of the type used in active RC filters is comprised of a single-slope A/D converter with fixed reference voltages as inputs and an output value which is dependent on the RC product of a resistor and capacitor within the converter. A decoder converts the RC product as measured by the A/D converter into a digital code which, when applied to the appropriate capacitor array, sets the array capacitance to compensate for the difference between the measured RC product and the nominal design value.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: June 22, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Vittorio Comino, Dima David Shulman, Susan Jeanne Walker
  • Patent number: 5907242
    Abstract: A balanced bandpass preamplifier assembly (23) is disclosed for use in a locator (10) for locating a beacon transmitter (18) housed within an underground boring device (12). The bandpass preamplifier assembly (23) includes a balanced bandpass filter (28) of the Butterworth type with second order filter characteristics. The preamplifier assembly (23) provides reception of beacon frequencies at two distinct frequencies, preferably 29.430 KHz and 32.768 KHz. The antenna (14) of the . locator (10) forms the series inductance in the bandpass filter (28).
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: May 25, 1999
    Assignee: The Charles Machine Works, Inc.
    Inventor: Michael F. Gard
  • Patent number: 5889445
    Abstract: Composite RC devices are described that provide predetermined impedance properties in a package similar to multilayer ceramic capacitors of the prior art. The RC devices include a plurality of first and second ceramic layers interleaved to form a stack. The ceramic layers each include a suitable electrode structure of opposite polarity forming the equivalent of multiple two-plate capacitors. One or more resistors are embedded in the device body and are selectively connected to the capacitor structure. In some presently preferred embodiments, multiple parallel resistors are provided, such as on each electrical side of the capacitor structure.
    Type: Grant
    Filed: July 22, 1997
    Date of Patent: March 30, 1999
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, John L. Galvagni
  • Patent number: 5872466
    Abstract: A matched filter with reduced electric power consumption is disclosed. The matched filter circuit power consumption is reduced by stopping the electric power supply to an unnecessary circuit since input signal is partially sampled just after an acquisition. Since the spreading code is 1 bit data string, the input signal sampled and held is branched out into the signal groups "1" and "-1" by a multiplexer. The signals in each groups are added in parallel by a capacitive coupling, and the electric power is supplied in the circuit intermittently.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: February 16, 1999
    Assignees: Yozan Inc., Sharp Kabushiki Kaisha
    Inventors: Guoliang Shou, Changming Zhou, Makoto Yamamoto, Sunao Takatori
  • Patent number: 5864256
    Abstract: A description is given of a circuit arrangement comprisinga filter quadripole having two output terminals anda voltage follower circuit having two terminals, said terminals having identical electric potentials when the voltage follower circuit is in its turned-on state, each of the terminals of the voltage follower circuit being connected to one of the output terminals of the filter quadripole respectively, and the voltage follower circuit only being in its turned-on state during the turn-on time interval of the circuit arrangement. This circuit arrangement is suitable for a receiver circuit, more particularly, for a pager and has a very brief turn-on time.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: January 26, 1999
    Assignee: U.S. Philips Corporation
    Inventors: Burkhard Dick, Manfred Biehl, Winfried Jansen, Bernd Pille, Norbert Wirges
  • Patent number: 5864185
    Abstract: A passive filter device for a capacitor in series with a substantially inductive transmission line of an electric transmission system is disclosed. The passive filter device comprises a double-loop RCL filter in parallel with the series capacitor. At power frequency, the filter device allows the power frequency current to pass through the series capacitor with minimum power losses. At sub-synchronous resonance frequencies, the passive filter device provides bypassing of the series capacitor with maximum selectivity of the RCL filter.
    Type: Grant
    Filed: March 28, 1996
    Date of Patent: January 26, 1999
    Assignee: General Electric Company
    Inventors: Wendell Neugebauer, Stanley A. Miske, Jr., Satoru Ihara
  • Patent number: 5861744
    Abstract: An input filter for a vehicle anti-lock brake system control module has a filter section for attenuating input signals having mid-range frequencies.
    Type: Grant
    Filed: February 10, 1997
    Date of Patent: January 19, 1999
    Assignee: Kelsey-Hayes Company
    Inventor: Kenneth C. Earl
  • Patent number: 5861783
    Abstract: The amplification of crosstalk between two isolated circuits due to a resonant condition between the two circuits is reduced by coupling the electrical grounds associated with the circuits with a series Resistor-Capacitor network.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: January 19, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Joseph Peter Savicki
  • Patent number: 5841822
    Abstract: A communication receiver (600) utilizes a band-pass sigma-delta converter (100) for receiving a radio signal. The band-pass sigma-delta converter (100) includes a comparator (106) coupled to an adder-filter (101) for making a comparison between a predetermined reference level (110) and an intermediate signal (125), and for generating a comparison result signal (114) responsive to the comparison. A storage element (108) is used for storing the comparison result signal (114) for a predetermined delay period, thereby producing a clocked output signal (118). The adder-filter (101) is coupled to an analog signal (103) and to the clocked output signal (118) for subtracting the clocked output signal (118) from the analog signal (103) to produce a difference signal (120) that is filtered by a commutating filter (400) for generating the intermediate signal (125) responsive to the difference signal (120).
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: November 24, 1998
    Assignee: Motorola, Inc.
    Inventors: James Gregory Mittel, Raymond Louis Barrett, Jr., Walter Davis
  • Patent number: 5821832
    Abstract: A signal transmission circuit for transmitting signals having a wide frequency spectrum over a cable. The circuit includes an isolating transformer having a high pass filtering function; a low-pass filter, the input of the low pass filter being common with the input of the high pass filter; and means for summing the output voltages of the low-pass filter and the high-pass filter.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: October 13, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Jean-Michel Moreau
  • Patent number: 5815051
    Abstract: Differential filters for removing both normal-mode and common-mode noises are provided. A first-order differential low pass filter is composed of a first resistor connected between a first input terminal and a first output terminal, a second resistor having the same resistance value as the first resistor and connected between a second input terminal and a second output terminal, a first capacitor connected between the first output terminal and a reference potential, a second capacitor having the same capacitance value as the first capacitor and connected between the second output terminal and the reference potential, and a third capacitor connected between the first output terminal and the second output terminal.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: September 29, 1998
    Assignee: Burr-Brown Corporation
    Inventors: Toshihiko Hamasaki, Hitoshi Terasawa, Toshio Murota
  • Patent number: 5789999
    Abstract: A lossy capacitive circuit element, or DC scrubber, is printed on a circuit substrate and absorptively filters high frequency signals in circuit modules. A top conductor of the DC scrubber is separated from a ground conductor by a layer of high dielectric material. A resistive layer, positioned either above or below the top conductor absorbs high frequency signals applied to the top conductor while the dielectric layer shunts the signals to the ground conductor. Alternatively, a pair of DC scrubbers are stacked vertically to configure the lossy capacitive structures in parallel. Signal isolation provided by the DC scrubber and the stacked DC scrubber enables inexpensive DC interfaces to be used in the circuit modules.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: August 4, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Ron Barnett, John F. Casey
  • Patent number: 5781082
    Abstract: In an R-C filter for preventing a noise signal from entering a power supply system through its output circuit, a circuit component acting as a resistive element for the filter is connected in series with the output circuit and a capacitive element is connected between one portion of the circuit component and ground to form an R-C type filter. A wiring member, a printed wiring foil, a through-hole member, a semiconductor device or other such circuit component can be used, as the circuit component acting as the resistive element for constituting the R-C type filter.
    Type: Grant
    Filed: August 30, 1995
    Date of Patent: July 14, 1998
    Assignee: Zexel Corporation
    Inventors: Yoshihide Gunji, Hideaki Matsuzaki, Hiroshi Ohsawa
  • Patent number: 5767757
    Abstract: An integrated circuit R/C network and method for providing a selectively variable impedance in which a capacitor has a high resistivity semiconductor plate with a low resistivity body contact region therein, the contact region for providing a variable resistance in series with the capacitor, and in which a control terminal is connected to the plate for selectively applying a control voltage thereto which varies the series resistance to thereby vary the impedance of the network.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: June 16, 1998
    Assignee: Harris Corporation
    Inventor: John S. Prentice
  • Patent number: 5760662
    Abstract: A Quarter Size Small Outline Packages (QSOP) integrated resistor/capacitor network. The QSOP integrated resistor/capacitor network includes resistor/capacitor filters implemented in a QSOP package in integrated form. In one embodiment, the QSOP integrated resistor/capacitor network includes at least six ground pins for coupling capacitors of the resistor/capacitor filters with a common ground to maximize the attenuation of ultra-high frequency signals filtered through the resistor/capacitor filters.
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: June 2, 1998
    Assignee: California Micro Devices Corporation
    Inventors: Jeffrey Clifford Kalb, Peruvamba Hariharan, Anguel Svilenov Brankov
  • Patent number: 5760642
    Abstract: A filter circuit using junction capacitors of semiconductors of the present invention prevents the distortion of signal waveforms and is not affected by parasitic capacitors. The filter circuit includes a resistor whose first terminal is connected to an input terminal and whose second terminal is connected to an output terminal. A first junction capacitor is connected between a control voltage supply terminal and an output terminal and a second junction capacitor is connected between the output terminal and ground. An alternate embodiment of the filter circuit includes a pnp transistor, whose emitter is connected to the direct current power supply via a resistor, whose collector is grounded, and whose base is connected to the output terminal.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: June 2, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshiro Yada
  • Patent number: 5760456
    Abstract: A planar inductor structure with improved Q compatible with typical integrated circuit fabrication. The structure includes a spiral inductor with a conductive plane between the resistive substrate of the integrated circuit and the spiral inductor which reduces the power loss of the inductor. A pattern of segments may be formed in the conductive material of conductive plane to prevent eddy currents from flowing through the conductive plane and reducing the inductance of the spiral inductor. The Q of the inductor can be enhanced by optimizing the pattern in which the segmented conductive plane is formed. The segmented conductive plane may be fabricated out of metal, polysilicon or a heavily-doped region of the substrate.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: June 2, 1998
    Inventors: Andrew Z. Grzegorek, William J. McFarland
  • Patent number: 5760641
    Abstract: A controllable filter arrangement comprises a filter network for filtering an input signal of the filter arrangement, and a transistor, the transistor being configured as a voltage-follower having a controllable current source in its output circuit for providing a controllable DC transistor output current, an output terminal of the voltage-follower being connected to the filter network such that a cut-off frequency of the filter can be controlled by variation of the DC current supplied by the current source. The filter network may be a single-pole RC network and the output of the follower may be connected to an additional capacitor (or resistor) of the network which is coupled to the junction of the existing capacitor and resistor.
    Type: Grant
    Filed: February 21, 1996
    Date of Patent: June 2, 1998
    Assignee: Plessey Semiconductors Limited
    Inventors: Marcus Richard Granger-Jones, Colin Leslie Perry
  • Patent number: 5751184
    Abstract: A low electric power consumption filter circuit includes an amplifying portion including an odd number of serial MOS inverters. A grounded capacitance is connected between an output of the amplifying portion and ground. A pair of balancing resistances connect an output of the MOS inverter to a supply voltage and ground at a previous stage of the last MOS inverter. A feedback impedance connects an output of the amplifying portion to its input. An input impedance is connected to the input of the amplifying portion.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: May 12, 1998
    Assignees: Yozan Inc., Sharp Kabushiki Kaisha
    Inventors: Guoliang Shou, Makoto Yamamoto, Sunao Takatori
  • Patent number: 5739732
    Abstract: An alternating current (AC) spike absorption circuit employs a pair of back-to back parallel high-speed ultra-soft recovery diodes with unique RFI prevention characteristics. Further high frequency noise suppression is achieved by using a high voltage parallel-connected capacitor and a plurality of series-connected parallel ceramic-type resistors which are formed by resistors having coil windings providing an equivalent circuit of parallel resistance and inductance. The inductance provides ultra high frequency rejection and the resistance provides damping of any ringing oscillation. A surrounding ceramic material casing of the ceramic-type resistors resists the transmission of radio frequency energy.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: April 14, 1998
    Inventor: Page Huie Man Kit
  • Patent number: 5731747
    Abstract: An electronic component with a substrate (1, 31) of which a surface (4, 34) is provided with a thin-film structure with passive elements (5, 35), with a resistor (6, 36) formed in a layer of resistor material (7, 37), and with a capacitor having a lower electrode (9, 39) formed in an electrode layer (10, 40) provided on the surface, a dielectric (11, 41) formed by a layer of insulating material (12, 41) provided on the lower electrode, and an upper electrode (13, 43) formed in an electrode layer (14, 44) provided on the dielectric. One of the electrodes (9, 43) of the capacitor (8, 38) is formed in an electrode layer (10, 44) which is constructed as a dual layer (19-21, 49-51), of which the layer of resistor material (7, 37) in which also the resistor (6, 36) is formed constitutes a first partial layer (19, 49), on which a layer of conductive material (20, 55) is provided which constitutes the other, second partial layer (21, 51).
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: March 24, 1998
    Assignee: U.S. Philips Corporation
    Inventors: Gerjan F. A. Van De Walle, Edward W. A. Young
  • Patent number: 5693988
    Abstract: A filtering device, connected between an electrical power supply source and a load, comprises an active filter connected to the source and to the load, and a passive filter connected to the load. A voltage, generated between two terminals of the active filter, is monitored by first and second circuits. The first circuit receives a signal representative of a current, and monitors the voltage according to the signal representative of the current on input of the filtering device and to a first coefficient. The second circuit receives a signal representative of a voltage, and monitors the voltage according to the voltage signal and to a second coefficient. The first and second coefficients have values variable according to the frequency.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: December 2, 1997
    Assignees: Schneider Electric SA, Electricite de France
    Inventors: Eric Bettega, Miaoxin Wang
  • Patent number: 5686861
    Abstract: A filter circuit that consumes very little electric power. The active filter is a linear inverter constructed by 1) an inverting amplifying portion composed of an odd number of MOS inverters serially connected, 2) a grounded capacitance connected between an output of the inverting amplifying portion and ground, 3) a balancing resistance having a pair of resistances for connecting an output of one of the MOS inverters, other than the last MOS inverter, to the supply voltage and the ground, respectively, and 4) a feedback impedance for connecting the output and input of the inverting amplifying portion. A coupling capacitance is connected to the input of the linear inverter and a plurality of filter circuits are connected to an input of the coupling capacitance.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: November 11, 1997
    Assignees: Yozan Inc., Sharp Kabushiki Kaisha
    Inventors: Guoliang Shou, Sunao Takatori, Makoto Yamamoto
  • Patent number: 5670917
    Abstract: The present invention is directed to an AC termination which includes a substrate having first and second surfaces. A resistor is mounted on the first surface of the substrate. An input termination is at one end of the resistor. At least one plate of a capacitor is on the substrate and is electrically connected in series with the other end of the resistor. In one form of the termination, the capacitor is a metal film on the substrate extending from the other end of the resistor to and across the second surface of the substrate to form one electrode of the capacitor. A dielectric layer is over the metal film and another metal film extends over the dielectric layer to form the other electrode of the capacitor and the output termination of the termination. In another form of the termination, the capacitor is formed on a cover plate which extends over the first surface of the substrate and is electrically connected between the resistor and an output termination.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: September 23, 1997
    Assignee: EMC Technology, Inc.
    Inventor: Joseph B. Mazzochette
  • Patent number: 5629655
    Abstract: A low pass filter including a number of different filter sections each having two input and two output terminals as well as a common terminal. Each filter section includes first and second resistors connected in series between respective first and second input terminals and first and second output terminals. Each of the resistors is formed by depositing a pattern of resistive material over a conducting plate with an intervening dielectric layer to provide a distributed capacitance between the resistive pattern and the conductive plate. Resistive elements are connected between at least one combination of (1) each of the conducting plates to the common terminal and (2) the conducting plates. A resistor is connected between the output terminals of at least one of the filter sections. The filter sections are cascade connected such that the output terminals in one section are connected to the input terminals of the next.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: May 13, 1997
    Assignee: Ericsson Inc.
    Inventor: Paul W. Dent
  • Patent number: 5608756
    Abstract: The invention relates to a device identifying traffic on a cable. The different types of traffic are characterized by different levels and frequency ranges. The device includes a limiter connected to the paired cable and delivering an output signal having substantially constant amplitude And a frequency corresponding to the strongest frequency component of the input signal. The limiter may be constructed of inverters coupled as an amplifier or of an amplifier having a Schmitt trigger. The limiter is connected to a frequency indicator indicating what frequency ranges within which the strongest frequency component lies. The frequency indicator may consist of monostables or counters and decoders. The decoder interprets the output signal of the counter and may be constructed of a fixed gate network or of a programmable memory. The output signal of the frequency indicator is connected to an indicator indicating the frequency range in question, e.g. by means of flashing light-emitting diodes.
    Type: Grant
    Filed: February 28, 1995
    Date of Patent: March 4, 1997
    Assignee: Televerket
    Inventors: Alexander Latour-Henner, Bjorn Isheden
  • Patent number: 5603306
    Abstract: An ignition coaxial cable includes at least a braided layer of copper wires surrounding a central or inner conductor existing at a longitudinal center of the coaxial cable for shielding and grounding the interference caused by the high voltage carried by the cable, and an interference eliminating circuit having an inductor parallelly connected with a high-impedance resistor and connected in series with a low-impedance resistor to prevent the acute wave forms and to inhibit the surge waves caused by the high-tension voltage pulses delivered from the distributor to the plug, thereby eliminating the interference or electromagnetic interference caused by the high-tension cable and the plug of the car.
    Type: Grant
    Filed: February 3, 1995
    Date of Patent: February 18, 1997
    Inventor: Tsai-Ting Tai
  • Patent number: 5598131
    Abstract: The present invention is directed to an AC termination which includes a substrate having first and second surfaces. A resistor is mounted on the first surface of the substrate. An input termination is at one end of the resistor. At least one plate of a capacitor is on the substrate and is electrically connected in series with the other end of the resistor. In one form of the termination, the capacitor is a metal film on the substrate extending from the other end of the resistor to and across the second surface of the substrate to form one electrode of the capacitor. A dielectric layer is over the metal film and another metal film extends over the dielectric layer to form the other electrode of the capacitor and the output termination of the termination. In another form of the termination, the capacitor is formed on a cover plate which extends over the first surface of the substrate and is electrically connected between the resistor and an output termination.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: January 28, 1997
    Assignee: EMC Technology, Inc.
    Inventor: Joseph B. Mazzochette
  • Patent number: 5589440
    Abstract: High Tc superconducting limiters are designed to operate at two or more levels of input signals. In one waveguide embodiment, multiple half wavelength branch waveguide lines are connected to a main waveguide line. The half wavelength lines are terminated with tuned circuits of a capacitance, made of a ferroelectric material, and an inductance provided by a waveguide line. In another waveguide embodiment, the branch lines are terminated in tuned cavities each having a ferroelectric material. In a microstrip embodiment, multiple half wavelength branch ferroelectric lines of different impedances are connected to a main line. In a second microstrip line embodiment, tuned circuits, with differing L and C values, are connected to a main transmission line through a half a wavelength branch transmission line. The capacitance is made of a ferroelectric material. The conductor, deposited on the microstrip lines, and the waveguides are made of a single crystal high Tc superconductor.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: December 31, 1996
    Inventor: Satyendranath Das
  • Patent number: 5585330
    Abstract: A high-temperature superconductor (HT.sub.c S) in a microstrip configurat which is electrically related to a superconducting coupler and which is controlled by a heater disposed over the superconducting microstrip line. This limiter configuration is used in a series configuration with other circuitry and utilizes the low loss characteristics of the HT.sub.c S material and the wide bandwidth characteristics of microstrip. The structure itself is a five layer microstrip geometry which includes a normal metal ground plane; a dielectric substrate disposed on the metal ground plane; a superconducting microstrip transmission disposed on the substrate; a dielectric film layer disposed on the superconducting microstrip; and a heating element disposed on the dielectric film layer and over the superconducting microstrip.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: December 17, 1996
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Roland Cadotte, Jr., Richard W. Babbitt, Xiaoguang G. Sun
  • Patent number: 5561586
    Abstract: An electronic device which has, on a rectangular insulating substrate, an input electrode and an output electrode, grounding electrodes and a conductor for electrically connecting the input electrode and the output electrode. The input electrode and the output electrode are disposed on both ends of the substrate. The grounding electrodes are disposed on side surfaces of the substrate in the center, and the conductor is disposed on an upper surface of the substrate. The conductor is a conductor with a high conductivity, a resistor or a coil. A capacity is generated between the conductor and the grounding electrode. If the conductor is a resistor, an RC circuit is formed.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: October 1, 1996
    Assignee: Murata Manufacturing Co, Ltd.
    Inventors: Takashi Tomohiro, Hiromichi Tokuda
  • Patent number: 5541564
    Abstract: A hybrid R-C component for use in oscilloscope probes of the type having a resistive element disposed on a first surface of a substrate, and having a first conductive coating disposed on a second surface of the substrate, and having a dielectric layer disposed over the first conductive coating, a second conductive coating partially disposed over a first portion of the substrate and in contact with a first end of the resistive element and with a region of the second conductive coating being partially disposed over the dielectric layer and forming a first capacitor plate, a third conductive coating disposed over a second portion of the substrate and in contact with a second end of the resistive element and with a region of the third conductive coating being partially disposed over the dielectric layer and forming a second capacitor plate, whereby the first capacitor plate and a first area of the first conductive coating in conjunction with the dielectric layer form a first capacitor C1 and the second capacitor
    Type: Grant
    Filed: June 20, 1995
    Date of Patent: July 30, 1996
    Assignee: Tektronix, Inc.
    Inventors: Eugene J. Climer, Wayne D. Thomas