Abstract: A sine wave oscillator provides an input signal to a step-recovery diode (SRD). The SRD produces a wideband series of harmonics of the frequency of the sine wave oscillator that are represented as "lines" in a power r.f. frequency plot. The output of the SRD is supplied to one or more bandpass filters or lowpass filters which provide selection windows so that only a specified number of harmonic lines are passed within a selection window. These specified harmonic lines are then coupled to one or more high speed input switches which are coupled to one or more high speed selection switches. The high speed selection switches are each coupled to a separate bandpass filter that is tuned to a different bandpass frequency range. Each bandpass filter corresponds to one or to several adjacent lines of the selection windows.

Abstract: A signal/noise ratio optimization tuning system, which can be used for tuning receiver antennas in Magnetic Resonance Imaging receiver systems, has a switch-controlled noise source means that is weakly coupled to the receiver antenna. The switch-controlled noise source switches a noise source between higher and lower power states at a predetermined frequency. A noise power meter means, which is synchronized to the switch-controlled noise source means, measures outputs of the receiver antenna. The noise power meter means measures the outputs of the receiver antenna when the noise source is switched between higher and lower power states and computes a ratio of the receiver antenna output with the noise source in the higher power state to the receiver antenna output with the noise source in the lower power state to obtain a noise power ratio. The tuning adjustment means is varied to maximize this noise power ratio.

Abstract: A device and method is provided for filtering frequency components of an electrical signal above a selectable low pass cutoff frequency which is changeable within a designated range. An input filter having a fixed low pass cutoff frequency provides aliasing protection for a first of at least three clock driven filter stages respectively having variable low pass cutoff frequencies proportional to a clock rate of a received clock signal. The overall selectable low pass filter is determined at an intermediate stage of the clock driven filter stages. Clock rates of respective clock signals applied to clock driven stages proceeding the intermediate stage having the selectable cutoff frequency are adjusted so that each provides aliasing protection for the next. Similarly, the low pass cutoff frequencies of clock driven filter stage succeeding the intermediate stage having the selectable cutoff frequency are adjusted to eliminate staircasing distortion in the output signal.

Abstract: In an automatic tuning system for an antenna having a single variable reactance element, the power transmitted to the antenna and the power reflected from the antenna on the feedline are sensed. The variable reactance component of the antenna is adjusted until the ratio between the transmitted and reflected power on the feedline indicates that the standing wave ratio on the feedline is at a minimum, whereupon the antenna will be tuned. The adjustment of the variable reactance component is by a stepping motor controlled by a microprocessor, which is programmed to make calculations to determine when the standing wave ratio reaches a minimum.

Abstract: A crystal filter network comprises at least one variable impedance network (103a, 103b), at least one crystal filter (103c), and a control circuit (110). Each variable impedance network (103a, 103b) has a control terminal, a first terminal (37, 39), and a second terminal (38, 40) for connecting a first impedance (113) coupled to the first terminal (37), to a second impedance coupled to the second terminal (38). The crystal filter (103c) is coupled to at least one of the first and second terminals. Coupled to the control terminal, the control circuit (110) electrically varies (V.sub.1 and V.sub.2) the variable impedance network (103a, 103b) to provide a predetermined impedance characteristic to the crystal filter network (103c).

Abstract: An automatic impedance matching apparatus for matching an RF-signal generator to a load, such as a plasma etching chamber, is disclosed. The matching apparatus comprises a matching network having two variable impedance devices, a tune detector for detecting the condition of the impedance match between the RF-signal and the load, and a controller for modifying the values of the variable impedance components in response to the measured tune condition. The present invention disclosed improve reset and convergence unit and eliminates the need for the "dead-band" provided around the matching point found in prior art impedance matching controllers. Also disclosed is an improved adjustment unit for adjusting the variable impedance components which is faster and more stable than found in prior art controllers. Also disclosed is a normalization unit for normalizing the input detection siganls such that variations in turning performance due to variations in input power level from the source are substantially reduced.

Abstract: A tuning circuit (30) provides selection signals to a passive component array (80) in a continuous-time filter (70) to compensate for wide variations in values which are encountered in integrated circuit processing. The tuning circuit (30) includes at least one capacitor (46) and at least one resistor (31), and a plurality of either capacitors or resistors. A largest component is enabled and an integration of a reference current during a predetermined period is performed. If the integration provides a voltage greater than a reference voltage, then a corresponding selection signal is set and the component is selected. Successive integrations are performed to determine which components are enabled by corresponding selection signals in order to enable a combination of components which most closely integrates the reference current to the reference voltage. When selection signals corresponding to all components have been determined, the selection signals are applied to corresponding components in the filter (70).

Abstract: A method, and corresponding apparatus, for matching a generator impedance with an unknown and possibly changing load impedance, to maximize power transferred to the load. The apparatus includes an impedance matching network, and a network model, to estimate the load impedance from known present network values and a measurement of network input impedance, and to estimate optimum network values from the input impedance and the estimated load impedance. A controller computes new network values based on the present and optimum values, and outputs the new values to the network. The process is repeated using the new network values to estimate the load impedance and generate a new set of optimum values. The controller uses a control equation with parameters selected to ensure rapid convergence on the maximum-power condition, without overshoot or instability.

Abstract: An oversampling analog/digital converter includes a given number of at least three identically constructed switched-capacitor converter stages each being triggered by an analog input signal and each outputting both an analog and a digital output signal. The converter stages are connected in series with respect to the analog input and output signals. The given number of series-connected differentiation stages are each connected downstream of a respective one of the converter stages for receiving and adding the digital output signals of the converter stages.

Abstract: A microwave vector modulator (4) of the reflective type is used to match a microwave load. The adjustable reflection of the vector modulator is obtained by semiconducting surfaces (18, 19, 20, 21), illuminated by light-emitting means (24, 25, 26, 27).

Abstract: A power source for electric discharge machining, which performs a semi-mirror-finish machining operation with a surface roughness of 1 .mu.m Rmax or less. The power source includes either a resonance circuit or an impedance matching circuit so that the electric discharge is carried out under the condition that resonance is caused to occur with the capacitance of an interelectrode gap between an electrode and a workpiece to be machined or the impedance-matching is effected in response to variation in interelectrode condition. With such a power source, it is possible to eliminate the effect of the stray capacitance exsiting in a current supplying line and also to eliminate the shortcoming due to variation on the interelectrode condition, and therefore a mirror-finished machining operation can be stably carried out to provide machined surfaces excellent in surface roughness.

Abstract: Sigma-delta analog to digital converters based upon switched capacitor delay and switched capacitor differentiator circuits are described. These switched capacitor circuits have the advantages that they are less sensitive to clock feed-through noise, dc offset voltage and power supply voltage, etc. Design examples of one-bit second-order sigma-delta analog digital converter are given to substantiate both design methodology, circuit features and the utility of these new circuit structures.

Abstract: A delta signma modulator is programmable to realize a number of different gain settings. A user of the delta sigma modulator (which may be a human or an electronic system) may select a setting among a plurality of available settings. Programmability of gain is realized by selectively controlling the rate of sampling of an analog input relative to the rate of sampling of a reference voltage and/or by controlling interspersing of samples of fixed voltage with the analog input or reference voltage. To effect a positive gain, the rate of sampling of the analog input is selected to the bar larged than that of the rate of sampling of the known reference voltage. Alternatively, or additionally, fixed voltage charge samples are interspersed with the reference. In contrast, to effect a negative gain, the rate of sampling of the analog input is set to be less than the rate of sampling of the reference voltage and/or samples of fixed voltage are interspersed with the analog input.

Abstract: In a high-pass filter circuit comprising a high-pass filter having a transfer function in accordance with the following equation: ##EQU1## a compensation network is connected in series with said high-pass filter, said network comprising a summing circuit, a continuous line and a low-pass filter connected in parallel therewith, said low-pass filter having a transfer function in accordance with the following equation ##EQU2## and the filter coefficient d.sub.K-1 of the low-pass filter being chosen to be equal to the difference of the filter coefficients b.sub.n-1 -a.sub.n-1 of said high-pass filter.

Abstract: The invention relates to a circuit configuration for the automatic tuning of a matching network (2) disposed between an electrical energy source (1) and a load (3). Herein two measured signals (U.sub.E, U.sub.1) are received from which are formed the magnitudes of three signals (U.sub.E, U.sub.1, I.sub.E) from which, in turn, the control values x.sub.1, x.sub.2 are determined for the setting of the matching network (2).

Abstract: An automatic load-matching circuit for microwaves, disposed on a transmission line between a signal source and a load. Signal detection means for detecting a travelling wave component and a reflected wave component and for producing outputs corresponding to the absolute value of reflection coefficient .GAMMA., the cosine products .vertline..GAMMA..vertline. cos .theta., and the sine product .vertline..GAMMA..vertline. sin .theta. for controlling an automatic matching means, which includes three matching elements, each having an adjustable short-circuit length, disposed on the transmission line with a separation of odd number multiples of 1/8 of a wavelength along the transmission line. The first and third matching elements are connected such that in response to a change in the short-circulating length of one of the first and third matching elements, the short-circuiting length of the other of the first and third matching elements changes in a corresponding opposite manner.

Abstract: A method of switching a switched-capacitor circuit to reduce signal-dependent distortion resulting from the switching operation. Two single-pole, double-throw switches in the array, having the switched capacitor coupling between to the common terminals thereof, are alternately switched without the use of an intermediate (no-make) state.

Abstract: An ajustable switched capacitor circuit comprises a first stage, a second stage and a switched capacitor circuit coupling the output of the first stage to the input of the second stage. The operating parameters of the second stage are a function of the effective resistance of the switched capacitor coupling circuit. An attenuator interposed between the output of the first stage and the input of the switched capacitor coupling circuit controls the charging voltage of the switched capacitor coupler thereby controlling its effective resistance and parameters of the output stage. The signal loss through the attenuator is continuously adjustable responsive to an external control voltage to obtain continuous control of various output stage parameters. The output stage may comprise a filter having the parameters of its transfer function determined by the effective resistance of the switched capacitor coupling circuit.

Abstract: A matching network matches an output impedance of a generator with an input impedance of a load. The matching network includes a first variable impedance element, a second variable impedance element, a reflected power detector and a control circuit. Each of the first variable impedance elements are constructed using magnetically saturable reactors. For example, each magnetically saturable reactor may be a transformer composed of primary and secondary windings wound around a non-linear ferromagnetic core. The reflected power detector detects power reflected from the matching network to the generator. The control circuit receives from the reflected power detector a signal which represents the changes in reflected power. Using this feedback the control means varies the impedance through the first variable impedance element and the second variable impedance element until the reflected power is negligible.

Abstract: A two-port switched capacitor filter network of the type comprising two input terminals (4, 6), two output terminals (8, 10) and at least three integrator circuits (12, 14, 16) connected therebetween, each integrator circuit including two inputs provided with capacitors which are switched under the control of two disjoint clock states, said integrator circuits being interconnected to constitute a sampling filter having a selected amplitude/frequency response. The two-port network includes two other integrator circuits (36, 38) whose respective inputs are fitted with capacitors switched under the control of two disjoint clock states, said other integrator circuit being interconnected with each other and with the first-mentioned integrator circuits in order to linearize the phase/frequency response of said filter.

Abstract: The filter comprises four operational amplifiers in cascade, with switched capacitors in series at the input of every amplifier, with fixed capacitors in parallel to two of said amplifiers, with fixed and switched capacitors in parallel to the remaining amplifiers, and with fixed and switched capacitors in common to groups of several amplifiers in cascade. According to the invention, a path of fixed and switched capacitors in parallel connects the input of the filter to the input of the fourth amplifier, and a fixed capacitor connects the input of the filter to the input of the second amplifier.

Abstract: The sampled-data band-pass filter device is based on the phenomemon of aliasing, and allows the substantially unattenuated passage of the components of an input signal at a frequency included within an interval comprised between a first frequency (f.sub.sL) and a second frequency (f.sub.sH), arranged around a third frequency (f.sub.sO), while it substantially attenuates the components of the input signal at frequencies outside said interval, and furthermore automatically performs the shift to low-frequency, around a fourth frequency (f.sub.O), of the components of the input signal which have passed without attenuation. According to the invention, the device comprises, as filter element, a sampled-data band-pass filter which employs, as sampling frequency, a fifth frequency (f.sub.s) equal to a whole submultiple of a sixth frequency (nf.sub.s) equal to the sum of the third frequency (f.sub.sO) and the fourth frequency (f.sub.

Abstract: This filter circuit comprises at least one basic cell (2) arranged as a switched capacitor sampling filter, together with a clock suitable for defining two different states for controlling sampling. According to the main characteristic of the invention, the circuit includes upstream switching means (4) suitable for inverting the polarity of the signal input to the cell during one of the two states, and downstream switching means (6) suitable for inverting the output signal from the cell (2). This makes it possible to transpose the filtering frequency band of the cell (2). The circuit is applicable to manufacturing switched capacitor sampling filters in the form of integrated circuits.

Abstract: An integrated, low-pass filter of the first order made using the switched capacitors technique utilizes advantageously a single switched capacitor and only two switches in contrast to the filters of the prior art which utilize two switched capacitors and four switches. The filter of the invention requires a smaller integration area and moreover exhibits a greater precision of its DC gain.

Abstract: A cascaded low pass/high pass filter phase shifter system including: a series of semiconductor switches each having a control electrode and first and second load electrodes; a capacitance connected in series between each control electrode and ground; an inductance connected in series between each second load electrode of one semiconductor switch and the first load electrode of the adjacent semiconductor switch in the series; and means for selectively applying a control signal to each said control electrode for switching the associated semiconductor switch between a first state in which it operates as a low pass filter and a second state in which it operates as a high pass filter to introduce a phase shift in a propagated signal.

Abstract: An automatic impedance adjuster for an MRI system has an impedance adjusting section, an oscillator, a detector, and a controller. The impedance adjusting section is provided to a probe head, and allows variable adjustment of real and imaginary parts of an impedance of the probe head. The oscillator has a predetermined output impedance, and supplies a signal to the probe head. The detector is connected between the probe head and the oscillator, and outputs detection signals respectively corresponding to real and imaginary parts of the impedance of the probe head. The controller supplies a control signal to the impedance adjusting section in response to the signals corresponding to the real and imaginary parts obtained from the detector, and performs control such that the real and imaginary parts of the impedance of the probe head coincide with a predetermined impedance.

Abstract: An automatic impedance adjuster for an MRI system has an impedance adjusting section, an oscillator, a detector, and a controller. The impedance adjusting section is provided to a probe head, and allows variable adjustment of real and imaginary parts of an impedance of the probe head. The oscillator has a predetermined output impedance, and supplies a signal to the probe head. The detector is connected between the probe head and the oscillator, and outputs detection signals respectively corresponding to real and imaginary parts of the impedance of the probe head. The controller supplies a control signal to the impedance adjusting section in response to the signals corresponding to the real and imaginary parts obtained from the detector, and performs control such that the real and imaginary parts of the impedance of the probe head coincide with a predetermined impedance.

Abstract: An audio processor for adaptively rejecting undesired noise and interference in an audio input which includes a variable Q, 10 kHz switched capacitor notch filter. The Q of the notch filter is varied by a control loop responsive to the 10 kHz content of the audio signal. The notch filter includes a summer section that is clocked at a predetermined frequency, and an integrator section which is clocked at a multiple of the predetermined frequency in order to prevent center frequency variation with changes in Q of the notch filter.

Abstract: A biquadrature switched capacitor filter having differential input/output integrator amplifiers (12,34) and switched capacitor networks (16,28,36,40). The differential outputs of one amplifier (12) are crossed and connected to the switched capacitor networks (36,40) of the other amplifier (34) to provide a negative capacitance effect. Feedforward capacitors (70,72) are switched to prevent the stage input signals (IN+, IN-) from being coupled during certain phases of a biphase nonoverlapping clock. In high-pass applications, a feedback capacitor (134, 136) makes positioning of pole and zero responses easy. Amplifier bandwidth is controlled by switched capacitors (148, 152) connected to the amplifiers during certain clock phases.

Abstract: The invention relates to a microprocessor-programmable, universal active filter. The filter has an input section, an operational amplifier with two input nodes, a bandpass section, a lowpass section and control circuitry which, under clock control, periodically brings one of the inputs of the operational amplifier to within a low, d.c. offset voltage, approaching zero volts, of the other input. The output of the lowpass filter section is coupled to the input of the bandpass filter section and the lowpass section also has a feedback loop back to the bandpass section. The selectivity "Q", the gain, center frequency and the output characteristics, such as bandpass, lowpass, allpass, highpass or notch, of the filter may be selected using MOS switches under microprocessor control.

Abstract: Apparatus for automatic tuning of microwave energy in a de-emulsifier system usng a wave guide applicator with impedance matching element wherein microwave energy incident on and reflected from the applicator element is continually monitored to derive an indication of voltage standing wave ratio for input to a computer that controls a servo control motor to position a phase shifter thereby to maintain an optimum voltage standing wave ratio and, therefore, maximum efficiency of emulsion irradiation.

Abstract: In the high-group passband filter of an analog front-end circuit for full-duplex communications, switches enable an all-pass filter, a high-pass filter, and a low-pass filter to be connected in the optimum series for different band assignments, thus improving S/N performance.

Abstract: A method of automatically tuning a high power system by measuring the gardient of component value against efficiency for each component impedance in turn and, for each component, finding two points of equal and opposite efficiency-to-impedance gradient and setting the impedance of the component to a value half-way between these points.

Abstract: The biquad block or cell comprises two operational amplifiers OA1, OA2, eight capacitors C1-C8 and switches comprises switches of reference o and switches of reference e controlled by a clock signal H. The biquad block has six connections P1-P6 and can be used as low-pass, band-pass or high-pass filters, as a function of the connections chosen for the input and output of the signal to be filtered. Switches 46 to 52 make it possible to select one from among several configurations for each filtering function. The different configurations are distinguished by their sensitivities to the gain of the operational amplifiers and to the capacitance ratio. Application to the filtering of signals in the video range (a few megahertz).

Abstract: A switched-capacitor filter of the present invention constituted in the form of a semiconductor integrated circuit has an input circuit which consists of at least one noninversion-type switched-capacitor and at least two inversion-type switched-capacitors that are connected in parallel with each other. The two inversion-type switched-capacitors have different writing timings and reading timings relative to each other. With this setup, capacitances of the switched-capacitors need not be extremely increased even when it is desired to maintain a zero-point frequency of the filter at a very low value. Further, there is no need of providing a circuit such as sample holding circuit which requires extra area and consumes additional electric power.

Abstract: A line equalizer for eliminating a precursor interference component and postcursor interference components from a pulse signal inputted from a transmission line. A precursor equalizer takes a sum of a signal derived from the input pulse signal retarded by a fundamental period and a signal derived from the input pulse signal multiplied by a coefficient a. A decision circuit decides the threshold level of an output pulse signal from the precursor equalizer to output a predetermined signal. A controller controls the coefficient a of the precursor equalizer on the basis of the signal from the decision circuit, etc.

Abstract: An electronic compensation network which allows the analytic and empirical realization of the compensation needed to optimize a system response. The electronic compensation network includes a switched capacitor active filter network; means for selectively changing filter characteristics; and, means for indicating the characteristics of the compensator which produces an optimized system response.

Abstract: An n-th degree switched capacitor filter having transfer characteristics expressed by a transfer function H(Z) can be configured by expanding the transfer function H(Z) to an n-element linear simultaneous state equation of n state voltages inclusive of an output voltage. The coefficients of the linear state equation a.sub.11 to a.sub.n2, b.sub.11 to b.sub.nn are determined in a range within which the filter circuit can be configured by hardware and further each state voltage is below a maximum output voltage. In practice, the filter is configured by plural leapfrog type differential operational amplifiers having base capacitors C.sub.o, plural transmission gates, and plural electric charge transfer capacitors C.sub.T so as to determine each coefficient on the basis of ratios C.sub.T /C.sub.o. The filter is realized by a monolithic integrated circuit (IC) and provided with a higher signal-to-noise (S/N) ratio and a wider dynamic range without deteriorating electrical characteristics and increasing cost.

Abstract: The invention relates to a self-biasing, programmable, universal active filter having an input section which includes an operational amplifier. The amplifier has one output and two input terminals. A first capacitor has one of its terminals coupled to a first of the input terminals of the amplifier and the other terminal serving as an input node to the filter. The second capacitor is coupled between the same input terminal and the output terminal. The filter has a bandpass section having an output and an input coupled to the output terminal of the amplifier. The filter has a low pass section having an output and an input coupled to the output of the bandpass section. The filter has a third capacitor coupled between the first input terminal of the amplifier and the output of the bandpass section.

Abstract: A switched-capacitor filter constituted in the form of a semiconductor integrated circuit has an input circuit which consists of at least one noninversion-type switched-capacitor and at least two inversion-type switched-capacitors that are connected in parallel with each other. The two inversion-type switched-capacitors have different writing timings and reading timings relative to each other. With this setup, capacitances of the switched-capacitors need not be extremely increased even when it is desired to maintain a zero-point frequency of the filter at a very low value. Further, there is no need of providing a circuit such as sample holding circuit which requires extra area and consumes additional electric power.

Abstract: A switched capacitor adaptive line equalizer for use in digital communication system adapted to receive input signals at a plurality of signal rates and to supply equalized output signals. Input signals are sent through a switched capacitor equalizer which includes a low-pass filter in order to control the frequency band of the input signals and a variable gain action which selectively sets a prescribed .sqroot.f characteristic in response to the output of the low-pass filter. A control circuit responsive to the output of the switched capacitor equalizer and the input signal rate selectively adjusts to the characteristic of the switched capacitor equalizer means. Input signals are processed on a time division basis in two channels of the variable gain section, to select the operating characteristic on one of the channels while another operation is performed on the other channel.

Abstract: A filter for second order signals in the frequency domain. A novel switching system is described which permits a single capacitor to serve as both a termination capacitor and a sampling capacitor. A capacitor which has a value equal to the desired value of a sampling capacitor is coupled in a feedback loop of an operational amplifier. This capacitor is summed with another capacitor to result in the desired value of the termination capacitor. The present invention permits the fabrication of second order filters in a smaller silicon area than prior art methods.

Abstract: A synchronous filter for use as a narrow band, band-pass filter comprises a matching circuit receiving a signal to be filtered and supplying that signal to an output connected to filtering paths with switched capacitances connected in parallel. This filter also includes switches for switching the filtering paths, a summing circuit with inputs respectively connected to outputs of the filtering paths and a switch control circuit. Each filtering path has two identical filtering channels, each with a capacitance, connected to the switches. The switching control signals are symmetrical for the two channels of each path and staggered by T/2N. The sampling periods or cycles of the two channels of one path are equal to T/2.

Abstract: Recirculation is prolonged in a broadband microwave loop by flattening the overall frequency response of the loop. A bandpass filter, tuned to the input signal frequency, is placed in the loop after the broadband amplifier. A frequency discriminator responsive to the input signal controls the filter driver.

Abstract: A switched capacitor circuit comprises first and second switches connected in series between an input terminal and a first fixed potential terminal and third and fourth switches connected in series between an output terminal and the first fixed potential terminal. The group of the first and fourth switches and the group of the second and third switches are alternately rendered conducting and nonconducting. Two serial capacitors are connected between the junction of the first and second switches and the junction of the third and fourth switches and one parallel capacitor is connected between the junction of the two serially connected capacitors and the first fixed potential. The common junction of the three capacitors is connected to a second fixed potential terminal through a highly resistive element.

Abstract: A sinusoidal signal generator having a frequency variable as a function of a selection signal applied to the generator. A clock generator (1, 2) is programmable as a function of the selection signal and adapted to provide a plurality of clock signals having variable frequencies. A D/A converter (7) generates from a difference fixed potential (V.sub.ss, V.sub.r), as a function of the clock signals utilized as sampling signals, a step signal having a sinusoidal envelope, of which the fundamental frequency is a function of the selection signal. A low pass filter (10) having transfer function which is dependent on the change in the fundamental frequency of the sinusoidal envelope (as controlled by the clock signals) rejects the harmonics contained in the step signal produced by the convertor (17), and provides a sinusoidal signal having a low harmnonic distortion.

Abstract: A continuous time electrical filter fabricated as an integrated circuit includes capacitors (CF,CN) and resistors (R1,R2). Since capacitors and resistors are difficult to integrate with accurately defined values, a trimming circuit is provided which operates switches (S1-SN) to select appropriate ones of the capacitors (CN) to accurately define the cut-off frequency of the filter. The trimming circuit comprises a capacitor (TC2) which is charged through a resistor TR1 during a first period and which is discharged in incremental steps by capacitor (TC1). The number of incremental steps is counted by a counter (11) and transferred to a register (13). The outputs (S1-SN) of the register (13) control the switches (S1-SN). Alternatively the values of the filter resistors may be adjusted, a convenient procedure being to short out selected portions of the resistors. More than one capacitor or resistor may be adjusted using a single counter and register.

Abstract: A sample-and-hold circuit has an impedance converter, a first switch, an amplifier, an input circuit for receiving an input signal and supplying an output signal corresponding to the input signal to the amplifier, through the impedance converter and the first switching means, output-holding capacitor coupled between the input and output terminals of the amplifier, and a feedback circuit coupled between the output terminal of the amplifier and the input terminal of the impedance converter. The input circuit and the feedback circuit are a first switched capacitor and a second switched capacitor, respectively.

Abstract: This invention comprises two separate topologies for implementing a second order allpass function filter which is vital for equalization of the phase of other arbitrary response magnitude shaping filters. While the allpass response itself does not affect the frequency spectrum of the signal, these topologies have available outputs that have either bandpass or bandstop characteristics. Thus, two types of useful frequency characteristics formed by the filters that have exactly the same resonant frequency and Q (or Quality factor). Using the well known general two amplifier topology to implement a monolithic switched allpass filter with a high Q leads to very high capacitance ratios and hence excessive silicon area in manufacture. Both the topologies described here reduce the required silicon area by either reducing the required capacitance ratios or making the sensitivity to the smallest capacitor extremely small allowing it to violate otherwise necessary area-to-perimeter matching of the capacitor geometries.

Abstract: A waveform converter circuit for producing an output square waveform, having a unity mark/space ratio, from an input sinusoidal waveform which can have a large peak-to-peak amplitude range and a large d.c. voltage level range. The circuit comprises a differential amplifier which receives the input waveform at the inverting input. The output of the amplifier is applied to a D-type flip-flop. The flip-flop Q-output is fed via a switched-capacitor filter to the inverting input to provide a corrected d.c. voltage level for the input waveform at this input. The flip-flop Q-output is fed via a switched-capacitor filter to the non-inverting input to provide a slicing level at this input. When the output square waveform has a 1 to 1 mark/space ratio, the corrected d.c. voltage level equals the slicing level. Thus, the circuit will respond to an input waveform with a small peak-to-peak amplitude in the presence of an initial large d.c. voltage level of the input waveform.