Synchronous Filters Patents (Class 333/173)
  • Patent number: 4636738
    Abstract: A switched capacitor integrator for receiving a single input signal is compensated for parasitic capacitance errors with a minimum amount of circuitry. Although a single-ended amplifier is provided, a differential amplifier input is used which receives equal amounts of parasitic charge to effectively cancel charge errors. The size of the compensating capacitive circuitry may be reduced by making the input parasitic capacitance at one of the inputs proportionately larger so that the noise gain in both positive and negative signal paths remains substantially the same.
    Type: Grant
    Filed: February 3, 1986
    Date of Patent: January 13, 1987
    Assignee: Motorola, Inc.
    Inventors: Alan L. Westwick, Roger A. Whatley
  • Patent number: 4633425
    Abstract: An integrated circuit for filtering signals by having cascaded switched capacitor sampling filters. The circuit includes a transmit section which has an anti-aliasing filter, a core section filter, a highpass filter and an encoder for providing analog-to-digital conversion. Each successive filter is sampled at a lower rate to inhibit anti-aliasing. The circuit also includes a receive section which has a digital-to-analog decoder, an output buffer, a receiver core filter and a power amplifier.
    Type: Grant
    Filed: May 28, 1985
    Date of Patent: December 30, 1986
    Assignee: Intel Corporation
    Inventor: Daniel Senderowicz
  • Patent number: 4626808
    Abstract: An electrical filter circuit for processing analog sampling signals consists of N+1 capacitors interconnected to cyclically circulate N signal charges, the capacitors all being of approximately the same size, and interconnected with an operational amplifier. A plurality of switches are employed, controlled by a clock signal having N+1 phases. Phase controlled switches supply an input signal to the input of the operational amplifier, and provide an output from the filter circuit.
    Type: Grant
    Filed: May 21, 1981
    Date of Patent: December 2, 1986
    Assignee: Siemens Aktiengesellschaft
    Inventor: Josef Nossek
  • Patent number: 4623854
    Abstract: A switched capacitor filter having the same value of capacitance for the integrating capacitor of each filter channel. The use of the same value capacitance results in DC offset voltages for each channel being identical and easy to correct. An input voltage divider network having a separate output tap for each channel causes each channel to have a unique filter transfer function despite the equal value of all integrating capacitors.
    Type: Grant
    Filed: February 20, 1985
    Date of Patent: November 18, 1986
    Assignee: NEC Corporation
    Inventor: Yoshiaki Kuraishi
  • Patent number: 4607231
    Abstract: An equalization circuit with switched capacitor filters, each having variable filter characteristics, that is adapted to provide power equalization on digital transmission lines that are subject to power losses for high frequency signals. The power equalization is provided automatically by switching in or out of a filter one or more of its capacitors in response to detected variations in line power levels. Identical filters are connected in parallel and alternatively applied within the equalizer circuit, the capacitor switching occurring only in a filter circuit that is not actively applied within the equalizer circuit.
    Type: Grant
    Filed: June 6, 1985
    Date of Patent: August 19, 1986
    Assignee: NEC Corporation
    Inventor: Kenji Nakayama
  • Patent number: 4600904
    Abstract: A switched-capacitor high pass filter is disclosed and in which a switched capacitor approximation of an inductor is inserted in the direct coefficient loop to prevent instability. The value of the inductor is selected to compensate for the filter termination phase error.
    Type: Grant
    Filed: June 28, 1984
    Date of Patent: July 15, 1986
    Assignee: Motorola, Inc.
    Inventor: Wayne G. Shumaker
  • Patent number: 4559498
    Abstract: The symmetrical integrator comprises an operational amplifier having two floating inputs and two floating outputs each having a feedback connection to an input via a capacitor. An input capacitor is connected via two MOS transistors to two differential inputs of the integrator or via two additional MOS transistors to the inputs of the operational amplifier. The transfer function of the circuit is a pure integral or a sum of integrals if several input signals are applied to similar pairs of inputs. The integrator permits realization of filters whose transfer function has transmission zeros by utilizing additional inputs together with a direct capacitive coupling.
    Type: Grant
    Filed: September 24, 1982
    Date of Patent: December 17, 1985
    Assignee: Societe pour l'Etude et la Fabrication de Circuites Integres Speciaux E.F.C.I.S.
    Inventor: Boris Sokoloff
  • Patent number: 4558292
    Abstract: A low pass filter which comprises first, second and third switched capacitor circuits connected to a power source V.sub.DD and/or a power source V.sub.SS, first and second operational amplifiers driven by the power sources V.sub.DD and V.sub.SS, and a bias circuit connected between the power sources V.sub.DD and V.sub.SS for providing a bias voltage to the non-inverting input terminals of the first and second amplifiers.
    Type: Grant
    Filed: July 2, 1982
    Date of Patent: December 10, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Itsuo Sasaki, Kenji Matsuo
  • Patent number: 4551683
    Abstract: Disclosed is a switched capacitor filter circuit employing the equivalent resistance of a switched capacitor circuit as the resistive element in a frequency dependent impedance converting circuit.
    Type: Grant
    Filed: November 17, 1983
    Date of Patent: November 5, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kenji Matsuo, Shouji Abou
  • Patent number: 4550295
    Abstract: A switched capacitor integrator is comprised of an operational amplifier, a feedback capacitor connected between the inverting input terminal and the output terminal of the amplifier, a bias circuit for applying a given voltage to the non-inverting input terminal of the amplifier, a switched capacitor, and a switch circuit which connects the switched capacitor between the signal input terminal applied with an input voltage signal and the inverting input terminal of the amplifier in a first operation mode and short-circuits the switched capacitor in a second operation mode.
    Type: Grant
    Filed: September 5, 1984
    Date of Patent: October 29, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Itsuo Sasaki
  • Patent number: 4543546
    Abstract: A circuit for monolithic or film stratum is adapted to have circuit capacitances integrated therein and having a minimum unit capacitance (MUC), or smallest practical capacitance that can be fabricated therein. Circuits are provided that have in one circuit arm a capacitor having a first capacity and in a second circuit arm a number N of series connected switched capacitors having a second or terminal capacity, or effective capacity between the end terminals of the second arm, that is less than the first capacity. The first capacity and second capacity form a ratio R, which is the factor by which the first capacity is greater than the second capacity. Switching is provided for each plate of each of the series connected capacitors and at the end terminals of the second arm to alternately connect the second arm into the circuit and to discharge the series connected capacitors which minimizes the effects of parasitic capacitances.
    Type: Grant
    Filed: April 20, 1983
    Date of Patent: September 24, 1985
    Assignee: Magnavox Government and Industrial Electronics Company
    Inventor: Peruvamba R. Hariharan
  • Patent number: 4531106
    Abstract: A switched capacitor biquadratic filter (10; 20) includes means for dynamically shifting the level of the input voltage (V.sub.B, V.sub.D ; V.sub.X, V.sub.Y,) of the amplifiers (12, 14), so that the need for a level shifting stage in the amplifiers (12; 14) is eliminated. The normally grounded nodes associated with the input ports of the amplifiers (12; 14) are set to a reference voltage (V.sub.B, V.sub.D ; V.sub.X, V.sub.Y) which shifts the inputs to a level appropriate to result in an analog grounded voltage at the outputs of the amplifiers. Internal level shifting stages are thereby eliminated from the amplifiers (12; 14). This gives the filter (10, 20) a broader operating frequency range.Also disclosed is a particular design for the amplifiers (12, 14) which includes a folded cascode mirror configuration.
    Type: Grant
    Filed: October 4, 1983
    Date of Patent: July 23, 1985
    Assignee: AT&T Technologies, Inc.
    Inventor: Apparajan Ganesan
  • Patent number: 4524425
    Abstract: A sampled first order high pass filter having a configuration that eliminates the output offset voltage normally associated with known filters of this general type. It is constructed according to the diagram of the accompanying figure with two operational amplifiers, four capacitors and eight switches actuated at each period in two separate phases a and b. The filter is particularly useful in digital telephone transmission. The filter is placed just up-stream of an analog-digital converter sampled at the same frequency as the filter and the second amplifier serves as a comparator for conversion outside the phases a and b.
    Type: Grant
    Filed: January 10, 1983
    Date of Patent: June 18, 1985
    Assignee: Societe Pour L'etude et la Fabrication des Circuits Integres Speciaux E.F.C.I.S.
    Inventor: Jean C. Bertails
  • Patent number: 4521750
    Abstract: A time constant circuit capable of switching the characteristic, which is realized by a combination of an equivalent resistor made up of a switched capacitor and an ordinary capacitor, comprises a capacitor of the switched capacitor or the time constant circuit connected in parallel to a series circuit including a switching device and an additional capacitor. The characteristic is switched by turning on and off the additional capacitor by the switching device. The direct connection of a plurality of equivalent resistors with a plurality of switched capacitors and ordinary capacitors makes up an equalizer. The capacitor making up a switched capacitor is connected with a switching device and an additional capacitor so that the frequency characteristic of the equalizer is switchable by turning on and off the switching device. Each of the capacitors making up the switched capacitors, the capacitors making up the time constant circuits and the additional capacitors has an end thereof grounded.
    Type: Grant
    Filed: April 7, 1983
    Date of Patent: June 4, 1985
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering, Ltd.
    Inventors: Isao Fukushima, Kazuyoshi Kuwahara, Keiichi Itoigawa, Yasunori Kobori, Hideo Nishijima
  • Patent number: 4520283
    Abstract: A switched capacitor circuit has: first and second power sources; an operational amplifier driven by the power sources; a feedback capacitor connected to the inverting input terminal and the output terminal of the amplifier; a switched capacitor connected between a signal input terminal which receives an input signal voltage and the inverting input terminal of the amplifier; switching circuits for controlling the charging and discharging operations of the switched capacitor; and a bias circuit which is connected between the power sources and which applies a predetermined voltage to the non-inverting input terminal of the amplifier.
    Type: Grant
    Filed: July 2, 1982
    Date of Patent: May 28, 1985
    Inventors: Itsuo Sasaki, Hiroaki Suzuki
  • Patent number: 4518935
    Abstract: Band-rejection filter of the switched capacitor type in which at least one unwanted frequency component present in an information signal must be suppressed. To that end this filter comprises and adding circuit 4 to which the information signal is applied via a switching device 3 and a feedback signal via a switching device 5. Both switching devices are controlled by a first control signal consisting of a sequence of control signal periods of a duration T.sub.s which are each divided into a tracking phase and into an interrupt phase. During the tracking phase the signal can pass uninterruptedly through the switching device, while during the interrupt phase signals are not allowed to pass. The output of adding circuit 4 is coupled inter alia via a switching device 8 to the input of a bandpass filter 9 whose passband at least coincides with the unwanted frequency component.
    Type: Grant
    Filed: September 26, 1983
    Date of Patent: May 21, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Arthur H. M. van Roermund
  • Patent number: 4518936
    Abstract: A commutating filter circuit producing only the fundamental frequency and odd harmonics of an input signal comprises first and second commutating filters each connected to receive the input signal and coupled to pass an output signal to the non-inverting and inverting terminals, respectively, of a differential amplifier. The first filter comprises N stages, each having a time constant of RC and a filter sampling frequency of f.sub.1. The second filter comprises N/2 stages, each having a time constant of 2RC and a filter sampling frequency of 2f.sub.1. The resultant signal from the differential amplifier contains only the fundamental frequencies and odd harmonics of the input signal.
    Type: Grant
    Filed: November 14, 1983
    Date of Patent: May 21, 1985
    Assignee: RCA Corporation
    Inventor: Eldon M. Sutphin, Jr.
  • Patent number: 4513265
    Abstract: A circuit having an inductive characteristic for the realization of filters in integrated circuits is constructed solely from switched capacitors and an operational amplifier. The circuit is provided between a first and a second terminal with a first capacitor in series with at least one switch. The switch is capable either of connecting the first capacitor between said two terminals or of isolating said capacitor from the first terminal. The circuit further comprises an operational amplifier having a feedback path between its output and its input via a second capacitor, and additional switches for transferring charges from the input of the circuit to the first capacitor and then from the first capacitor to the second capacitor, then again from the second capacitor to the first capacitor. Under these conditions, the circuit exhibits the characteristics of an inductance.
    Type: Grant
    Filed: September 24, 1982
    Date of Patent: April 23, 1985
    Assignee: Societe Pour L'Etude Et La Fabrication De Circuits Integres Speciaux - E.F.C.I.S.
    Inventor: Boris Sokoloff
  • Patent number: 4511851
    Abstract: A method and apparatus for obtaining small fractional units of capacitance in amplifier circuits using units of capacitance which may be accurately ratioed is provided. Several embodiments are disclosed in which an input voltage is sampled onto two input capacitances with an opposite charge polarity. The two input capacitances are assigned capacitive values so that the second capacitive value is a fractional percentage of the first capacitive value. However, the effective total input capacitance is made to appear to be equal to the differential capacitive value which may be made a small fractional unit of capacitance.
    Type: Grant
    Filed: December 13, 1982
    Date of Patent: April 16, 1985
    Assignee: Motorola, Inc.
    Inventor: Henry Wurzburg
  • Patent number: 4508982
    Abstract: A pair of fixed capacitors are connected across a pair of serially coupled switched capacitors, the junction of the fixed capacitors being coupled to the floating node of the switched capacitors. As the polarities of the switched capacitors are switched, the fixed capacitors cause a partial discharge, thereby preventing charge from accumulating on the node.
    Type: Grant
    Filed: September 29, 1982
    Date of Patent: April 2, 1985
    Assignee: GTE Laboratories Incorporated
    Inventors: Christopher W. Kapral, Michael Cooperman
  • Patent number: 4498063
    Abstract: In a switched capacitor filter of a first-order responsive to a filter input signal for producing a filter output signal by carrying out sampling operation at a predetermined sampling rate by the use of switching circuit, a capacitor, and an integrating circuit, a voltage divider produces a voltage divided signal in response to the filter input signal to reduce a total capacitance determined by capacitances of the capacitor and the integrating circuit. The voltage divided signal is sampled by the switching circuit to be sent to the integrating circuit at the sampling rate through the capacitor. The integrating circuit produces the filter output signal as a result of integration. In addition, an additional switched capacitor filter of a first-order is connected in cascade to the filter to form a switched capacitor filter of a second-order.
    Type: Grant
    Filed: January 17, 1983
    Date of Patent: February 5, 1985
    Assignees: Nippon Electric Co., Ltd., Nippon Telegraph & Telephone Public Corporation
    Inventors: Takayoshi Makabe, Yoshiaki Kuraishi, Kenji Nakayama, Tadakatsu Kimura
  • Patent number: 4494082
    Abstract: An equalizer for non-loaded telephone lines comprises an active switched-capacitor biquadratic filter including two differential amplifiers. An unswitched capacitor connected between the output and inverting input of one amplifier is variable to vary the equalizer response, the output being derived from the output of the other amplifier. One or more through-switched input capacitors can be simultaneously variable to provide a fixed equalizer gain at a predetermined frequency. The variable capacitors are constituted by fixed capacitors selectively switched in parallel with one another.
    Type: Grant
    Filed: August 25, 1982
    Date of Patent: January 15, 1985
    Assignee: Northern Telecom Limited
    Inventor: Jeffrey H. Bennett
  • Patent number: 4484089
    Abstract: Many signal processing applications of practical importance (for example, continuous-signal filtering) require high-precision temperature-insensitive transconductance elements. In accordance with one feature of this invention, a reference transconductance element is included in a control loop. The element consists of a MOSFET device or a MOSFET circuit in the loop. In the loop, the transconductance of the reference element is determined solely by the value and switching period of a switched-capacitor. The transconductance of the element is in effect thereby precisely matched against the conductance of the switched-capacitor.As the temperature of the chip varies, a control voltage is generated in the loop to maintain the transconductance of the reference element constant. This same control voltage is applied to other similar elements included in circuits (for example, filters) on the chip. In that way, the transconductances of these other elements are also matched to that of the switched-capacitor.
    Type: Grant
    Filed: August 19, 1982
    Date of Patent: November 20, 1984
    Assignee: AT&T Bell Laboratories
    Inventor: Thayamkulangara R. Viswanathan
  • Patent number: 4481642
    Abstract: An integrated circuit FSK transmitter and receiver combination form a modem for receiving and transmitting FSK signals. The FSK transmitter has a square wave generator for providing a clock output at a "mark" frequency or at a "space" frequency within a first frequency band. This clock output is shaped through a band pass filter, shared with the FSK receiver, to provide an FSK output signal which is output through a low pass filter. The input FSK signal is received through a low pass filter and then filtered through the band pass filter. One section of the band pass filter accommodates the clock output while another section accommodates the FSK input. The band pass filter is connected to a demodulating means to provide a filtered sine wave thereto at either a mark or a space frequency within a second frequency band. The demodulating means determines whether the sine wave is at a mark or a space frequency.
    Type: Grant
    Filed: June 2, 1981
    Date of Patent: November 6, 1984
    Assignee: Texas Instruments Incorporated
    Inventor: Kerry A. Hanson
  • Patent number: 4476448
    Abstract: A switched capacitor MOS high-pass filter (10) includes a blocking capacitor (C.sub.1) which accepts an input signal at one side (IN). A first electronic toggle switch (S.sub.1) connects the gate of a depletion-mode buffer transistor (T.sub.1) alternately to the other side of the blocking capacitor (C.sub.1) and to ground in response to a pair of non-overlapping switching pulse trains (.phi..sub.1), (.phi..sub.2). A depletion-mode transistor (T.sub.2) provides current to the buffer transistor (T.sub.1). One side of an output capacitor (C.sub.2) is connected to the source of the buffer transistor (T.sub.1). A second toggle switch (S.sub.2) connects the other side of the output capacitor (C.sub.2) alternately to an output terminal (OUT) and to ground.Also disclosed is a filter (14) which includes a correction network (18) to eliminate from the output signal the effect of a feed-through error voltage generated by the action of the first switch (S.sub.1).
    Type: Grant
    Filed: September 2, 1982
    Date of Patent: October 9, 1984
    Assignee: AT&T Bell Laboratories
    Inventor: Veikko R. Saari
  • Patent number: 4455539
    Abstract: A switched capacitor all pass filter which provides an output signal having substantially linear magnitude and phase response is provided. A transfer function which represents an all pass filter and which has a predetermined phase response is provided. A filter/phase equalizer structure having integrating operational amplifiers and various feedback portions which represent the transfer function is also provided.
    Type: Grant
    Filed: August 13, 1982
    Date of Patent: June 19, 1984
    Assignee: Motorola, Inc.
    Inventor: Henry Wurzburg
  • Patent number: 4453143
    Abstract: An equalizer for loaded telephone lines comprises a switched-capacitor summing amplifier which sums the input to and output from the filter in proportions which vary with the capacitances of two variable capacitors. The variable capacitors are constituted by a plurality of fixed capacitors which are switched to form part of one varibale capacitor or the other, so that the sum of the capacitances of the variable capacitors is constant.
    Type: Grant
    Filed: August 25, 1982
    Date of Patent: June 5, 1984
    Assignee: Northern Telecom Limited
    Inventor: Jeffrey H. Bennett
  • Patent number: 4453258
    Abstract: An integrated circuit automatic gain control circuit maintains an alternating input signal at a predetermined amplitude. A ladder network of capacitors and accompanying FET switches provides for varying the gain of an integrated switched capacitor filter. The output signal from the filter is compared in a comparison circuit, the comparison circuit providing an UP signal if the output signal is too small or a DOWN signal if the output signal is too large. The UP and DOWN signal is applied to a ROM which causes a counter to count up or down in response to the UP or DOWN input signal, the counter inputting the ROM to provide control signals from the ROM for controlling the switches of the capacitor ladder network.
    Type: Grant
    Filed: June 2, 1981
    Date of Patent: June 5, 1984
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C. Richardson
  • Patent number: 4446438
    Abstract: A switched capacitor N-path filter in which all capacitors that introduce delay in the paths, in that they have memory and are characterized such that the new charge flow into each such capacitor during each commutation cycle depends on the old charge on it from the previous commutation cycle, are replaced with an associated plurality of N-commutating capacitors.
    Type: Grant
    Filed: October 26, 1981
    Date of Patent: May 1, 1984
    Assignee: GTE Automatic Electric Incorporated
    Inventors: Chieh Chang, Man S. Lee
  • Patent number: 4439693
    Abstract: The auto-zeroing technique of this invention comprises two steps. In the first step, the differential amplifier output and negative input are shorted together and the resulting amplifier offset output voltage is stored across an input capacitor and a feedback capacitor, the input capacitor being connected between the amplifier negative input and a voltage source to be sampled and the feedback capacitor being connected between the amplifier negative input and ground. In the second step, the direct connection between the amplifier output and negative input is removed and the feedback capacitor is reconnected between the amplifier output and negative input in a feedback loop. At this time, a voltage of the same magnitude and opposite polarity as the original amplifier offset output voltage is applied as negative feedback across the amplifier, so that the amplifier offset output voltage is precisely zeroed. In an alternative embodiment, the connection and reconnection steps are performed at a frequency f.sub.
    Type: Grant
    Filed: October 30, 1981
    Date of Patent: March 27, 1984
    Assignee: Hughes Aircraft Co.
    Inventors: Charles H. Lucas, Lanny L. Lewyn
  • Patent number: 4405908
    Abstract: A filter circuit comprising a charge transfer device of the type which includes first and second sets of charge storage devices, such as capacitors, the first and second sets of charge storage devices being supplied with first and second clock signals, respectively, and further including first and second sets of switches which are actuated in response to the first and second clock signals, respectively, each switch being operable, when actuated, to transfer charge between a charge storage device in one set and a charge storage device in the other set, thereby transferring a charge through succeeding switches to be temporarily stored in succeeding charge storage devices. A semiconductor element, such as a transistor, is actuated in response either to the first or to the second clock signals for transferring the charge stored in a first predetermined charge storage device to a second predetermined charge storage device.
    Type: Grant
    Filed: April 17, 1981
    Date of Patent: September 20, 1983
    Assignee: Sony Corporation
    Inventor: Mitsuo Soneda
  • Patent number: 4393356
    Abstract: A filter circuit for electrical waves including at least one line which supplies electrical input waves and at least one line for withdrawing output electrical waves and in which the frequency dependent transmission characteristic is determined by coupled line loops each of which is in the form of a line ring and wherein coupling between the line loops is unidirectional and the individual line loops are designed so that they have unidirectional transmission characteristics.
    Type: Grant
    Filed: May 21, 1980
    Date of Patent: July 12, 1983
    Assignee: Siemens Aktiengesellschaft
    Inventor: Friedrich L. Kuenemund
  • Patent number: 4383228
    Abstract: High-pass, low-pass and band-pass filters are obtained by combining switched-capacitance integrating networks.
    Type: Grant
    Filed: December 9, 1980
    Date of Patent: May 10, 1983
    Assignee: Telecommunications Radioelectriques et Telephoniques T.R.T.
    Inventor: Jean Gaillard
  • Patent number: 4378538
    Abstract: The present invention relates to an assembly for filtering by switching, comprising at least one filter with switched paths and means for applying to each of the filters signals for controlling switching of the paths, said assembly further comprising means for memorizing the output signal of the filter and a mixer circuit whose input receives at a given instant the signal to be filtered; a second input receives at this instant the memorized value which the output signal had, an instant earlier, separated from the instant in question by a whole number of periods of the useful component of the input signal. The invention is applicable to harmonic analysis, telecommunications, filtering of composite signals.
    Type: Grant
    Filed: June 27, 1980
    Date of Patent: March 29, 1983
    Assignee: Commissariat A l'Energie Atomique
    Inventor: Michel Gignoux
  • Patent number: 4370632
    Abstract: An operational amplifier capable of selectively performing a variety of circuit functions is provided. A single operational amplifier utilizes switched capacitors for sampling and holding an input signal, for establishing a low frequency pole, for applying the sample to an output capacitance to charge the capacitance and for comparing the input signal with a reference. The multi-function circuit provides a large savings in circuit area and permits versatility of circuit applications. One embodiment of the invention is to utilize a companding DAC having a capacitor array which may be used as the output capacitance of the operational amplifier circuit. The DAC provided utilizes an R ladder DAC coupled directly to a C DAC and has a switching structure that is simpler than comparable prior art circuits. The DAC is asynchronous and has programmable A-and Mu-255 law PCM conversion capability.
    Type: Grant
    Filed: May 8, 1981
    Date of Patent: January 25, 1983
    Assignee: Motorola, Inc.
    Inventors: Robert N. Allgood, Stephen H. Kelley, Richard W. Ulmer, Henry Wurzburg
  • Patent number: 4366455
    Abstract: A switched-capacity amplifier formed from integrated capacities has undesirable parasitic capacities that are large and variable on only one terminal of each of the capacities. A voltage-follower stage is connected to this terminal of each of the capacities (except those capacities which are grounded) to offset the parasitic capacity. The amplifier is also connected in a switched-capacity filter and a charge-transfer filter.
    Type: Grant
    Filed: November 5, 1980
    Date of Patent: December 28, 1982
    Assignee: Thomson-CSF
    Inventor: Jean L. Berger
  • Patent number: 4366456
    Abstract: A switched capacitor filter having at its input, a signal converter for creating so-called 100% sample and hold signals. The signal converter comprises a plurality of switched capacitors. The switched capacitors, connected in parallel with each other, receive the same successive input signals and supply the so-called 100% sample and hold input signals to the switched-capacitor filter. The switched capacitors, on one hand, charge each of said input signals sequentially and, on the other hand, alternately discharge the respective stored input signals one by one.
    Type: Grant
    Filed: June 4, 1980
    Date of Patent: December 28, 1982
    Assignees: Fujitsu Limited, Nippon Telegraph & Telephone Public Corporation
    Inventors: Norio Ueno, Seiji Kato, Atsushi Iwata
  • Patent number: 4365217
    Abstract: A switched capacity filter having capacities formed by MOS technology on a semiconductor substrate. The connection between two capacities whose first plates are formed by the semiconductor substrate are periodically connected by providing transfer of charges in the substrate on which these two capacities are integrated. The external or other plate of each capacity receives, the input voltage, or a reference voltage, or the surface potential under another capacity which is provided by a reinjection and reading device formed from a diode and a voltage follower stage.
    Type: Grant
    Filed: November 24, 1980
    Date of Patent: December 21, 1982
    Assignee: Thomson-CSF
    Inventors: Jean L. Berger, Jean L. Coutures
  • Patent number: 4356464
    Abstract: The invention relates to a filter for electric signals consisting of switches, capacitors and amplifiers, wherein at least one switch is designed in the manner of voltage reversal switches such that the voltage at the switch terminals, subsequent to activation of the switch, is equally great in amount, but oppositely directed relative to the voltage prior to actuation of the switch. It is the object of the invention to utilize, in such filter circuits, electronic components which are as simple as possible and to fashion their design as freely as possible. In accordance with the invention this object is achieved by virtue of the fact that the voltage connected to the switch terminals (11, 12), in a first clock pulse phase (1), is intermediately stored via a first amplifier (V1) on a capacitor (C.sub.s), and, in a second clock pulse phase (2), via a second amplifier (V2), this voltage is again impressed in inverted form on the switch terminals (11, 12). (FIGS. 1, 3, 4).
    Type: Grant
    Filed: May 15, 1980
    Date of Patent: October 26, 1982
    Assignee: Siemens Aktiengesellschaft
    Inventor: Alfred Fettweis
  • Patent number: 4355303
    Abstract: A receiver for a distribution network power line carrier communication system is magnetically coupled to a distribution power line. A carrier signal, phase-shift keyed modulated by an information signal and carried by the distribution power line, is thereby coupled to the receiver circuitry. A first receiver amplification circuit includes an automatic gain control circuit, to prevent saturation of the receiver electronics, and a feedback circuit to determine the gain. The automatic gain control circuit utilizes a field effect transistor which cooperates with the amplifier's feedback circuit to modify the gain. The drain source resistance of the field effect transistor is varied in accord with the magnitude of the received noise or modulated carrier signal to lower the amplifier's gain when excessive positive or negative noise or modulated carrier signal peaks are encountered. The modulated carrier signal is then processed through several filter stages and further amplified.
    Type: Grant
    Filed: April 9, 1981
    Date of Patent: October 19, 1982
    Assignee: Westinghouse Electric Corp.
    Inventors: John S. Phillips, Waymon A. Melvin, Jr.
  • Patent number: 4354169
    Abstract: An easily integratable switched-capacitor filter circuit which can be employed to simulate a parallel resonance circuit has an operational amplifier having an inverting input connected to a first circuit node through a first switch, a capacitor interconnected between the first circuit node and a reference potential, a third switch interconnected between the first circuit node and a second circuit node, a capacitor interconnected between the second circuit node and the reference potential, a third switch interconnected between the second circuit node and the output of the operational amplifier, a fourth switch interconnected between the output of the operational amplifier and the first circuit node, and a fifth switch interconnected between the first circuit node and a non-grounded input terminal.
    Type: Grant
    Filed: January 7, 1981
    Date of Patent: October 12, 1982
    Assignee: Siemens Aktiengesellschaft
    Inventor: Josef Nossek
  • Patent number: 4353044
    Abstract: A switched-capacitor filter circuit having at least one simulated inductor and having a resonance frequency which is one-sixth of the sampling frequency as pulse-controlled switches co-operatively operable for connecting a first capacitor to a pair of input terminals during a first clock phase and simultaneously connecting a second capacitor to the output of an inverting integration circuit, followed by discharge of the first capacitor to a capacitor in the integration circuit during a second clock pulse phase, followed by a third clock pulse phase during which the first capacitor is charged from the output of the integration circuit and the second capacitor is simultaneously connected to the pair of input terminals and during a fourth clock pulse phase the second capacitor discharges to the capacitor in the integration circuit.
    Type: Grant
    Filed: January 7, 1981
    Date of Patent: October 5, 1982
    Assignee: Siemens Aktiengesellschaft
    Inventor: Josef Nossek
  • Patent number: 4344050
    Abstract: A switched capacitor filter is designed utilizing two parallel switched capacitor charge pumps. These two, parallel charge pumps operate out of phase with each other, thereby allowing charging of a storage capacitor at a rate equal to twice the clock frequency, thereby decreasing incremental voltage steps during the charging of the storage capacitor.
    Type: Grant
    Filed: September 22, 1980
    Date of Patent: August 10, 1982
    Assignee: American Microsystems, Inc.
    Inventor: Kent R. Callahan
  • Patent number: 4336513
    Abstract: Apparatus for reducing the fundamental and harmonic frequencies of hum in a signal comprising means for placing a plurality of signal storage means between an input to which the signal is applied and an output in repeated sequence that is synchronous with the fundamental frequency of hum in such manner as to subtract the amount of signal stored from the signal passing between the input and output. The storage means are in a charging circuit having a time constant such that it requires a number of sequences to build the signal stored to its full amplitude.
    Type: Grant
    Filed: July 2, 1980
    Date of Patent: June 22, 1982
    Assignee: Hewlett-Packard Company
    Inventor: Richard J. Regan
  • Patent number: 4333064
    Abstract: A switched-capacitor filter provided with, at its input stage, a prefilter comprised only of a plurality of additional switched capacitors together with a switched capacitor common to the switched-capacitor filter. The switched capacitor common to the switched-capacitor filter is driven by primary clock pulses having a period T, while the additional switched capacitors are sequentially driven by secondary clock pulse groups. Each of the secondary clock pulse groups has the same period T, and the phases of the second clock pulse groups are shifted by T/2.sup.k, 2T/2.sup.k, 3T/2.sup.k . . . (2.sup.k -1)T/2.sup.k with respect to the first clock pulses (k is a positive integer). The sampled and held signals in the switched capacitors are supplied synchronously to the switched-capacitor filter.
    Type: Grant
    Filed: May 23, 1980
    Date of Patent: June 1, 1982
    Assignees: Fujitsu Limited, Nippon Telegraph & Telephone Public Corporation
    Inventors: Seiji Kato, Norio Ueno, Mitsuo Kakuishi, Akihiko Ito, Atsushi Iwata
  • Patent number: 4322697
    Abstract: The subject sampling filter employs fractional period displacement of samples to force additional nulls in the filter characteristic response. This sampling method and cascading antialiasing filters provides a filter structure which minimizes the complexity of the circuit yet which provides great flexibility to implement a desired filter characteristic.
    Type: Grant
    Filed: July 8, 1980
    Date of Patent: March 30, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Robert L. Carbrey
  • Patent number: 4320362
    Abstract: In a filter in which, in order to obtain the desired filter characteristic, a weighted sum of different signals is formed, it is proposed in accordance with the invention that for the formation of said sum means are employed which are constituted by capacitor circuits, which during a first time interval are each charged by said signals, and by a connection circuit for the formation, during a second time interval, of the equivalent of a single capacitor across whose plates the weighted-sum signal appears.The invention is used for the filtration of sampled analog signals.
    Type: Grant
    Filed: July 18, 1979
    Date of Patent: March 16, 1982
    Assignee: Telecommunications Radioelectriques et Telephoniques T.R.T.
    Inventors: Maurice G. Bellanger, Jean Gaillard
  • Patent number: 4319207
    Abstract: In a switching follower filter of the narrow-band-pass type having n switched paths for filtering a signal having a useful component of variable frequency associated with a high background noise, the fundamental frequency of the input signal is captured and then followed by collecting a pre-filtered switching synchronization signal so that part of the input signal remains in the pre-filtered signal.
    Type: Grant
    Filed: January 30, 1980
    Date of Patent: March 9, 1982
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Michel Gignoux
  • Patent number: 4315227
    Abstract: Because of the very large variety of useful filter configurations, it is highly desirable to have a generalized circuit topology from which all specific filters can be derived. A generalized switched-capacitor biquadratic active filter comprises a pair of operational amplifiers (10, 11), each of which has an unswitched feedback capacitor (D, B) connected between its output port (3, 3') and its inverting input port (1, 1'). A third through-switched capacitor (C) provides feedback between the output port (3') of the second amplifier (11) and the inverting input port (1) of the first amplifier (10). A diagonally-switched capacitor (A) couples the output port (3) of the first amplifier (10) to the inverting input port (1') of the second amplifier (11). The noninverting input ports (2, 2') of the two amplifiers are connected to signal ground.
    Type: Grant
    Filed: December 5, 1979
    Date of Patent: February 9, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Paul E. Fleischer, Kenneth R. Laker
  • Patent number: 4313096
    Abstract: Switched capacitor topologies currently in use are susceptible to the deleterious effects of the parasitic capacitances associated with the switches. Topologies that are immune to these effects are disclosed. A first such embodiment comprises a first switch (22, 32), a capacitor (23, 33), and a second switch (24, 34) connected in series between one input terminal (1) and one output terminal (3) of the network. Third and fourth switches (26, 35 and 27, 36) are connected between the junctions (98, 42 and 99, 43) of the capacitor and the first and second switches, respectively, and the common junction (97, 41) of the second input and second output terminals (2, 4). A second embodiment is also disclosed.
    Type: Grant
    Filed: November 19, 1979
    Date of Patent: January 26, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Paul E. Fleischer