Element In Layers Piled Or Stacked Between Terminals Patents (Class 338/204)
  • Patent number: 10692632
    Abstract: Resistors and a method of manufacturing resistors are described herein. A resistor includes a resistive element and a plurality of conductive elements. The plurality of conductive elements are electrically insulated from one another via a dielectric material and thermally coupled to the resistive element via an adhesive material disposed between each of the plurality of conductive elements and a surface of the resistive element. The plurality of conductive elements is coupled to the resistive element.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: June 23, 2020
    Assignee: VISHAY DALE ELECTRONICS, LLC
    Inventors: Clark Smith, Todd Wyatt
  • Patent number: 9711265
    Abstract: A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: July 18, 2017
    Assignee: ROHM CO., LTD.
    Inventors: Kenichi Harada, Masaki Yoneda
  • Patent number: 8987864
    Abstract: There is provided an array type chip resistor including: a chip body, four pairs of lower electrodes disposed on both sides of a lower surface of the chip body and formed so as to be extended to edges of the chip body, side electrodes formed so that the lower electrodes are extended to sides of the chip body, and a resistor interposed between the lower electrodes on the lower surface of the chip body and electrically connected to the lower electrode through a contact portion, wherein when a width of the side electrode is defined as d1, a distance between adjacent side electrodes is defined as d2, and a height of the side electrode is defined as h, in the case in which d1/d2 is 0.5 to 1.5, a value of h is 4,300/d1 ?m or above and is 0.24d2+87.26 ?m or less.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Il Kim, Ha Sung Hwang, Hae In Kim, Ichiro Tanaka, Oh Sung Kwon
  • Publication number: 20140354396
    Abstract: [Subject] To provide a chip resistor free from chipping of corner portions thereof and a method of producing the chip resistor. [Solution] The chip resistor (1) includes: a board (2) having a device formation surface (2A), a back surface (2B) opposite from the device formation surface (2A) and side surfaces (2C-2F) connecting the device formation surface (2A) to the back surface (2B), a resistor portion (56) provided on the device formation surface (2A), a first connection electrode (3) and a second connection electrode (4) provided on the device formation surface (2A) and electrically connected to the resistor portion (56), and a resin film (24) covering the device formation surface (2A) with the first connection electrode (3) and the second connection electrode (4) being exposed therefrom. Intersection portions (11) of the board (2) along which the back surface (2B) intersects the side surfaces (2C-2F) each have a rounded shape.
    Type: Application
    Filed: December 18, 2012
    Publication date: December 4, 2014
    Inventors: Eiji Nukaga, Hiroshi Tamagawa, Yasuhiro Kondo, Katsuya Matsuura
  • Publication number: 20130335190
    Abstract: A method and article of manufacture of intermixed tunable resistance composite materials. A conducting material and an insulating material are deposited by such methods as ALD or CVD to construct composites with intermixed materials which do not have structure or properties like their bulk counterparts.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 19, 2013
    Inventors: Jeffrey W. ELAM, Anil U. Mane
  • Publication number: 20130328660
    Abstract: An electric power resistor has a stack of a plurality of resistor plates of metal. Each resistor plate has at least one meandering structure which is formed by a plurality of alternately mutually connected transverse webs. Resistor plates following one another in the stack direction are rotated by 90° with respect to one another.
    Type: Application
    Filed: December 1, 2011
    Publication date: December 12, 2013
    Applicant: VISHAY ELECTRONIC GmbH
    Inventors: Bertram Sshott, Otto Hampl
  • Publication number: 20130207770
    Abstract: A resistance component includes a stack of ceramic layers and inner electrodes. Inner electrodes of a first type are electrically conductively connected to a first external contact and inner electrodes of a second type are electrically conductively connected to a second external contact. The inner electrodes of the first type are arranged such that there is no overlap with the inner electrodes of the second type. An inner electrode of a third type, which is electrically conductively connected neither to the first external contact nor to the second external contact, at least partially overlaps the inner electrodes of the first type and the inner electrodes of the second type.
    Type: Application
    Filed: August 31, 2011
    Publication date: August 15, 2013
    Applicant: EPCOS AG
    Inventor: Franz Rinner
  • Patent number: 8484832
    Abstract: There is provided a method of producing a printed circuit board incorporating a resistance element capable of adjusting resistance after the resistance element has been formed and assuring a high accurate resistance. A method of producing a printed circuit board incorporating a resistance element using carbon paste includes the steps of: forming through holes 5, 6, 25 and 26 or a bottomed hole in a double-sided copper clad laminate; applying noble metal plating into the through hole or the bottomed hole; filling the through hole or the bottomed hole with carbon paste; subjecting the carbon paste with which the thorough hole or the bottomed hole is filled to noble metal plating, conducting treatment and plating to form a conductive layer; forming an opening 18 in the conductive layer on the end of the through hole filled with the carbon paste; and performing trimming through the opening to adjust the resistance of the resistor formed by the carbon paste.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: July 16, 2013
    Assignee: Nippon Mektron, Ltd.
    Inventor: Garo Miyamoto
  • Patent number: 8193898
    Abstract: A laminated body and fabrication method thereof, which allow space saving and control of variation in internal layer resistance, are provided. When forming an internal-layer resistive element 7 in a multilayer ceramic substrate 10, the internal-layer resistive element 7 is connected to exterior electrodes (an upper surface electrode 32 and an undersurface electrode 34) via multiple via-electrodes 3a and 3b arranged in parallel, without a pad electrode adopted in the conventional laminated body. Moreover, in a multilayer ceramic substrate having multiple internal-layer resistive elements arranged in a multilayer structure, multiple internal-layer resistive elements are directly connected via multiple via-electrodes arranged in parallel.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: June 5, 2012
    Assignee: Koa Kabushiki Kaisha
    Inventor: Isao Tonouchi
  • Patent number: 8089337
    Abstract: A resistive device for use in providing a resistive load to a target under the application of power from a power source is provided, the resistive device being adapted for electrical connection to the power source through a pair of terminal wires. The resistive device includes a thick film material, and the thick film material defines at least one layer of tape. The resistive device can be, by way of example, a heater or a load resistor, and can also include a substrate onto which a layer of dielectric tape is disposed, a resistive layer disposed on the layer of dielectric tape, and a protective layer disposed on the resistive layer.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: January 3, 2012
    Assignee: Watlow Electric Manufacturing Company
    Inventors: Roger Brummell, Angie Privett
  • Patent number: 8085551
    Abstract: The present invention is to provide an electronic component where positional accuracy for arranging members constituting a circuit element such as a resistor element and the like is mitigated and corrosion of a terminal electrode caused by sulfur in the atmosphere is reduced.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: December 27, 2011
    Assignee: KOA Corporation
    Inventors: Seiji Karasawa, Koji Fujimoto
  • Patent number: 8018318
    Abstract: A resistive component suitable for detecting electric current in a circuit and a method of manufacturing the resistive component are provided. The resistive component includes a carrier, a resistive layer, an electrode unit, an upper oxide layer and a protective layer. The resistive layer comprises copper alloy and is disposed on the carrier. The electrode unit is electrically connected to the resistive layer. The upper oxide layer is disposed on a part of a surface of the resistive layer and includes oxides of the resistive layer. The protective layer covers at least a part of the upper oxide layer.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: September 13, 2011
    Assignee: Cyntec Co., Ltd.
    Inventors: Chung-Hsiung Wang, Hideo Ikuta, Wu-Liang Chu, Yen-Ting Lin, Chih Sheng Kuo, Wen-Hsiung Liao
  • Patent number: 7765680
    Abstract: There is provided a method of producing a printed circuit board incorporating a resistance element capable of adjusting resistance after the resistance element has been formed and assuring a high accurate resistance. A method of producing a printed circuit board incorporating a resistance element using carbon paste includes the steps of: forming through holes 5, 6, 25 and 26 or a bottomed hole in a double-sided copper clad laminate; applying noble metal plating into the through hole or the bottomed hole; filling the through hole or the bottomed hole with carbon paste; subjecting the carbon paste with which the thorough hole or the bottomed hole is filled to noble metal plating, conducting treatment and plating to form a conductive layer; forming an opening 18 in the conductive layer on the end of the through hole filled with the carbon paste; and performing trimming through the opening to adjust the resistance of the resistor formed by the carbon paste.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: August 3, 2010
    Assignee: Nippon Mektron, Ltd.
    Inventor: Garo Miyamoto
  • Patent number: 7724124
    Abstract: A low-capacitance multilayer chip varistor has capacitance lower than 0.5 pF at 1 MHz and has a characteristic of resisting more than thousands of times of 8 KV electrostatic shock, which comprises a ceramic main body, outer electrodes disposed at two ends of the ceramic main body and inner electrodes disposed therein; the ceramic main body comprises inorganic glass of 3˜50 wt % and semi-conductive or conductive particles of 50˜97 wt % with particle size of more than 0.1 ?m, and a layer of inorganic glass film covers the surface of semi-conductive or conductive particles, wherein the inorganic glass film contains semi-conductive or conductive particles of submicron or nanometer which is smaller than 1 micron, and the quantity contained of semi-conductive or conductive particles is less than 20 wt % of that of inorganic glass.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: May 25, 2010
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang, Xing-Guang Huang, Wei-Cheng Lien
  • Publication number: 20100117783
    Abstract: A chip resistor (A1) includes a chip-like resistor element (1), two electrodes (31) spaced from each other on the bottom surface (1a) of the resistor element, and an insulation film (21) between the two electrodes. Each electrode (31) has an overlapping portion (31c) which overlaps the insulation film (21) as viewed in the vertical direction.
    Type: Application
    Filed: January 25, 2010
    Publication date: May 13, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Masanori TANIMURA, Torayuki Tsukada, Kousaku Tanaka
  • Publication number: 20100097172
    Abstract: A laminated body and fabrication method thereof, which allow space saving and control of variation in internal layer resistance, are provided. When forming an internal-layer resistive element 7 in a multilayer ceramic substrate 10, the internal-layer resistive element 7 is connected to exterior electrodes (an upper surface electrode 32 and an undersurface electrode 34) via multiple via-electrodes 3a and 3b arranged in parallel, without a pad electrode adopted in the conventional laminated body. Moreover, in a multilayer ceramic substrate having multiple internal-layer resistive elements arranged in a multilayer structure, multiple internal-layer resistive elements are directly connected via multiple via-electrodes arranged in parallel.
    Type: Application
    Filed: February 28, 2008
    Publication date: April 22, 2010
    Applicant: KOA KABUSHIKI KAISHA
    Inventor: Isao Tonouchi
  • Publication number: 20100039211
    Abstract: A resistive component suitable for detecting electric current in a circuit and a method of manufacturing the resistive component are provided. The resistive component includes a carrier, a resistive layer, an electrode unit, an upper oxide layer and a protective layer. The resistive layer comprises copper alloy and is disposed on the carrier. The electrode unit is electrically connected to the resistive layer. The upper oxide layer is disposed on a part of a surface of the resistive layer and includes oxides of the resistive layer. The protective layer covers at least a part of the upper oxide layer.
    Type: Application
    Filed: June 11, 2009
    Publication date: February 18, 2010
    Inventors: Chung-Hsiung Wang, Hideo Ikuta, Wu-Liang Chu, Yen-Ting Lin, Chih-Sheng Kuo, Wen-Hsiung Liao
  • Patent number: 7633374
    Abstract: An electrical component includes a base made of ceramic layers and electrode layers, where the electrode layers separate adjacent ceramic layers, and the ceramic layers include a ceramic material that has a positive temperature coefficient in at least one part of an R/T characteristic curve. The component includes a first collector electrode attached to a first side of the electrical component and a second collector electrode attached to a second side of the electrical component, such that first collector electrode and the second collector electrode contact alternate electrode layers. The electrical component has a volume V and a resistance R, where the resistance R is measured between collector electrodes at a temperature of between 0° C. and 40° C., and V·R<600?·mm3.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: December 15, 2009
    Assignee: Epcos AG
    Inventor: Lutz Kirsten
  • Publication number: 20090206979
    Abstract: An electrical resistor has an electrically conductive stack, which includes a plurality of metal first layers and second layers. The stack allows to produce a highly anisotropic resistor, in which the resistance in the direction perpendicular to the layers is much higher than in the plane of the layers. The anisotropy allows the current flowing through the stack to be made homogenous, e.g., to be distributed over the entire stack surface, even if the current is input into the stack in an inhomogenous manner.
    Type: Application
    Filed: April 7, 2009
    Publication date: August 20, 2009
    Applicant: ABB RESEARCH LTD
    Inventors: Jens Tepper, Friedrich Koenig, Kaveh Niayesh, Stephan Schoft
  • Publication number: 20090021342
    Abstract: A resistive device for use in providing a resistive load to a target under the application of power from a power source is provided, the resistive device being adapted for electrical connection to the power source through a pair of terminal wires. The resistive device includes a thick film material, and the thick film material defines at least one layer of tape. The resistive device can be, by way of example, a heater or a load resistor, and can also include a substrate onto which a layer of dielectric tape is disposed, a resistive layer disposed on the layer of dielectric tape, and a protective layer disposed on the resistive layer.
    Type: Application
    Filed: July 18, 2007
    Publication date: January 22, 2009
    Applicant: Watlow Electric Manufacturing Company
    Inventors: Roger Brummell, Angie Privett
  • Publication number: 20090015367
    Abstract: A nonlinear resistor ceramic composition has a major component containing zinc oxide, a first minor component containing an oxide of a rare-earth metal, a second minor component containing an oxide of Ca, and a third minor component containing an oxide of Si. A percentage of the second minor component to 100 moles of the major component is in the range of 2 atomic % ? the second minor component <80 atomic % in terms of Ca. A percentage of the third minor component to 100 moles of the major component is in the range of 1 atomic % ? the third minor component <40 atomic % in terms of Si. An atomic ratio of Ca to Si (Ca/Si) is not less than 1.
    Type: Application
    Filed: July 8, 2008
    Publication date: January 15, 2009
    Applicant: TDK CORPORATION
    Inventor: Dai MATSUOKA
  • Patent number: 7278201
    Abstract: A high precision power resistor having the improved property of reduced resistance change due to power is disclosed. The resistor includes a substrate having first and second flat surfaces and having a shape and a composition; a resistive foil having a low TCR of about 0.1 to about 1 ppm/° C. and a thickness of about 0.03 mils to about 0.7 mils cemented to one of the flat surfaces with a cement, the resistive foil having a pattern to produce a desired resistance value, the substrate having a modulus of elasticity of about 10×106 psi to about 100×106 psi and a thickness of about 0.5 mils to about 200 mils, the resistive foil, pattern, type and thickness of cement, and substrate being selected to provide a cumulative effect of reduction of resistance change due to power. The present invention also provides for a method of producing a high precision power resistor.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: October 9, 2007
    Assignee: Vishay Intertechnology, Inc
    Inventors: Joseph Szwarc, Reuven Goldstein
  • Patent number: 7277005
    Abstract: Disclosed is a PCB including an embedded resistor and a method of fabricating the same. The PCB includes a plurality of circuit layers in which circuit patterns are formed. A plurality of insulating layers is each interposed between the circuit layers. The embedded resistor is made of a resistive material and received in a receiving hole formed in the plurality of circuit layers and the plurality of insulating layers such that walls defining the receiving hole extends from one of the circuit layers to another circuit layer. The receiving hole has a closed section, and a conductive material is plated on the opposite walls of the walls defining the receiving hole.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: October 2, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung Sam Kang, Chang Sup Ryu, Jong Kuk Hong
  • Patent number: 7215236
    Abstract: An electrical component having a base body includes a layer stack of mutually overlapping, electrically conductive electrode layers that are separated from one another by electrically conductive ceramic layers. The electrically conductive ceramic layers are composed of a ceramic whose specific electrical resistance exhibits a negative temperature coefficient. The electrically conductive ceramic layers are produced of ceramic green films that are sintered in common with the electrode layers, and outside electrodes that are electrically conductively connected to the electrode layers are arranged at two opposite outside surfaces of the base body. A method for the manufacture of the component and to the employment of the component is also provided.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: May 8, 2007
    Assignee: EPCOS AG
    Inventors: Ingrid Rosc, legal representative, Berrit Ines Rosc, legal representative, Jördis Brit Rosc, legal representative, Franz Schrank, Gerald Kloiber, Friedrich Rosc, deceased
  • Patent number: 7183891
    Abstract: A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before use. The binder eliminates the need to place the VVM in a separate device or to provide separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid FR-4 laminate, a polyimide, a polymer or a multilayer PCB via a process such as screen or stencil printing. In one embodiment, the VVM includes two types of conductive particles, one with a core and one without a core. The VVM can also have core-shell type semiconductive particles.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: February 27, 2007
    Assignee: Littelfuse, Inc.
    Inventors: Edwin James Harris, Tushar Vyas, Timothy Pachla, James A. Colby
  • Patent number: 7154370
    Abstract: A high precision power resistor having the improved property of reduced resistance change due to power is disclosed. The resistor includes a substrate having first and second flat surfaces and having a shape and a composition; a resistive foil having a low TCR of about 0.1 to about 1 ppm/° C. and a thickness of about 0.03 mils to about 0.7 mils cemented to one of the flat surfaces with a cement, the resistive foil having a pattern to produce a desired resistance value, the substrate having a modulus of elasticity of about 10×106 psi to about 100×106 psi and a thickness of about 0.5 mils to about 200 mils, the resistive foil, pattern, type and thickness of cement, and substrate being selected to provide a cumulative effect of reduction of resistance change due to power.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: December 26, 2006
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Joseph Szwarc, Reuven Goldstein
  • Patent number: 7129814
    Abstract: A chip resistor includes a metal resistor element having a flat lower surface. The lower surface is formed with two electrodes spaced from each other, and an insulating resin film is formed between these electrodes. Each of the electrodes partially overlaps the insulating film so that a portion of the insulating film is inserted between each of the electrodes and the lower surface of the resistor element.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: October 31, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Torayuki Tsukada
  • Patent number: 7084732
    Abstract: An electrical component includes a ceramic base made up of ceramic layers, electrode levels between the ceramic layers, where each electrode level includes at least two electrodes, and contact surfaces on an outer surface of the ceramic base. The contact surfaces are electrically connected to the electrodes. Electrodes overlap that are on different electrode levels and that are connected to different contact surfaces.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: August 1, 2006
    Assignee: Epcos AG
    Inventor: Robert Krumphals
  • Patent number: 7075408
    Abstract: A positive temperature coefficient thermistor has a non-heating portion which is not heated when a voltage is applied between first and second internal electrodes. The non-heating portion is provided in the approximate center of the positive temperature coefficient thermistor and is arranged to extend along a direction that is substantially perpendicular to a lamination direction of the positive temperature coefficient thermistor. The non-heating portion is arranged at least in the approximate center in the lamination direction of the portion of the laminate where the first and the second internal electrodes are arranged. Thus, a hot spot is reliably prevented from occurring inside the laminate when voltage is applied. As a result, the withstand voltage property is greatly improved. The non-heating portion may include a cavity provided in at least one thermistor layer or an opening or cut portion provided in the internal electrode.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: July 11, 2006
    Assignee: Murata Manufacturing Co, Ltd.
    Inventors: Kenjiro Mihara, Hideaki Niimi
  • Patent number: 7064649
    Abstract: A magnetoresistive layer system including a layer sequence including at least two magnetic layers, a non-magnetic, electrically conductive intermediate layer being arranged between them; the electrical resistance of the layer system being changeable as a function of an external magnetic field acting on the layer system. At least one magnetically hard layer is integrated in the layer system, at least in certain areas, applying a magnetic field at least in the area of a boundary surface between the magnetic layers and the intermediate layer. The magnetoresistive layer system is suitable in particular for use in a GMR sensor element including coupled multilayers or in an AMR sensor element having a barberpole structure. In addition, the system includes a gradiometer including a plurality of such layer systems.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: June 20, 2006
    Assignee: Robert Bosch GmbH
    Inventors: Peter Schmollngruber, Henrik Siegle
  • Patent number: 7030728
    Abstract: A resistor layout and method of forming the resistor are described which achieves improved resistor characteristics, such as resistor stability and voltage coefficient of resistance. A resistor is formed from a conducting material such as doped silicon or polysilicon. The resistor has a rectangular first resistor element, a second resistor element, a third resistor element, a fourth resistor element, and a fifth resistor element. A layer of protective dielectric is then formed over the first, second, and third resistor elements leaving the fourth and fifth resistor elements exposed. The conducting material in the exposed fourth and fifth resistor elements is then changed to a silicide, such as titanium silicide or cobalt silicide, using a silicidation process. The higher conductivity silicide forms low resistance contacts between the second and fourth resistor elements and between the third and fifth resistor elements.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: April 18, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kong-Beng Thei, Chih-Hsien Lin, Shyh-Chyi Wong
  • Patent number: 6935554
    Abstract: There is provided a method for producing a metal/ceramic bonding article, the method including the steps of: arranging a metal plate 12 of an overall-rate solid solution type alloy on a ceramic substrate 10; and heating the metal plate 12 and the ceramic substrate 10 in a non-oxidizing atmosphere at a temperature of lower than a melting point of the alloy to bond the metal plate 12 directly to the ceramic substrate 10. According to this method, it is possible to easily bond an alloy plate directly to a ceramic substrate, and it is possible to inexpensively provide an electronic member for resistance without causing the alloy plate to be deteriorated.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: August 30, 2005
    Assignee: Dowa Mining, Co. Ltd.
    Inventors: Masami Kimura, Susumu Shimada
  • Patent number: 6922131
    Abstract: An electrical device suitable for use in digital telecommunications applications is provided. The device includes a laminar PTC element composed of a conductive polymer composition sandwiched between two metal foil electrodes. A first insulating layer which is composed of an electrically insulating flexible material conforms to at least part of the perimeter of the PTC element. The device has low resistance, low capacitance, reduced size, and stable resistance, and can meet power cross testing requirements. In addition, assemblies of electrical devices are provided.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: July 26, 2005
    Assignee: Tyco Electronics Corporation
    Inventors: Cecilia A. Walsh, Rodrigo Rubiano, Albert R. Martin
  • Publication number: 20040172807
    Abstract: The invention is directed to an electrical component having a base body (1) that comprises a layer stack of mutually overlapping, electrically conductive electrode layers (3) that are separated from one another by electrically conductive ceramic layers (10), whereby the electrically conductive ceramic layers (10) are composed of a ceramic whose specific electrical resistance exhibits a negative temperature coefficient, whereby the electrically conductive ceramic layers (10) are produced of ceramic green films that are sintered in common with the electrode layers (3), and whereby outside electrodes (2) that are electrically conductively connected to the electrode layers (3) are arranged at two opposite outside surfaces of the base body (1). The invention is also directed to a method for the manufacture of the component and to the employment of the component.
    Type: Application
    Filed: March 3, 2003
    Publication date: September 9, 2004
    Inventors: Friedrich Rosc, Ingrid Rosc, Berrit Ines Rosc, Jordis Brit Rosc, Franz Schrank, Gerald Kloiber
  • Patent number: 6606783
    Abstract: A chip thermistor has a pair of outer electrodes opposite each other with a specified distance in between on one of the surfaces of a thermistor element and an inner electrode extending inside the thermistor element so as to overlap these outer electrodes in the direction perpendicular to the surface on which the outer electrodes are formed. An electrically insulating layer is preferably formed on the same surface as and between the pair of outer electrodes. Each of the outer electrodes may be formed with two or more layers, the outermost of the layers being of gold. The resistance value of such a chip thermistor can be adjusted by abrading at least a portion of the edges of the thermistor element together with portions of the outer electrodes.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: August 19, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiko Kawase, Norimitsu Kitoh
  • Patent number: 6498068
    Abstract: A resistor element has a ceramic body with a first outer electrode and a second outer electrode formed on its mutually opposite externally facing end surfaces and a plurality of mutually oppositely facing pairs of inner electrodes inside the ceramic body. Each of these pairs has a first inner electrode extending horizontally from the first outer electrode and a second inner electrode extending horizontally from the second outer electrode towards the first outer electrode and having a front end opposite and separated from the first inner electrode by a gap of a specified width, these plurality of pairs forming layers in a vertical direction. The gap of at least one of these plurality of pairs of inner electrodes is horizontally displaced from but overlapping with the gaps between the other pairs of inner electrodes. For producing such a resistor element, the distance of displacement is set according to a given target resistance value intended to be had by the resistor element.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: December 24, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukiko Ueda, Masahiko Kawase, Norimitsu Kitoh
  • Publication number: 20020145503
    Abstract: The present invention discloses a method of manufacturing a thin film resistor with a moisture barrier by depositing a metal film layer on a substrate and depositing a layer of tantalum pentoxide film overlaying the metal film layer. The present invention also includes a thin film resistor having a substrate; a metal film layer attached to the substrate; and a tantalum pentoxide layer overlaying the metal film layer, the tantalum pentoxide layer providing a barrier to moisture, the tantalum pentoxide layer not overlaid by an oxidation process.
    Type: Application
    Filed: April 9, 2001
    Publication date: October 10, 2002
    Inventor: Stephen C. Vincent
  • Publication number: 20020047771
    Abstract: A resistor foil, comprised of a copper layer having a first side and a second side. An intermediate layer having a thickness of between 5 Å and 70 Å is disposed on the first side of the copper layer. A first layer of a first resistor metal having a thickness of between 50 Å and 2 &mgr;m is disposed on the intermediate layer, and a second layer of a second resistor metal having a thickness of between 50 Å and 2 &mgr;m is disposed on the first layer of the first resistor metal. The first resistor metal has a resistance different from the second resistor metal.
    Type: Application
    Filed: August 2, 2001
    Publication date: April 25, 2002
    Applicant: Gould Electronics Inc.
    Inventors: Jiangtao Wang, Michael A. Centanni, Sidney J. Clouser
  • Patent number: 6346871
    Abstract: A laminate type varistor has at least one pair of first and second inner electrodes and a varistor layer. The at least one pair of first and second electrodes and the varistor layer are laminated. A first outer electrode and a second outer electrode electrically are connected to the first inner electrode and the second inner electrode, respectively. In the laminate type varistor, the first inner electrode and the first inner electrode are separated by a predetermined distance from the outer electrode so that the first inner electrode has no electrode surface facing to an electrode surface of the second inner electrode.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: February 12, 2002
    Assignee: TDK Corporation
    Inventors: Tadashi Ogasawara, Ryuichi Tanaka, Mikikazu Takehana
  • Patent number: 6340927
    Abstract: A power resistor may be formed as a stacked arrangement of first and second terminal plates positioned on either side of a resistor plate and insulated therefrom by interposing first and second insulator plates. Preferably, the insulator plates are metallic plates with non-conductive surfaces. As an example, anodized aluminum plates may be used. The metallic insulator plates provide good thermal conduction paths between the resistor plate and the opposing terminal plates, allowing efficient heat transfer from the power resistor. Further, with metallic insulators, each layer in the stack may be made of metal with attendant structural advantages. For example, the stacked resistor may be subjected to significant compressive force in mounting without need for special precautions or load distribution measures, as might be required with ceramic insulating layers. Preferably, the stack includes interlayer features allowing it to be frictionally fitted together, thus simplifying assembly.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: January 22, 2002
    Assignee: Elektronische Bauelemente Gesellschaft m.b.H
    Inventor: Hans Peter Peschl
  • Patent number: 6184772
    Abstract: A chip thermistor has a pair of outer electrodes opposite each other with a specified distance in between on one of the surfaces of a thermistor element and an inner electrode extending inside the thermistor element so as to overlap these outer electrodes in the direction perpendicular to the surface on which the outer electrodes are formed. An electrically insulating layer is preferably formed on the same surface as and between the pair of outer electrodes. Each of the outer electrodes may be formed with two or more layers, the outermost of the layers being of gold.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: February 6, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiko Kawase, Norimitsu Kitoh
  • Patent number: 6104597
    Abstract: A thin-film capacitor having a first and a second capacitor element disposed on a substrate substantially on the same plane adjacent to each other and laterally spaced in a direction along the plane. Each capacitor includes a dielectric layer and two electrode layers formed on the upper and lower side of the dielectric layer, respectively. The upper electrode layer of the first capacitor and the lower electrode layer of the second capacitor are electrically connected, and lower electrode layer of the first capacitor and the upper electrode layer of the second capacitor are electrically connected, via connection terminal electrodes. A plurality of such thin-film capacitors may be laminated, or placed side-by-side on the substrate.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: August 15, 2000
    Assignee: Kyocera Corporation
    Inventors: Shigeo Konushi, Fumio Fukumaru
  • Patent number: 6100787
    Abstract: A multilayer electronic component (200) is provided. The component includes a substrate package assembly (202) with a set of stacked insulated sheets of a dielectric ceramic material (204, 206, 208, 210, 212). Also included are a set of embedded resistors (214), each of the embedded resistors including an electrical input port pad (216) and an electrical output port pad (218) provided in layers between the set of stacked insulated sheets. Each of the insulated sheets has a trough (220) of a predetermined length aligned between and transverse to the electrical input port pad (216) and the electrical output port pad (218). The trough (220) reduces the resistance value variability in the multilayer electronic component (200). The trough (220) is substantially filled with a resistive paste material and an internal circuit (222) connects the embedded resistors inside the substrate package assembly (202). A method of forming the substrate package assembly (202) is also provided.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: August 8, 2000
    Assignee: Motorola, Inc.
    Inventors: Rong-Fong Huang, Robert A. Burr
  • Patent number: 5994997
    Abstract: A thick-film resistor and a process for forming the resistor to have accurate dimensions, thereby yielding a precise resistance value. The resistor generally includes an electrically resistive layer and a pair of terminals, a first of which is surrounded by the second terminal, so as to form a region therebetween that surrounds the first terminal and separates the first and second terminals. The terminals are preferably concentric, with the second terminal and the region therebetween being annular-shaped. The resistive layer electrically connects the first and second terminals to complete the resistor. Each of the terminals has a surface that is substantially parallel to an upper and/or lower surface of the resistive layer and contacts the resistive layer. The surfaces of the terminals may be embedded in the resistive layer by printing the resistive material over the terminals, or may contact the upper or lower surface of the resistive layer by locating the terminals above or below the resistive layer.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: November 30, 1999
    Assignee: Motorola, Inc.
    Inventors: Vernon L. Brown, Gregory J. Dunn, Lawrence E. Lach
  • Patent number: 5945903
    Abstract: A circuit protection device including a pair of terminals to be electrically connected into an electrical circuit, a pair of spaced current-carrying extensions of the terminals, and an initially low resistance current limiting device extending between the current-carrying extensions. The invention includes the feature that the current-limiting element including flexible conductive current-feeding arms having inner and outer end portions, the inner end portions thereof being electrically connected to the current-carrying extensions of the terminals. The outer end portions of the current-feeding arms are cantilevered and flexible relative to the inner end portions. The device further preferably includes a PTC current-limiting element sandwiched between the flexible outer end portions of the current-feeding arms.
    Type: Grant
    Filed: August 30, 1997
    Date of Patent: August 31, 1999
    Assignee: Littelfuse, Inc.
    Inventors: Nagi Reddi Kanamatha Reddy, Robert Swensen, Thomas F. Draho, Michael Styrna
  • Patent number: 5898360
    Abstract: A ceramic heater for a gas sensor has a heater substrate, a laminating substrate made of the same material as the heater substrate, and an electrode made of platinum and at least one lanthanide oxide disposed between the heater substrate and the laminating substrates. The ceramic heater exhibits improved durability without migration patterns, is free of cracks on the substrate, is free of short circuits in the heat electrode and is low in production cost.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: April 27, 1999
    Assignee: Samsung Electro Mechanics, Co., Ltd.
    Inventor: Chang-bin Lim
  • Patent number: 5840218
    Abstract: Disclosed is a resistance material composition consisting essentially of at least one nitride of an element of Group VA and Group VIA and optionally containing an inorganic binder. The composition can be baked along with a multi-layered ceramic substrate (especially, a low-temperature-sintering, multi-layered ceramic substrate) to be integrated with Cu or the like electrodes, thereby forming built-in resistors with good characteristics within the substrate. The nitrides are preferably NbN, TaN and Cr.sub.2 N.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: November 24, 1998
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hiroji Tani, Keisuke Nagata
  • Patent number: 5764129
    Abstract: A ceramic resistor includes zinc oxide as a main component, and as essential components, aluminum oxide 3.0-40 mol %, magnesium oxide 2.0-40 mol %, silicon oxide 0.1-10 mol %, and at least one kind of compound 0.005-0.5 mol %, selected from a group consisting of calcium oxide, strontium oxide and barium oxide, and has a positive temperature coefficient of resistance. A neutral grounding resistor and a gas circuit breaker, each using the above-mentioned ceramic resistors, are disclosed.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: June 9, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Moritaka Syouji, Tadashi Kitami, Seiichi Yamada, Ken Takahashi, Shingo Shirakawa, Takeo Yamazaki, Shigeru Tanaka, Shigehisa Motowaki
  • Patent number: 5756971
    Abstract: Proposed is a heater arrangement for a measuring sensor for determining components in gases, particularly in exhaust gases of internal combustion engines. The heater arrangement comprises at least two heating elements (10, 11) which are disposed at least partly one above the other and electrically insulated from one another by means of at least one insulating layer. A contacting member (14) laid through the insulating layer from one heating element (10) to the other heating element (11) is provided in such a manner that the heating elements (10, 11) are switched in series one behind the other.
    Type: Grant
    Filed: August 3, 1994
    Date of Patent: May 26, 1998
    Assignee: Robert Bosch GmbH
    Inventor: Heinrich Hipp
  • Patent number: 5705099
    Abstract: Disclosed are a resistive paste that can be fired in a neutral or reducing atmosphere to give a resistor having a high sheet resistivity value and a satisfactory TCR value even on low-temperature-sintering substrates, a resistive material composition that constitutes the resistive paste, and also a resistor that is formed from the resistive paste to realize a high sheet resistivity value and a satisfactory TCR value. A first resistive material of Ca.sub.x Sr.sub.1-x RuO.sub.3 (where x is from about 0.25 to 0.75 mols), a second resistive material of La.sub.y Sr.sub.1-y CoO.sub.3 (where y is from about 0.40 to 0.60 mols) and titanium oxide (TiO.sub.2) are mixed, and a non-reducible glass frit and an organic vehicle are added thereto to form the resistive paste.
    Type: Grant
    Filed: April 16, 1996
    Date of Patent: January 6, 1998
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Keisuke Nagata, Hiroji Tani