Abstract: A method of computing in memory, the method including inputting a packet including data into a computing memory unit having a control unit, loading the data into at least one computing in memory micro-unit, processing the data in the computing in memory micro-unit, and outputting the processed data. Also, a computing in memory system including a computing in memory unit having a control unit, wherein the computing in memory unit is configured to receive a packet having data and a computing in memory micro-unit disposed in the computing in memory unit, the computing in memory micro-unit having at least one of a memory matrix and a logic elements matrix.

Abstract: A keyboard control system and a computer input system thereof are disclosed. The keyboard control system is used in a keyboard of the computer input system, wherein the keyboard has a plurality of keys. The keyboard control system includes a plurality of key control modules and a main control module. Each key control module is electrically connected to a plurality of keys so as to generate a key control signal according to the actuation of any one of the keys, wherein each key control module is electrically connected to different keys. The main control module is electrically connected to a plurality of key control modules for executing the key control signal.

Abstract: A method includes receiving a request associated with a communications path from a first device to a second device. The method includes generating switching configuration data based on network topology data associated with the communications path. The switching configuration data indicates a configuration of a switch matrix of a satellite. The method further includes causing the switch matrix to initialize or modify the communications path based on the switching configuration data. A portion of the communications path includes components of a payload of the satellite. The components including the switch matrix.

Abstract: The present invention provides a display panel driving circuit and compensation method thereof. The display panel driving circuit comprises a near end load, a far end load, an operating circuit and a pre-charging control circuit. The operating circuit is configured to receive display data. The pre-charging control circuit is coupled to the near end load and the far end load respectively. The pre-charging control circuit outputs a first signal and a second signal to the near end load and the far end load respectively according to the display data that a first waveform from the near end load is the same as a second waveform from the far end load.

Abstract: An electrophoretic display apparatus includes a data line charging circuit; an adjustment resistance; a first switching portion that cause a first data line end portion of the data line to be electrically connected to any one of a data line driving circuit and the adjustment resistance; a second switching portion that cause a second data line end portion of the data line to be electrically connected to or disconnected from the data line charging circuit; and a control portion that perform control such that the first switching portion causes the first data line end portion of the data line to be electrically connected to the adjustment resistance, and subsequently allow starting of a precharge operation by performing control such that the second switching portion causes the second data line end portion of the data line to be electrically connected to the data line charging circuit.

Abstract: A printing device runs a process that uses resources efficiently and is compatible with configurations having multiple reception units. The printer 11 has a first immediate execution command manager 202 that monitors if an immediate execution command was stored in a first receive buffer 24, and if an immediate execution command was stored, reads and runs the immediate execution command; and a second immediate execution command manager 203 that monitors if an immediate execution command was stored in a second receive buffer 26, and if an immediate execution command was stored, reads and runs the immediate execution command.

Abstract: A planar sensor having a conductor pattern for electric field sensing and its manufacturing method, the planar sensor comprising arrays of planar electrically conductive sensor areas (2) arranged to follow each other in a successive manner along the longitudinal direction, and conductors connecting electrically conductive sensor area to at least one connector, wherein the sensor further comprises a first elastic flooring layer (3) and at least one of the following: a second elastic flooring layer (4) or a flexible circuit board, and the electrically conductive sensor areas (2) and the conductors are attached between the first elastic flooring layer (3) and the second elastic flooring layer (4) or between the first elastic flooring layer (3) and the flexible circuit board to form a unitary floor sensor structure.

Abstract: Disclosure is related to a reconfigurable sorter and a method of sorting using the sorter. The reconfigurable sorting method is adapted to the sorter essentially consisting of multiple serially-connected comparison units. The each comparison unit includes two registers. The sorter is particularly a reconfigurable device according to the number of sorted numerals. According to the exemplary embodiment, an input mode is initiated firstly. Initial values are set to the registers. The numerals are sequentially inputted to the registers. At the input mode, the values in the registers may be shifted if necessary and mutually compared in every comparison unit. The values in the registers of every comparison unit may be swapped based on the comparison. At output mode, the numerals are outputted sequentially. The values in the registers are shifted and swapped until all numerals are completely outputted. The output appears the sorted numerals with low timing latency.

Abstract: A driver, includes a driver block, a controller block, and a comparison block. The driver block includes an adjustable current source configured to produce a digital output stream. The controller block is coupled to the driver block. The comparison block is coupled to the driver block and the controller block. The comparison block is configured to compare the digital output stream to a reference value at a time delayed with respect to a master clock and based upon the comparison cause the controller block to adjust a strength of the driver block.

Abstract: Systems and methods are described herein for determining the location of a transmitter by jointly and collectively processing the full sampled signal data from a plurality of receivers to form a single solution.

Abstract: A circuit arrangement (1) comprises a current source (10), a comparator (50) and a control device (90). The current source (10) serves for supplying a light-emitting diode (41). The comparator (50) may be coupled to the light-emitting diode (41) at a first input (51) via a push-button (101). The comparator (50) may be fed with a reference voltage (VREF) at a second terminal (52). The control device (90) selectively puts the current source (10) into a first operational state (A) for polling a push-button position of the push-button (101) or into a second operational state (B) for emitting radiation by means of the light-emitting diode (41).

Abstract: The invention relates to a switching matrix for an input device such as a keyboard or a cursor device for the detection of different switching states. According to the invention the switching matrix has a group electrically connected to a microcontroller, with a plurality of N input and output lines (I/O-lines) with a serially connected terminating resistor to mass each and a group with a plurality of K switching lines with one switching element each. Each switching line connects two of the N I/O lines to each other. The K switching line have an additional series resistor each. According to an interrogation pattern, a first I/O-line as output line is configured with a high potential, a second I/O-line is configured as input line and each further I/O-line as output line is configured with a low potential of the microcontroller.

Abstract: A key system utilizes two operation nodes to detect the status of a plurality of keys, and each operation node can output and read a high, a low, and a clock signal. When an operation node outputs a high signal and reads a return signal and then outputs a low signal and reads a return signal, the other operation node outputs a clock signal. Therefore, the two operation nodes can detect the status of six keys.

Abstract: A method of operating a circuit for processing a digital signal is disclosed. The circuit includes various circuit stages having respective enabled states. A present signal path is established which includes circuit stages in their respective enabled states. Power is disabled to selected circuit stages not used in the present signal path so as to minimize power consumption in the disabled circuit stages. A data signal is then processed through the circuit stages in the present signal path. Before a next signal path is needed, power is re-enabled to selected disabled circuit stages in the next signal path to allow the enabled circuit stages to approach their respective enabled states. Then the next signal path can be established including the enabled circuit stages in their respective enabled states. The data signal can then be processed through the circuit stages in the next signal path.

Abstract: An improved key matrix scanning technique conducts a first pre-scan on a first array of connections in a key matrix to identify any activated keys or buttons associated with the first array. A second sub-scan is conducted on a second array of connections in the key matrix but only for the connections in the first array that are detected as having activated keys.

Abstract: Keypad apparatus for registering signals corresponding to data that a user enters by pressure on keys of an array in a surface extending in two dimensions. The elements of first and second sets of impedance elements (R) are connected in series through respective interconnections and a signal processor applies first and second reference signals across the first and second sets of impedance elements respectively. User pressure on the keys makes or breaks connections through corresponding contact elements between a respective pair of the interconnections, one from the first set of impedance elements and one from the second set of impedance elements, so as to generate first and second output signals (PX1, PY1) that together are a corresponding combination of the first and second reference signals that is unique to the actuated key elements.

Abstract: The invention relates to a switching device comprising a plurality of inputs and outputs which are interconnected by an interconnection point matrix for transmitting electric signals supplied from the inputs to the outputs via transmission lines in accordance with a predefined switching plan. Each transmission line comprises a signal path for conveying the electric signals and a voltage reference path. The interconnection points are arranged in the matrix in such a way that two distinct transmission lines comprise one common voltage reference path. Application: packet switching in optical transmissions.

Abstract: Systems and methods for performing video switching between multiple inputs and outputs are disclosed. In one embodiment, a system includes a video box coupled to one or more user interfaces, a plurality of video inputs, and a plurality of video outputs. The video box includes a video controller coupled to the one or more user interfaces and a video switch coupled to the plurality of video inputs and the plurality of video outputs. Activation of the user interface generates a video control signal that is sent to the generated video control signal. The video controller generates a video switching signal based on the received video control signal. The video switch connects one or more of the plurality of video inputs to one or more of the plurality of video outputs based on the generated video control signal.

Abstract: An improved key matrix scanning technique conducts a first pre-scan on a first array of connections in a key matrix to identify any activated keys or buttons associated with the first array. A second sub-scan is conducted on a second array of connections in the key matrix but only for the connections in the first array that are detected as having activated keys.

Abstract: The invention relates to a switching device comprising a plurality of inputs and outputs which are interconnected by a matrix of interconnection points for transmitting electric signals supplied from the inputs to the outputs via transmission lines in accordance with a predefined switching plan. The device comprises a control member for controlling the operation of the matrix with control signals and local decoding for locally decoding the control signals and for deducing the switching state of the interconnection points. Application: packet switching in optical transmissions.

Abstract: In a crosspoint switch, both input buses and output buses are driven at low swing. Self-timed, differential, push-pull, low swing driver circuits drive the input buses and are provided in the crosspoints to drive the output buses. Clocked, regenerative sense amplifiers are provided in crosspoints and at outputs of the data buses.

Abstract: A crossbar switch includes a cross-point matrix with n input rows of cross-points and m output columns of cross-points. The crossbar switch further includes n decoders connected to the n input rows. Each of the n rows includes a single serial address input, a shift input and a data input. A serial address and data enter the address input and the data input in parallel. A shift sequence is transmitted on the single shift input. The data flows before the shift sequence on the shift input is complete. The data is shifted through the crossbar switch using a clock that is generated on-chip using a clock recovery circuit. The decoder converts a binary address input into a serial address and includes an N-bit counter with a plurality of toggle flip-flops. The crossbar switch is implemented using superconductor digital electronics such as rapid single flux quantum (RSFQ) logic.

Abstract: A method is provided for recognizing a key in a terminal apparatus having a key matrix structure. The method according to the invention includes the steps of recognizing pushing of and detaching from a key by using a difference between a previous key status value on the key matrix and a current key status value according to a change of the key status, and obtaining a positional value of an inputted key on the key matrix by using a relational expression considering difference values between adjacent rows in each line and between adjacent lines in each row and a difference between the previous key value and the current key value.

Abstract: A crosspoint switch architecture implements high-speed packet switches and incorporates a power-saving bias control circuit with each switch cell. Each switch cell is equipped with two memory cells and a bias control circuit. Power savings are obtained by controlling the bias current of the switch cell as a function of the switch state. Although the additional circuitry accompanying each switch cell adds complexity and a minimal additional power consumption, the power saving realized in the switch cell results in a crosspoint switch with much lower power consumption as compared to existing architectures. The presence of two bits of memory for each switch core allows for fast reconfiguration. The result is an overall power savings and lower cost design.

Abstract: The invention relates to a switching device comprising a plurality of inputs and outputs which are interconnected by a matrix of interconnection points for transmitting electric signals supplied from said inputs to said outputs via transmission lines in accordance with a predefined switching plan. The device comprises a control member for controlling the operation of the matrix by means of control signals and local decoding means for locally decoding said control signals and for deducing the switching state of said interconnection points. Application: packet switching in optical transmissions.

Abstract: A selectable input buffer control system includes at least one input buffer; a plurality of input receivers associated with each input buffer; an addresser circuit for addressing each input receiver; and a selection circuit associated with each input buffer for enabling its associated input buffer in response to the addressing of any one or more of the input receivers associated with that input buffer.

Abstract: A high density electronic switching matrix (ESM) includes several splitting modules (200) arranged along a first axis, each including a signal input (202) and several splitter outputs (204). The ESM (500, 600) further includes several switching modules (400) arranged along a second axis perpendicular to the first axis. Each switching module (400) includes switching inputs (402) coupled individually to an output of each of the splitting modules (200). The ESM (500, 600) is further characterized by couplings between the splitter modules and the switching modules. The couplings are formed by mating male and female connectors (300) integrated into the splitting modules and the switching modules. The couplings support extremely high frequency operation. The splitting modules (200) and the switching modules (400) may thus be coupled closely together to form a dense, high frequency, switching matrix, and may be stacked upon one another.

Abstract: A signal correction method and receiver receives an asynchronous wireless signal including a code signal, and determines whether the code signal is discriminated as a regular code. When the determined code signal is not discriminated as the regular code, the signal correction method and receiver changes a sampling time for the asynchronous wireless signal within a predetermined range on sampling. When the code signal is still not discriminated as the regular code after changing the sampling time, the signal correction method and receiver changes a tuning frequency of a local oscillation signal.

Abstract: Active switch matrix apparatus that is used in a satellite communications system that provides for reconfigurability of the communication channels of the communications system. The active switch matrix apparatus has redundan channels and components that provides for a high probability of success during the lifetime of the satellite. The active switch matrix apparatus is comprised of two switch matrices, one for each polarization (horizontal and vertical). Each of the switch matrices contains redundancy, including redundant paths through power dividers, power combiners and amplifiers to outputs of the apparatus. This is accomplished using a plurality of controllable switches 16 in the power dividers and a plurality of controllable output switches coupled to outputs of the amplifiers. Each of the switch matrices are coupled to redundant DC/DC converters and switch matrix controllers.

Abstract: A key matrix circuit has a switching circuit with a first terminal and a second terminal that are switched on and off by pressing a selection key of a plurality of selection keys arranged in an N-row-by-M-column matrix, thereby making connection to a common ground circuit when a selection key is pressed. The key matrix circuit has a first voltage-dividing circuit connected between a connection circuit that connects the first terminals of the first row and a fixed power supply voltage, and a second voltage-dividing circuit connected between a connection circuit that connects the second terminals of the first column and the fixed power supply voltage, the connection points between resistances to of the first voltage-dividing circuit being connected to the connection circuits connected to the first terminals of the other rows, and the connection points between resistances of the second voltage-dividing circuit being connected to the connection circuits of the other rows.

Abstract: A security keyboard matrix scanning method for a keyboard is disclosed. This invention utilizes bi-directional input/output ports, in which each line of the X-port and the Y-port can be selectively designated as a sensing line or an output line, to construct the X-port and Y-port such that at least one line of one of the two ports can output a scanning signal representative of a dummy scanning signal at the time the actual scanning signal is output from another line of either port. Thus, the scanning method disclosed in this invention can efficiently prevent a password from being recognized by a third party for illegal use thereby enhancing the security of a password identification device.