Switching Element Patents (Class 340/14.69)
  • Patent number: 10812916
    Abstract: A hearing instrument includes: a wireless receiver configured for reception of a message relating to a ticket issued for a user of the hearing instrument by a ticket management system; a processing unit configured for processing the message according to a hearing loss of the user; and a speaker configured to convert the processed message into an acoustic signal for transmission towards an eardrum of the user.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 20, 2020
    Assignee: GN Hearing A/S
    Inventor: Brian Dam Pedersen
  • Patent number: 8928466
    Abstract: A protection circuit is designed to operate when the level of a DC power supply potential which is generated in a rectifier circuit is equal to or greater than a predetermined level (a reference level), so as to decrease the level of the generated DC power supply potential. On the other hand, the protection circuit is designed not to operate when the DC power supply potential which is generated in the rectifier circuit is equal to or less than the predetermined level (the reference level), so as to use the generated DC power supply potential without change. A transistor of the protection circuit includes an oxide semiconductor layer, which enables a reduction in the off-state current of the transistor and a reduction in power consumption of the protection circuit.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Koichiro Kamata
  • Patent number: 8203437
    Abstract: A programmable graphical display switch is described herein that provides users with a way of controlling other devices and for customizing how that control is initiated and communicated to a user.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: June 19, 2012
    Inventors: Steven R. Galipeau, Rory G. Briski
  • Patent number: 8018326
    Abstract: A matrix switch is provided with a plurality of input-terminals, a plurality of output-terminals, a plurality of connector switch elements connecting the plurality of input-terminals with the plurality of output-terminals, a plurality of input-terminal shunts associated with the plurality of input-terminals, and a plurality of output-terminal shunts associated with the plurality of output-terminals. Each input-terminal is connected to at least any one of the plurality of input-terminal shunts, and the input-terminal shunt connects the associated input-terminal to a predetermined impedance load as necessary. Each output-terminal is connected to at least any one of the plurality of output-terminal shunts, and the output-terminal shunt terminates the associated output-terminal in a predetermined impedance as necessary.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: September 13, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Masahito Kushima
  • Patent number: 7660652
    Abstract: A vehicle tracking device (101), method and/or system are provided. The device (101) includes a location interface (117), for receiving a location signal indicating a current location when operably connected to a GPS antenna; a sensor interface (109), for receiving sensor signals from sensors in the vehicle indicating a sensed status of the vehicle, when electrically or electronically connected to the sensors; and a processor (105). The processor (105) is configured to facilitate receiving, from the location interface, indications of a current location; determining, responsive to the location signal, a determined current location of the vehicle (127); receiving, from the sensor interface, a sensed status of the vehicle (129); recording a pre-defined event condition, when the pre-defined event condition occurs (131) responsive to the sensed status, in a vehicle history; and recording the determined current location in the vehicle history (133).
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: February 9, 2010
    Assignee: Signature Control Systems, Inc.
    Inventors: Brian Smith, Eric Schafer
  • Publication number: 20080225833
    Abstract: According to prior art, for example, when danger or environmental catastrophe are imminent, the population is warned by information guided via the communication network. This type of warning is however limited when the communication network consists of a plurality of sub-networks and the (warning) information must thus be transmitted over network boundaries to the subscriber The invention solves this problem in that a warning profile is associated with each route/transit switching centre trunk group. The association is carried out during the establishment of the route/transit switching centre trunk group, and is updated as required as changes of the network configuration. Each network transition implicitly thus has one such warning profile.
    Type: Application
    Filed: July 6, 2006
    Publication date: September 18, 2008
    Applicant: Nokia Siemens Networks GmbH & Co. KG
    Inventor: Norbert Lobig
  • Patent number: 7271743
    Abstract: A switch arrangement comprises a photoconductor to be illuminated. The switch arrangement also comprises a conductor which is intended to further transmit light escaping from the photoconductor and directed to the conductor by a local contact, wherein the conductor and the photoconductor are further under the control of an external force, arranged to move in relation to each other and to cause the development, loss or change of the contact in such a way that a detectable change is caused in the light guided through it.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: September 18, 2007
    Assignee: Nokia Corporation
    Inventors: Esa Määttä, Jari Saukko, Henri Vähä-Ypyä
  • Patent number: 7151432
    Abstract: Aspects of a switch matrix circuit are provided. In accordance with a circuit aspect, a plurality of switches are organized in a row and column configuration. Coupled to the plurality of switches is a current sensing circuit. The current sensing circuit includes a transistor and at least one resistor per column of the plurality of switches. Current amplified by the transistor and converted by the at least one resistor in a column is sensed as a logic level indicative of a switch status within the column for a selected row. The current sensing arrangement may also be used in an embodiment utilizing bi-directional signal control to minimize the number of I/O lines required to scan the switch matrix. The bi-directional signal scanning may also be implemented in another embodiment that senses voltage levels to determine switch closures.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: December 19, 2006
    Assignee: Immersion Corporation
    Inventor: Kollin Tierling
  • Patent number: 6965299
    Abstract: In a crosspoint switch, both input buses and output buses are driven at low swing. Self-timed, differential, push-pull, low swing driver circuits drive the input buses and are provided in the crosspoints to drive the output buses. Clocked, regenerative sense amplifiers are provided in crosspoints and at outputs of the data buses.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: November 15, 2005
    Assignee: LSI Logic Corporation
    Inventors: William J. Dally, Daniel K. Hartman
  • Patent number: 6771162
    Abstract: A high-speed, low distortion N×M crosspoint switch selectively routes input signals arriving at any of N input terminals to one or more of M output terminals. The crosspoint switch includes a switch cell array having N rows and M columns of switch cells. Each of N input lines convey the input signal arriving at a separate one of the N input signals to each switch cell of a corresponding array row. Each of M output lines convey output signals generated by cells of a corresponding array column to a separate switch output terminal. Each switch cell contains a CMOS tristate buffer and a memory cell for storing data controlling whether the tristate buffer is active or inactive. When a tristate buffer is active, it buffers an input signal appearing on one of the input lines to generate an output signal on one of the output lines. When inactive, a tristate buffer refrains from generating an output signal in response to its input signal.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: August 3, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventor: William E. Moss
  • Patent number: 6525650
    Abstract: A high density electronic switching matrix (ESM) includes several splitting modules (200) arranged along a first axis, each including a signal input (202) and several splitter outputs (204). The ESM (500, 600) further includes several switching modules (400) arranged along a second axis perpendicular to the first axis. Each switching module (400) includes switching inputs (402) coupled individually to an output of each of the splitting modules (200). The ESM (500, 600) is further characterized by couplings between the splitter modules and the switching modules. The couplings are formed by mating male and female connectors (300) integrated into the splitting modules and the switching modules. The couplings support extremely high frequency operation. The splitting modules (200) and the switching modules (400) may thus be coupled closely together to form a dense, high frequency, switching matrix, and may be stacked upon one another.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: February 25, 2003
    Assignee: TRW Inc.
    Inventors: Steven S. Chan, George M. Hayashibara, Chun-Hong Harry Chen, Davie C. Liu
  • Patent number: 6515579
    Abstract: Active switch matrix apparatus that is used in a satellite communications system that provides for reconfigurability of the communication channels of the communications system. The active switch matrix apparatus has redundan channels and components that provides for a high probability of success during the lifetime of the satellite. The active switch matrix apparatus is comprised of two switch matrices, one for each polarization (horizontal and vertical). Each of the switch matrices contains redundancy, including redundant paths through power dividers, power combiners and amplifiers to outputs of the apparatus. This is accomplished using a plurality of controllable switches 16 in the power dividers and a plurality of controllable output switches coupled to outputs of the amplifiers. Each of the switch matrices are coupled to redundant DC/DC converters and switch matrix controllers.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: February 4, 2003
    Assignee: Space Systems/Loral, Inc.
    Inventors: Gerald T. Murdock, Weimin Zhang
  • Patent number: 6323755
    Abstract: A cross-bar switch which includes a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses; a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses; a switching mechanism for selectively coupling the plurality of master bus ports to the plurality of slave bus ports; and a configuration mechanism for locking at least one of the plurality of slave buses in response to a transfer request initiated by a master device attached to one of the plurality of master buses. The cross-bar switch has the capability of selectively locking slave buses during a bus lock transfer. In the preferred embodiment, the configuration mechanism is a Bus Lock Bit on Configuration Registers on the cross-bar switch. The Bus Lock Bit is programmable through the Device Control Register bus, which allows the cross-bar switch to be dynamically programmable and changed by a processor in a larger system.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: November 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: William Robert Lee, David Wallach