Abstract: According to a first aspect of the present invention there is provided a signal generation system for generating a predetermined analog signal. The system comprises a clock generator (1) adapted for generating on the basis of an external clock signal a predetermined clock signal, a signal generator including a first gain stage (21) and a second gain stage (22) adapted for providing an overall gain of the signal generator and outputting a stepped analog signal, an analog filter (23) adapted for filtering the stepped analog signal output by the second gain stage and for outputting the predetermined analog signal, and a first and a second clock mapping units (3,4) adapted for receiving the predetermined clock signal, and respectively supplying to the first and second gain stages non-overlapped clock signal, wherein the amount of gain provided by the first and second gain stages is controlled by the non-overlapped clock signals.

Abstract: There is provided an AD converter including an AGC circuit that changes an input amplitude of an analog signal and outputs the analog signal to an AD converter circuit that converts the analog signal to a digital signal, and a first detection portion that compares an output range of the analog signal output by the AGC circuit with a predetermined voltage range and, based on a comparison result, controls the output range of the analog signal output by the AGC circuit.

Abstract: A method for automatic gain control comprising the steps of measuring a signal using compressed sensing to produce a sequence of blocks of measurements, applying a gain to one of the blocks of measurements, adjusting the gain based upon a deviation of a saturation rate of the one of the blocks of measurements from a predetermined nonzero saturation rate and applying the adjusted gain to a second of the blocks of measurements. Alternatively, a method for automatic gain control comprising the steps of applying a gain to a signal, computing a saturation rate of the signal and adjusting the gain based upon a difference between the saturation rate of the signal and a predetermined nonzero saturation rate.

Abstract: A system to interface analog-to-digital converters to inputs with arbitrary common-modes includes a common-mode voltage amplifier circuit and a PGA circuit connected to the common-mode voltage amplifier circuit. The common-mode voltage amplifier and PGA circuits receive first and second analog input signals. The PGA circuit eliminates the arbitrary common-modes from the first and second analog input signals based on an output of the common-mode voltage amplifier circuit.

Abstract: A noise reduction method is disclosed that uses numerical logic to estimate the value of the noise in a receive system and remove the noise. A surrogate probe value is selected and subtracted from an input signal and an iterative process selects a noise probe value for each iteration and the respective noise probe values are summed resulting in a noise estimate that is combined with the input signal.

Abstract: Embodiments of the present disclosure provide a method and system for an auto-ranging analog-to-digital converter (ADC) for dynamically scaling inputs to an ADC. The auto-ranging ADC includes a dynamically configurable transistor arrangement for delivering a load current and a replica device for replicating the load current. A current sense resistor generates a replicated load voltage based on the replicated current. The ADC generates a digital value based on the replicated load voltage. The auto-ranging ADC also includes an auto-ranging controller for dynamically configuring the transistor arrangement based on the digital value to scale the inputs to the ADC.

Abstract: A digital to analog converter having a plurality of power dividers interconnected into a binary tree configuration, each one having an input and a pair of electrically isolated outputs for dividing power of an input signal at the input equally between the pair of outputs. A plurality of amplifiers is coupled between one of the pair of outputs of the one of the power dividers in one stage of the tree and the input of one of the power dividers in a succeeding stage of the tree. A power combiner is coupled between outputs of the amplifiers in a last one of the stages and an output of the analog to digital converter.

Abstract: Embodiments of the present invention provide systems, devices and methods for modeling and correcting amplitude and quadrature phase errors generated within analog components of a receiver. A frequency-dependent correction method is employed that closely tracks the frequency dependent nature of the mismatch between the I and Q polyphase filter responses. In particular, digital correction is performed on a signal based on a modeled error function generated during a calibration of the receiver.

Abstract: Embodiments of apparatus and methods for applying a gain to an input signal are provided. An embodiment of a switched-capacitor gain stage circuit includes an input node, an output node, an operational amplifier, a correlated-double-sampling portion, a correlated-level-shifting portion, and a switching configuration. The operational amplifier has a first amplifier input, a second amplifier input, and an amplifier output. The correlated-double-sampling portion includes a plurality of sampling capacitors arranged in parallel and selectively coupled between the input node and a central node, and an offset storage capacitor including a first terminal coupled to the first amplifier input. The correlated-level-shifting portion includes a correlated-level-shifting capacitor including a first terminal coupled to the output node.

Abstract: A detecting device has: a detecting element to which a first constant voltage is applied; a resistance element connected to the detecting element; a switching element having a first terminal to the resistance element, a second terminal controlled to a second constant voltage lower than the first constant voltage, and a control terminal sets the first terminal and the second terminal in a conducting state; a control unit, according to a conducting/non-conducting state, controls voltage to the control terminal to maintain a potential difference between the detecting element and the resistance element; and an AD converter converting, into a digital value, a potential of a potential difference between the first constant voltage and the first terminal being voltage-divided at the detecting element and the resistance element to the detecting element, a first reference potential is the first constant voltage, and a second reference potential is voltage to the first terminal.

Abstract: A circuit for maximizing dynamic range in a digital to analog signal path comprises an input for receiving an input signal, a first gain stage coupled to the input having a first gain setting, an second gain stage coupled to the first gain stage, the second gain stage having an second gain setting, a controller configured to selectively increase the first gain setting and decrease the second gain setting according to the input signal level and an output coupled to the second gain stage for transmitting an output signal. A method for maximizing dynamic range in a digital to analog signal path comprises detecting a digital input signal level, detecting a desired user gain level, applying a first gain to the digital input signal, converting the digital input signal into an analog signal, and applying a second gain to the analog signal, wherein the first and second gain are selectively and inversely manipulated according to the digital input signal while maintaining a desired user gain level.

Abstract: An embodiment of an analog-to-digital converter system is described wherein an analog voltage signal Vin(t) is provided by an input amplifier. The analog signal Vin(t) has a predetermined full-scale range that is less wide than a reference voltage (Vref) range used by a downstream ADC to derive a first digital (numerical) representation D1(k) of a sampled value Vin(k) of the analog signal Vin(t). The first digital representation has N bits. A digital circuit then converts the N-bit D1(k) code to a second numerical representation D2(k) of the sampled analog voltage Vin(k) with respect to the full-scale range of the ADC system. The D2(k) code has P bits of resolution, which may be less than N bits. The P-bit D2(k) code representing Vin(k) is the output of the ADC system. Therefore, the width of the reference voltage range applied to the ADC is greater than the width of the system's full-scale range at the output of the system.

Abstract: A system for controlling a dynamic range of an analog to digital converter (ADC) signal is disclosed. The system includes an ADC configured to receive an ADC input signal and output ADC samples; an error computation block coupled to the output of the ADC and configured to compute an error based at least in part on a target and the ADC samples, wherein the target has a constraint that is indicative of a desired dynamic range of the ADC input signal; and an analog front end coupled to the input of the ADC, wherein the analog front end comprises a variable gain amplifier whose gain is adjusted based at least in part on the error.

Abstract: Methods and systems for presenting a current position of a vehicle on a moving map display are provided. The method includes determining a current position and a path of travel of the vehicle, determining a current position of at least one of a second vehicle, an object, and an area of interest wherein determining a current position of the second vehicle includes determining a path of travel of the second vehicle, and displaying a depiction of the vehicle and at least a portion of the at least one of the second vehicle, the object, and the area of interest at a first range setting. The method further includes automatically changing from the first range setting to a second range setting based on at least one of an approach autorange activation, an offscale traffic activation, and an offscale object or area of interest autorange activation, and displaying the ownship depiction and at least a portion of the at least one of the second vehicle, the object, and the area of interest at the second range setting.

Abstract: A capacitance measurement circuit and a capacitance measurement method thereof. The capacitance measurement circuit for measuring a capacitor under test includes a capacitance to time unit, a continuous time integrator and an analog to digital converter. The capacitance to time unit generates a first clock signal and a second clock signal reverse to the first clock signal according to a first charge time of the capacitor under test and a second charge time of a variable capacitor. The continuous time integrator receives the first clock signal and outputs an integral signal according to the first clock signal. When the number of clocks of the second clock signal is equal to a default value, the analog to digital converter outputs a digital signal corresponding to a capacitance difference between the capacitor under test and the variable capacitor according to the integral signal.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes an analog to digital converter circuit, a digital filter circuit, a data detector circuit, a mimic filter circuit, and a sample clock generation circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples. The digital filter circuit is operable to receive the digital samples and to provide a filtered output. The data detector circuit is operable to perform a data detection process on the filtered output to yield a detected output. The mimic filter circuit is operable to receive the digital samples and to provide a mimicked output. The sample clock generation circuit is operable to provide a sample clock based at least in part on the detected output and the mimicked output.

Abstract: A Sigma-Delta Modulator (SDM) has a summing junction that receives an input signal and a feedback signal, a multi-level analog-to-digital converter (ADC) that receives the SDM input signal and generates an ADC output, a first analog switch that receives the ADC output and generates a plurality of reference voltages, a second analog switch generating the feedback signal, where the feedback signal is selected from one of the reference voltages.

Abstract: A resolution-enhancing analog-to-digital signal conversion circuit is provided. The circuit includes a plurality of analog-to-digital converters arranged in parallel. Each analog-to-digital converter of the plurality of analog-to-digital converters is configured to output a digital signal that identifies an analog signal input to that analog-to-digital converter. The circuit further includes an input regulation module configured to clip the analog signal input to any of the plurality of analog-to-digital converters to within the voltage range corresponding to that analog-to-digital converter if such an analog signal otherwise is outside of the voltage range. The circuit further includes a controller configured to receive the digital signal output from each analog-to-digital converter and output an encoded signal based on one or more such digital signal that is received from an unclipped analog-to-digital converter having a highest analog-to-digital conversion resolution.

Abstract: A signal processing device includes amplifiers that are capable of amplifying detected signals using amplification factors that are different from each other; A/D converters that sample plural signals amplified by the amplifiers using the different amplification factors and output from the amplifiers; calculators that perform, on the basis of the amplification factors of the plural amplifiers, calculation on plural data pieces converted by the A/D converters; and a selector that selects one or more of output data pieces from among plural data pieces output from the calculators.

Abstract: Various embodiments of the present invention provide systems and methods for analog to digital conversion. As an example, a circuit for converting analog signals to digital signals is disclosed. The circuit includes a variable gain amplifier circuit, an analog to digital converter circuit, and a summation circuit. The variable gain amplifier circuit is operable to apply a first gain value to an input to yield a first amplified output, and to apply a second gain value to the input to yield a second amplified output. The analog to digital converter circuit is operable to receive a derivative of the first amplified output and to provide a corresponding first digital sample, and to receive a derivative of the second amplified output and to provide a corresponding second digital sample. The summation circuit is operable to combine the first digital sample and the second digital sample.

Abstract: An image sensor and digital gain compensation thereof. The image sensor includes a variable amplification device for amplifying an inputted analog image signal as a variable first gain value, an analog-to-digital conversion unit for converting the amplified analog image signal into a digital image signal, and a digital gain compensation device for comparing the first gain value with a reference gain value and compensating the digital image signal as a digital second gain value when the first gain value is less than the reference gain value.

Abstract: In AD conversion of a voltage, data continuity is ensured between the results of conversion after amplification and of direct conversion without amplification. In AD conversion operation, an analog signal output from a DA converter circuit is directly converted by an AD converter circuit, and the analog signal is converted after amplification with an expected gain of 2n. Based on resultant data, a gain of an amplifier circuit and an offset thereof are calculated. An analog signal to be enhanced in bit precision is amplified by the amplifier circuit and converted by the AD converter circuit, the offset is subtracted from the resultant conversion, and the result is multiplied by a ratio of the expected gain to the calculated gain to cancel gain error. Based on data with gain error canceled, acquisition of bit-extended conversion result data is performed to ensure continuity between data having different degrees of bit precision.

Abstract: The system converts an analog input signal into a digital output signal while avoiding interference, such as clipping. The system derives two signal components having differing signal magnitude levels from the analog input signal. The signal components are subjected to independent analog to digital conversion, such as through low resolution analog to digital converters. The system determines weighting factors for the two signal components based on at least one property of at least one of the signal components, such as the level of at least one of the signal components. The signal components are weighted. The weighted signal components are merged.

Abstract: A TDMA mobile terminal and noise suppression method for the same are provided. The mobile terminal includes a storage unit for storing a gain control table. The gain control table contains gain control values used for controlling gains of at least one of an outgoing audio signal and an incoming audio signal in order to suppress frequency dependent noise in the at least one signal. The mobile terminal also includes an audio processing unit for processing an audio signal by amplifying the audio signal according to applied gain control values. The mobile terminal further includes a control unit for measuring, during call processing, at least one of a transmit power level and a receive power level, determining corresponding gain control values from the gain control table, and applying the determined gain control values to the audio processing unit.

Abstract: A system for digitizing the magnitude of a first parameter, which can be inferred by applying to a second parameter and digitizing the magnitude of a resulting third parameter. The circuit which applies the second parameter has an associated bias point with which the magnitude of the second parameter varies. The value of the first parameter can result in an error in the value of the second parameter which results in an error being incurred when the digitized value of the third magnitude is used to infer a digitized value of the magnitude of the first parameter. This is avoided by adjusting the bias point with each successive trial and employing a sequential-trial ADC which performs sequential comparisons between the third magnitude and respective decision thresholds, such that there is no error in the magnitude of the second parameter when the third magnitude is equal to the decision threshold for a particular trial.

Abstract: In AD conversion of a voltage under measurement, data continuity is ensured between the result of conversion after amplification by using an amplifier circuit and the result of direct conversion without using the amplifier circuit. In AD conversion operation using a DA converter circuit, an amplifier circuit, and an AD converter circuit under the direction of a control circuit, an analog signal output from the DA converter circuit is directly converted by the AD converter circuit, and also the analog signal is converted therein after amplified by the amplifier circuit with an expected gain of 2n (“n” represents a positive integer). Based on resultant data thus obtained, a gain of the amplifier circuit and an offset thereof are calculated.

Abstract: Systems and apparatus are provided for interfacing a digital controller with an analog input means. The system comprises a digital controller with the input of the digital controller coupled to the output of the analog-to-digital converter. The system further comprises a digital-to-analog converter coupled to an analog interface circuit. The analog interface circuit comprises a reconfigurable RC network switchably coupled to a first amplifier or to a second amplifier. The analog interface circuit further comprises a third amplifier having an input being coupled to an output of the second amplifier and the output of the third amplifier being coupled to the one or more input signal paths to the first amplifier.

Abstract: A digital-analog converter circuit includes: a first digital-analog conversion part that obtains an analog output signal in response to a value of a digital input signal; and a second digital-analog conversion part that generates a control signal in response to a value of a digital gain control input signal externally input, wherein the first digital-analog conversion part adjusts a start voltage or end voltage of the analog output signal based on the digital gain control input signal for controlling the second digital-analog conversion part.

Abstract: A controller for a touch sensor includes a transimpedance amplifier, and a feedback resistor coupled to an input of the transimpedance amplifier and to an output of the transimpedance amplifier. At least one multiplexor may be coupled to the input of the transimpedance amplifier and configured to multiplex a plurality of analog inputs to one dedicated channel. The controller may further include a bandpass filter coupled to the output of the transimpedance amplifier. The output of the bandpass filter may be input to an anti-aliasing filter, which feeds into an analog to digital converter. Alternatively, the output of the bandpass filter may be input to a sigma-delta analog to digital converter.

Abstract: The present invention relates to a method for using the peak-to-average power ratio (PAR) of signals received by a receiver to control the gain of the receiver for an analogue-to-digital converter (ADC) and/or to control the dynamic range of the ADC.

Abstract: A method and apparatus is disclosed to extend a dynamic input range of an analog to digital converter (ADC). A composite ADC may include one or more ADCs. The one or more ADCs compare a signal metric of an analog input signal to quantization levels to produce intermediate digital output signals using one or more non-clipping input values. The composite ADC may select among the one or more intermediate digital output signals based on the signal metric of the analog input signal to produce a final digital output.

Abstract: An intermediate frequency receiving circuit and an intermediate frequency receiving method are provided. The intermediate frequency receiving circuit includes an inductor-capacitor (LC) resonance circuit whose primary resonance frequency is a central frequency of received signals. The LC resonance circuit receives intermediate frequency signals and suppresses transmitted signals and control signals. A band-pass filter connected to the LC resonance circuit filters the transmitted signals and control signals. An automatic gain control circuit connected to the band-pass filter compensates the attenuation of an intermediate frequency cable. A low-pass filter connected to the automatic gain control circuit compensates an in-band flatness. An analog-to-digital converter connected to the low-pass filter performs a sampling and digital demodulation on the received signals.

Abstract: A digital-to-analog converter for converting a digital signal into an analog signal is provided. The digital-to-analog converter includes a preprocessing unit, a gain controller, a modulator and an output unit. The preprocessing unit receives and oversamples the digital signal to generate an oversampled signal. The gain controller generates an adjusted signal with a gain function according to a reference signal associated with the oversampled signal when a specific condition is present. The modulator modulates the adjusted signal and generates a modulated signal. The output unit provides the analog signal to a load according to the modulated signal, wherein the analog signal gradually approaches to a specific level according to the gain function when the specific condition is present.

Abstract: A low-power, high-dynamic range, analog-to-digital (A/D) conversion circuit for converting an analog signal to a digital signal having a controllable amplifier for amplifying the analog signal received at an input of the amplifier in response to a first control signal and for generating an amplified analog signal, a low dynamic range A/D converter for converting the amplified analog signal to an intermediary digital signal, a controllable bit shift register for scaling the intermediary digital signal in response to a second control signal to generate the digital signal, and a gain control component (AGC) for generating the first control signal to cause the amplified analog signal to be within the dynamic range of the A/D converter and for generating the second control signal to cause the scaling to compensate for the amplification by the amplifier.

Abstract: A receiver including an automatic gain control module, a digital signal processor module, and a control module. The automatic gain control module has a gain that varies from a nominal value in response to the receiver receiving an input signal. The automatic gain control module is configured to generate a first signal in response to the gain settling at a value different from the nominal value. In response to the input signal not being an interference signal, the digital signal processor module is configured to process the input signal and generate a second signal. Subsequent to the first signal being generated and prior to the second signal being generated, the control module is configured to determine whether the input signal is an interference signal based on whether the second signal is generated within a predetermined time period subsequent to the first signal being generated.

Abstract: Disclosed herein are embodiments of an auto ranging system and method for an analog signal. A microprocessor is configured to digitally control the programmable gains of an operational amplifier based on the digital output of an A/D converter which may reside on or packaged along with the microprocessor. The amplifier receives a raw analog signal from a sensor and provides an amplified analog signal to the A/D converter. The gain of the amplifier generally corresponds to some range of the sensor signal. The A/D converter outputs a number of bits representative of the input signal. A microprocessor which is configured to digitally control the programmable gains of the amplifier receives and examines the output from the A/D converter and automatically adjusts the gain of the amplifier accordingly and as needed to keep or maintain the output from the A/D converter in a predetermined range.

Abstract: Imbalance and distortion cancellation for composite analog to digital converter (ADC). Such an ‘ADC’ is implemented using two or more ADCs may be employed for sampling (e.g., quantizing, digitizing, etc.) of an analog (e.g., continuous time) signal in accordance with generating a digital (e.g., discrete time) signal. Using at least two ADCs allows for the accommodation and sampling of various signals having a much broader dynamic range without suffering degradation in signal to noise ratio (SNR). Generally, the signal provided via at least one of the paths corresponding to at least one of the respective ADCs is scaled (e.g., attenuated), so that the various ADCs effectively sample signals of different magnitudes. The ADCs may respectively correspond to different magnitude and/or power levels (e.g., high power, lower power, any intermediary power level, etc.). Various implementations of compensation may be performed along the various paths corresponding to the respective ADCs.

Abstract: A gain control method is provided. In one embodiment, an amplifier amplifies a first signal according to a gain to obtain a second signal, and a converter converts the second signal to a digital signal. First, the gain is sequentially set to a plurality of gain values. A plurality of entropy values of the digital signal corresponding to the gain values is then calculated. A picked entropy value of the entropy values is then determined. The gain value corresponding to the picked entropy value is then determined as a picked gain value. Finally, the gain is set to the picked gain value for amplifying the first signal.

Abstract: A DA converter includes a first DA conversion section for obtaining an analog output signal in accordance with a digital input signal value, and a second DA conversion section for obtaining an analog gain control output signal in accordance with a digital gain control input signal value. In the DA converter, the gain control of the analog output signal generated by the first DA conversion section is performed on the basis of the gain control output signal generated by the second DA conversion section.

Abstract: A system for generating a programmable exponential analog output signal, comprising a digital to analog conversion circuit for converting said digital signal into an analog output signal, the digital to analog conversion circuit having a substantially exponential transfer function defined by a programmable ratio of values of components. Preferably, the conversion circuit is implemented as a current mirror (100), with the exponential transfer function being defined by the mirror ratio. Thus, each transistor of the current mirror (100) defines a step of the digital to analog conversion circuit, and the ratio between adjacent steps is substantially constant. The transistors may be substantially equally sized or binary weighted relative to each other, and can be switched from the input to the output under the control of a tree based thermometer line decoder.

Abstract: A device (100) for processing data, the device (100) comprising a plurality of signal paths (130, 140, 150) each receiving an identical analog input signal (104), at least one signal conditioning unit (101 to 103) in at least one of the plurality of signal paths (130, 140, 150), wherein each signal conditioning unit (101 to 103) is adapted for generating a respective analog intermediate signal (105 to 107) by manipulating a property, particularly an amplitude, of the analog input signal (104), and a plurality of analog to digital converting units (108 to 110) each of which being assigned to a corresponding one of the plurality of signal paths (130, 140, 150) and being supplied with the analog input signal (104) or a respective analog intermediate signal (105 to 107), wherein each of the plurality of analog to digital converting units (108 to 110) is adapted for generating a respective digital intermediate signal (111 to 113) based on the respective analog intermediate signal (105 to 107) or based on the analo

Abstract: An analogue to digital conversion unit (208, 210) comprises three analogue to digital converters (ADCs) (300, 301, 302) having different dynamic ranges. A lowest dynamic range ADC (300) and middle dynamic range ADC (301) have saturation detectors SAT for outputting a signal when the amplitude of an input analogue signal reaches their respective dynamic ranges and saturates them. The middle dynamic range ADC (301) and highest dynamic range ADC have enable inputs EN for switching themselves on. The output of the saturation detector SAT of the lowest dynamic range ADC (300) is connected to the enable input EN of the middle dynamic range ADC (301). The output of the saturation detector SAT of the middle dynamic range ADC (301) is connected to the enable input EN of the highest dynamic range ADC (302).

Abstract: A CLK generating section of a digital ALC generates a multiplication clock signal that is obtained by multiplying a triangular wave generated at a triangular wave generating circuit. On the basis of the multiplication clock signal, a signal converting section converts a one-bit digital audio signal outputted from an outputting stage into a multi-bit digital signal, and monitors a voltage value of an input signal. A level controlling section controls a voltage level on the basis of a target level inputted from an exterior of an LSI. On the basis of a control signal inputted from an exterior of the LSI, a volume controlling section outputs, to a PGA, a gain adjusting signal so as to vary a waveform of an input signal.

Abstract: A blending circuit is disclosed to be operable to combine plurality of digital outputs received from an analog to digital conversion system to create a composite digital signal. The analog to digital conversion system receives analog signals originated from multiple but substantially the same source signals, wherein the source signals being scaled to different degrees. A blending circuit deploys a blending factor to combine the digital outputs in a manner which blends and/or adjusts portion of each digital output being used to avoid over-flown portion of the digital outputs and to minimize phase and/or amplitude discontinuity of the composite digital signal.

Abstract: A pipeline analog-to-digital converter (ADC) comprises a plurality of pipeline stages is disclosed. The first pipeline stage has programmable gain function. The first pipeline stage includes a sub-analog-to-digital converter (sub-ADC) and a multiplying digital-to-analog converter (MDAC) implemented by switched capacitor (SC) circuits. Different capacitances in the sub-ADC and MDAC are provided so as to provide different gains by controlling switches in the SC circuits.

Abstract: The present system provides a method for varying the value of passive components in electronic circuits. Passive components can range from basic resistors, capacitors, and inductors to complex, structures such as transmission lines and resonant cavities. Value selection and variation can either be dynamically performed during circuit operation or as a one-time part of the manufacturing process as determined by the requirements of the specific application. A digital-to-analog converter (DAC) circuit is used to input value selection data digitally, and control value selection with value resolution dependent on the resolution of the DAC. An alternate embodiment is provided for high frequency operation.

Abstract: Methods and systems for presenting a current position of a vehicle on a moving map display are provided. The method includes determining a current position and a path of travel of the vehicle, determining a current position of at least one of a second vehicle, an object, and an area of interest wherein determining a current position of the second vehicle includes determining a path of travel of the second vehicle, and displaying a depiction of the vehicle and at least a portion of the at least one of the second vehicle, the object, and the area of interest at a first range setting. The method further includes automatically changing from the first range setting to a second range setting based on at least one of an approach autorange activation, an offscale traffic activation, and an offscale object or area of interest autorange activation, and displaying the ownship depiction and at least a portion of the at least one of the second vehicle, the object, and the area of interest at the second range setting.

Abstract: An analog-to-digital conversion arrangement converting an input analog signal into an output digital representation. Two or more analog-to-digital conversion paths each applying a conversion mapping between input analog signal magnitudes and respective digital values generate an intermediate representation of the input analog signal, the conversion paths being operable to apply different respective conversion mappings. An output circuit combines the intermediate representations from at least two conversion paths to generate the output digital representation, the intermediate representations being combined according to a weighting dependent on the magnitude of the input analog signal. At least one of the conversion paths has an enhanced sensitivity mode appropriate to a range of magnitudes of the input signal that are below a threshold magnitude. Control logic inhibits operation in the enhanced sensitivity mode if the magnitude of the input analog signal exceeds the threshold magnitude.

Abstract: This invention relates to adjusting a filter of a time-continuous Sigma-Delta converter arranged to convert an analog input signal (Sin) to a digital output signal. A control signal indicative of a gain of the filter is provided, and the gain of the filter is adjusted in dependence of the control signal. The control signal is provided from the digital output signal of the Sigma-Delta converter. In this way the performance of the Sigma-Delta converter can be improved in a simple way that requires no or few additional analog components, and the Sigma-Delta converter itself is used to adjust its performance. Using a signal from the digital domain of the Sigma-Delta converter is advantageous in that it is typically easier, faster and more precise to process signals in the digital domain.

Abstract: A method and a device are disclosed for digitizing an analog electrical signal, in which the signal is applied to a number of subchannels connected in parallel. In at least one embodiment, the amplitude ranges of immediately adjacent subchannels with respect to amplitude are in each case displaced overlapping one another, in which the overlapping amplitude ranges include the total amplitude range, in which a subchannel serves as reference channel, in which, on the basis of the reference channel, the digital output value of the immediately adjacent subchannel with respect to amplitude is corrected when the signal is in the overlap range of the two subchannels and the digital values differ from one another, and in which a total digital value is output by way of a digital output value, taking into consideration the displacements of the amplitude ranges with respect to one another.