Abstract: Methods and system for providing a security function, such as random number generation, fingerprinting and data hiding, using a Flash memory. The methods and systems do not require carefully design specific circuits, can be implemented in all flash memory device. The fingerprinting methods and systems do not require a long time to generate a read and the data hiding is decoupled from Flash memory content.

Abstract: Biphase mark codes (BMC) are used in digital communications. Most BMC formats use preambles for rate determination and synchronization. A decoder compares the intervals of continuous high or continuous low voltages in a BMC stream to predetermined minimum and maximum values of half cell, full cell and one-and-a-half cell intervals for all supported sampling rates. If a pattern matching a preamble is found, the sampling rate is locked in and the decoder is synchronized to the BMC stream. Once locked, the decoder uses the predetermined minimum and maximum values at the locked rate to generate half cell, full cell and one-and-a-half cell indicators for a decoding state machine which decodes data in the BMC stream or decodes expected preambles.

Abstract: This application relates to decoding signals that carry clock and data information. In particular, it relates to construction a time-varying histogram of inter-arrival times between pulse edges and using the histogram to identify whether a pulse edge encodes a single length interval, a double length interval or some longer length interval. Further details and embodiments of the technology disclosed are provided in the drawings, detailed description and claims.

Abstract: A method for coding information in an electronic circuit and an electronic circuit for coding information uses at least two electrically coupled signal paths (X0, X1). Cross-talk between two electrically coupled signal paths (X0, X1) can be utilized to perform logical computation. A signal is propagating on two signal paths (X0, X1) in the form of either rising or falling transitions. The relative delay between the transitions on the two paths (X0, X1) determines the logic value of the output signal (X) to be produced. If the signal on the first paths (X0) propagates faster than the signal on the second path (X1), an output signal (X) having a first logic value is produced. If the signal on the second path (X1) propagates faster than the signal on the first path (X0). an output signal (X) having a second logic value is produced.

Abstract: In an optical coupled isolation circuit, a PWM encoder encodes a one-bit binary data signal supplied from a sigma-delta analog-digital converter in synchronization with a clock signal of a cycle T to produce a pulse width modulation signal. The pulse width modulation signal includes a narrower pulse having a width of 1/T and a wider pulse having a width of 3/T according to binary codes “0” and “1”. The pulse width modulation signal is transmitted to a decoder as a recovered pulse width modulation signal through a light emitting device, a light detector and an optical recovery circuit. A decoder decodes the recovered pulse width modulation signal at timing of a half of the clock cycle from each rising edge of the recovered pulse width modulation signal. The rising edge is synchronized with the clock signal. Thus, the clock signal and the data signal can be transmitted in one channel.

Abstract: A clock signal and data is recovered from a variable rate signal including biphase mark encoded digital audio data. Such recovery involves regularly determining a minimum or maximum pulse width in the biphase mark encoded digital audio data using a high frequency clock. This pulse width is used to define a window in which a transition in the biphase mark encoded digital audio data may be detected. If a transition occurs in the defined window, a data one is output; if a transition does not occur in the defined window, a data zero is output. The recovered clock has a period of twice the minimum pulse width. A minimum or maximum pulse width can be tracked with an accumulator with decay. In particular, if the data rate of the input signal becomes faster, the shortest pulse will become shorter and a minimum value stored by the accumulator will become shorter. If the data rate of the input signal becomes slower, the longest pulse will become longer and any maximum value stored by the accumulator will become longer.

Abstract: The invention is a method and apparatus for compression of binary data. The signal is used before modulation to increase the effective transmission rate by compressing it prior to being encoded onto a magnetic tape or other storage media. The transition bits of the data have a bit period no smaller than the smallest bit period without increasing the maximum frequency. However, non-transition bits have a bit period smaller than that of the transitioning bits. Since there is at least one full bit period between any two transitions, the maximum frequency is unaffected and is used for synchronization. Noise in a transmission is masked using bit period information, and since no other transition can be valid until at least the transition bit period has passed, noise occurring before passage of the transition bit period does not result in an error.

Abstract: The invention is a method and apparatus for compression of binary data. The signal is used before modulation to increase the effective transmission rate by compressing it prior to being encoded onto a magnetic tape or other storage media. The transition bits of the data have a bit period no smaller than the smallest bit period without increasing the maximum frequency. However, non-transition bits have a bit period smaller than that of the transitioning bits. Since there is at least one full bit period between any two transitions, the maximum frequency is unaffected and is used for synchronization. Noise in a transmission is masked using bit period information, and since no other transition can be valid until at least the transition bit period has passed, noise occurring before passage of the transition bit period does not result in an error.

Abstract: A data demodulating technique for binary data defined by a pulse code modulated signal. The technique involves digitizing the data signal read by a magnetic head from the stripe of a magnetic card. The time interval between peaks in the digitized signal is determined to provide peak interval values. The peak interval values form the basis for determining the end of a character and also by a pattern matching technique against idealized data form the basis for determining the character itself.

Abstract: Embodiments of the present invention are directed to a method and apparatus for compression of binary data. In one embodiment of the present invention, a modulated signal is compressed. In one embodiment, data is transmitted using an FM signal that is compressed without increasing the maximum frequency. In one embodiment, transition bits have a bit period no smaller than the smallest bit period possible without increasing the maximum frequency. However, non-transition bits have a bit period smaller than that of the transitioning bits. In one embodiment, a header sequence known to the receiving system is transmitted and used to synchronize the receiving system. In one embodiment, the header sequence contains a series of transition bits to assist in synchronization. In yet another embodiment, the header contains a non-transition bit to determine the non-transition bit period. In another embodiment, binary data is compressed before being stored in a storage device.

Abstract: The invention relates to a method for the sampling of biphase coded digital signals by reception means which have at least one signal input having switchable signal edge sensitivity or at least two signal inputs having different signal edge sensitivity for the reception of such signals. The signals to be received are sampled precisely once per data bit, namely during the transmission of the first half-bit. The signal edges (F1-F5) of each bit are utilized for synchronizing the signal input with the control signal and for detecting transmission errors. Each signal sampling (S1-S5) is followed by a time window (&Dgr;t) within which the reception of the signal edge of the present bit is expected and evaluated as permissible. The signal edge sensitivity of the at least one signal input is set as a function of the sampled logic level of the first half-bit of the respectively transmitted bit of the signal.

Abstract: A method for decoding information contained in a waveform having a series of peaks is disclosed which is particularly directed to a method for reading a magnetic stripe for example on a card that allows the information on the stripe to be read without the need for unidirectional, single stroke swiping motion of the stripe. Features are disclosed that permit the accurate decoding of magnetic stripe data to define the bi-phase coded bits in the presence of signal degradations caused specifically, but not exclusively, by variations in the read speed including stop events and reversals. The method uses sampling of the waveform at a variable rate based upon the area of the waveform. The samples are used to locate peaks in the waveform, the profiles of which are then compared using various criteria with trained model peaks to classify the peaks into different types based upon the intersection between the different bits allowed under the bi-phase coding rules.

Abstract: An encoder is provided that converts data words into code words. The code words, when concatenated together, are such that sub-strings of consecutive first symbols in the code words have no more symbols than a maximum number; sub-strings having the maximum number of consecutive first symbols and beginning at selected locations within the code words appear without restriction, and sub-strings having the maximum number of consecutive first symbols and beginning at locations other than the selected locations appear only where the sub-string is concatenated with an acceptable secondary sub-string. A method is also provided for generating a set of such code words for an encoder.

Abstract: A device including a mechanism (4) for generating a counting clock signal (CKM) whose frequency is less than or equal to n times twice the transmission frequency. The device also includes a detection mechanism (10) for detecting the transitions (TD) of the signal (DS) at the counting frequency and for delivering corresponding detection signals (ST), a selection mechanism (2) for receiving each detection signal (ST) and for delivering or otherwise a selection signal (RS) depending on the satisfying or otherwise of a predetermined selection criterion, and a frequency divider-by-n (30) which receives the counting clock signal, in order to sample the carrier signal after a predetermined time delay (Tr) after each detected transition. Provided are a sampling control device and method which are completely digital and therefore use no analog component of the phase-locked loop type and are very simple to produce at an industrially economical cost.

Abstract: A method and apparatus for bias suppression which includes a transmitter having a bias suppression encoder and a closed-loop VCO FM modulator and a receiver having a bias suppression decoder and an AC coupled FM demodulator. The bias suppression encoder generates a running sum of an encoded digital data signal as well as the sum of an (N+1)-bit block of an injected digital data signal such that the encoder may invert a block of (N+1) -bits of the injected data signal if both sums are of the same polarity thereby reducing the average DC bias of the encoded digital data signal. The encoded data signal is modulated using a closed-loop VCO FM modulator with the DC tracking effect minimized as compared to modulating the non-encoded signal directly. In the receiver having an AC coupled FM demodulator, the bias suppression decoder extracts a stuff bit set by the transmitter and inverts the received block of data if the stuff bit is true. Alternately, the received data block is not inverted if the stuff bit is false.

Abstract: Real time decoding methods and apparatus for a card transaction terminal used for reading a magnetic stripe on a data card. The method is implemented in a microcomputer employed in the terminal. The data decode method for the microcomputer decodes data in real time as it is read from the magnetic stripe on the card and obviates random access memory external to the microcomputer. A memory is provided in the terminal large enough to store data characters corresponding to at least one predetermined data field on the card generated during a swipe of the card but insufficient to store all of the self clocking signals generated during the swipe. A sentinel character in the self clocking signals is first decoded. Then, a data character associated with the at least one predetermined data field is decoded in response to a predetermined number of self clocking signals generated subsequent to the sentinel character. Finally, the decoded data character is stored in the memory.

Abstract: The invention doubles the bit rate for a given media bandwidth as compared to, for example, Manchester encoding. It is applicable to serial transmission or storage of digital data. An arbitrary NRZ data stream is first encoded by a pre-encoding method, such as Manchester, that combines clock and data to represent a single NRZ bit in one clock cycle. A toggle flip flop then re-encodes the pre-encoded waveform, thus generating a double toggle (DT) encoded waveform, which spreads the spectral energy over a larger bandwidth and encodes two NRZ data bits within one transmission clock cycle. In the case of Manchester pre-encoding, data is decoded by determining if there are transitions nearly synchronous with an edge of the recovered clock. For other pre-encoding methods, decoded data is determined by the length of the transition period and the edge polarity of the recovered clock at the leading edge of the transition within the DT encoded waveform.

Abstract: A two-frequency data signal, also known as a biphase or F/2 F signal, is accurately decoded by sampling the signal and digitizing the samples to provide a series of digital values representing the signal. An intelligent digital filter manipulates the digital values to decode the signal, by detecting the peaks in the sampled signal and decoding the signal by analyzing the location and amplitudes of the peaks. Only peaks which are outside a guard band may be detected. If the signal cannot be properly decoded with a wide guard band, the guard band may be repeatedly narrowed, until a minimum guard band is reached.Bits are identified by comparing the displacements between peaks to a bit cell width. An even number of displacements indicates a `0` bit, and an odd number of displacements indicates a `1` bit. After decoding, the bits are converted into bytes. Parity and longitudinal redundancy code checks are used to correct bad bits.During decoding, many indications of a degraded signal may be obtained.

Abstract: A two-frequency data signal, also known as a biphase or F/2F signal, is accurately decoded by sampling the signal and digitizing the samples to provide a series of digital values representing the signal. An intelligent digital filter manipulates the digital values to decode the signal, by detecting the peaks in the sampled signal and decoding the signal by analyzing the location and amplitudes of the peaks. Only peaks which are outside a guard band may be detected. If the signal cannot be properly decoded with a wide guard band, the guard band may be repeatedly narrowed, until a minimum guard band is reached. Bits are identified by comparing the displacements between peaks to a bit cell width. An even number of displacements indicates a `0` bit, and an odd number of displacements indicates a `1` bit. After decoding, the bits are converted into bytes. Parity and longitudinal redundancy code checks are used to correct bad bits. During decoding, many indications of a degraded signal may be obtained.

Abstract: A two-frequency data signal, also known as a biphase or F/2F signal, is accurately decoded by sampling the signal and digitizing the samples to provide a series of digital values representing the signal. An intelligent digital filter manipulates the digital values to decode the signal, by detecting the peaks in the sampled signal and decoding the signal by analyzing the location and amplitudes of the peaks. Only peaks which are outside a guard band may be detected. If the signal cannot be properly decoded with a wide guard band, the guard band may be repeatedly narrowed, until a minimum guard band is reached.Bits are identified by comparing the displacements between peaks to a bit cell width. An even number of displacements indicates a `0` bit, and an odd number of displacements indicates a `1` bit.