Abstract: An apparatus for determining a number of successive equal bits preceding an edge within a bit stream including a repetitive bit sequence includes an edge number determiner, an edge selector, a time stamper and an equal bits determiner. The edge number determiner determines a preset number of edges. The preset number of edges is coprime to a number of edges of the repetitive bit sequence or coprime to a maximal number of edges of the repetitive bit sequence. The edge selector selects edges of the bit stream spaced apart from each other by the preset number of edges. Further, the time stamper determines a time stamp for each selected edge of the bit stream and the equal bits determiner determines the number of successive equal bits preceding the edge based on determined time stamps of selected edges.

Abstract: Methods and apparatus for compressing data for network transport in support of continuous availability of applications are described. One computer-implemented method of compressing data includes receiving a current instance of data in an input buffer. A candidate chunk of data is selected from the input buffer. A signature hash is computed from a signature length range of data within the candidate chunk. A matching dictionary entry having a matching signature hash from a multi-tiered dictionary is identified. The matching dictionary entry prospectively identifies a location of a prior occurrence of a selected range of consecutive symbols including the signature length range of data within at least one of the current instance of data and a prior instance of data in the input buffer. A dedupe processed representation of the instance of data is formed wherein a dedupe item is substituted for the selected range of consecutive symbols if the selected range is verified as recurring.

Abstract: Digital data encoding and decoding method and system is provided. The data encoding includes encoding a frame signal into a bit stream, including detecting a specific bit pattern in the bit stream when the frame signal is present, generating a control signal in respect to the specific bit pattern, and encoding the bit stream into one or more marks and one or more spaces so that encoded data include a unique encoding pattern for the frame signal. The data decoding includes detecting at least one of mark and space from encoded data, recovering a bit stream from the encoded data when the at least one of mark and space is present, detecting a specific bit pattern associating with a frame signal from the encoded data when the at least one of mark and space is present, and recovering the frame signal from the encoded data.

Abstract: An improved RFID Tag, Interrogator, and system wherein at least one tag modulates a radio frequency signal by modulated backscatter operations.

Abstract: The object of the present invention is to provide a waveform shaping device and an error measurement device which can perform a waveform shaping operation with the sufficient amplitude margin, even if the mark ratio of the inputted data signal is significantly varied and the amplitude of the inputted data signal is decreased.

Abstract: A method for coding information in an electronic circuit and an electronic circuit for coding information uses at least two electrically coupled signal paths (X0, X1). Cross-talk between two electrically coupled signal paths (X0, X1) can be utilized to perform logical computation. A signal is propagating on two signal paths (X0, X1) in the form of either rising or falling transitions. The relative delay between the transitions on the two paths (X0, X1) determines the logic value of the output signal (X) to be produced. If the signal on the first paths (X0) propagates faster than the signal on the second path (X1), an output signal (X) having a first logic value is produced. If the signal on the second path (X1) propagates faster than the signal on the first path (X0). an output signal (X) having a second logic value is produced.

Abstract: A communication system, source and destination ports of the communication system, and methodology is provided for transporting data in one of possibly three different ways. Data is transported across the network at a frame sample rate that can be the same as or different from the sample rate or master clock within the source port or the destination port. If the sample rate of the source port is known, the sample rate of the destination port can be created using a PLL within the destination port and simply employing a phase comparator in the source port. The phase comparator forwards the phase or frequency difference of the network transfer rate and the source sample rate to the destination port, which then generates a local clock equivalent to the source which then compiles audio data being played at the same rate in which it was sampled at the source. Where economically feasible, sample rate conversion can be used at the source.

Abstract: An ultra-wideband pulse modulation apparatus, system and method is provided. The pulse modulation method increases the available bandwidth in an ultra-wideband, or impulse radio communications system. A set of different pulse transmission, or emission rates are employed to represent different groups of binary digits. The modulation and pulse transmission method enables the simultaneous coexistence of the ultra-wideband pulses with conventional carrier-wave signals. This method may be used in wireless and wired communication networks such as CATV networks. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to guickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

Abstract: An ergonomic computer keyboard which integrates conventional keyboard features to form a Multi-Dexterous Keyboard (MDK) system designed to minimize Repetitive Stress Injuries. Specific emphasis is placed on the general and simultaneous utilization by either a single or dual handed, full or limited dexterity, and right and left oriented keyboard user. The ergonomic computer keyboard system is described as a solid and/or split contoured keyboard with centralized composite keys disposed thereon to reduce finger reach within one-hand span. Language characteristics are statistically extrapolated and arranged based on the most used letters or groups of letters in the form of digraphs (coupled letters) and trigraphs (tripled letters, etc.) for efficient utilization of the keyboard via either a dual or single handed user. A special partition of the keyboard provides numerous ergonomic arrangements with simultaneous use as either a Left-Hand-Side (LHS) or Right-Hand-Side computer keyboard module.

Abstract: An encoder is provided that converts data words into code words. The code words, when concatenated together, are such that sub-strings of consecutive first symbols in the code words have no more symbols than a maximum number; sub-strings having the maximum number of consecutive first symbols and beginning at selected locations within the code words appear without restriction, and sub-strings having the maximum number of consecutive first symbols and beginning at locations other than the selected locations appear only where the sub-string is concatenated with an acceptable secondary sub-string. A method is also provided for generating a set of such code words for an encoder.

Abstract: A binary data encoding and decoding technique that alternates between starting polarities of a signal for both each occurrence of a binary 1 and each occurrence of two or more consecutive binary 0's. To encode a binary 1, the signal is one polarity for one-half of a bit interval and then the other polarity for the other half of the bit interval. To encode a binary 0, the signal remains at a zero level, unless there are two or more consecutive binary 0's, in which case the signal will be one polarity for the second half of the first binary 0 bit interval, the other polarity for the first half of the second binary 0 bit interval, and repeat this waveform for every for every two adjacent binary 0's. Decoding occurs by examination of either the signal level as compared to predetermined cut-levels, or the time equivalent distance between the peaks.

Abstract: A method for transmitting "biphase" encoded digital signals including the steps of setting an aperture corresponding to a data bit; dividing said aperture into a plurality of segments; setting a first segment, selected from said plurality of segments of said aperture, dependent upon whether the bit is a digital one or zero; setting a second segment, selected from said plurality of segments of said aperture, so as to fit the remaining aperture of the data bit; and, transmitting said first and second segments of said data bit; wherein a narrow spectrum results containing no low frequency components and separated from 0 Hz by an amount equal to the data rate or 1/2 the data rate.

Abstract: An original digital signal is converted into either a Miller-squared code signal or a Miller code signal, and undergoes serial-to-parallel conversion to produce n-phase signals (where n is desired to be a positive even number). N-phase virtual demodulated signals are simultaneously generated at clock timing having a period equivalent to 1/n times the period of the transmission clock. Out of the n-phase virtual demodulated signals, n/2 phases are selected to undergo parallel-to-serial conversion, the original digital signal being thus obtained.

Abstract: A self-clocking three-part encoded data stream is recorded on a magnetic media during a velocity varying period of time. The recording device encodes clock and data pulses. The polarity of the clock and data pulses are requried to be known in order to correctly decode the encoded information. Without this polarity information, the equipment manufacturer will be tightly constrained to maintain the proper coil wiring convention to ensure the correct pulse polarity for the decode process. The Data Alignment scheme provides a reliable method for detecting the encoded data and clock pulse polarity.

Abstract: An original data stream encoded into an M.sup.2 coded data stream having a plurality of bit cells has a synchronizing signal with a unique sync pattern based on the logic levels of the original data stream inserted into the M.sup.2 coded data stream. The unique pattern forming the synchronizing signal is constructed so as not to appear as a pattern in the combined data stream other that at the locations of the inserted synchronizing signal. As a result, random M.sup.2 coded data patterns are not erroneously detected to be a sync pattern, thereby avoiding a synchronization shift and the occurrence of a synchronization error. Accordingly, a correct and stable synchronization can be established so as to enable reproduction of an original data stream with high fidelity.

Abstract: There is provided a method of modulating a data bit series consisting of a first value (e.g. 1) and a second value (e.g., 0) whereby a transition as a state transition is caused so as to satisfy the following conditions of (a) to (d).(a) The transition at the boundary portion of the bit cell which is sandwiched by bits 0.(b) The transition at the central portion of the bit cell of bit 1.(c) Among an even number of the bits of 1 which are sandwiched by bits 0, the transition is inhibited at the central portion of each bit cell of the last two bits of 1 and the transition is caused at the boundary portion of these two bit cells of 1.(d) When at least one bit in a pattern which starts from the two bits of (01) appears at a location next to an even number of the bits of 1 subsequent to bit of 0, the transition is caused at the central portion of the bit cell of bit 0 between these two bits.