Abstract: A display apparatus connected to an external device through a connection unit and a method of determining the format of an input image uses a connection unit to be connected to an external device and determines the format of a video signal input through the connection unit. Accordingly, it is possible to realize a slim display apparatus.

Abstract: The semiconductor device includes a transistor and a capacitor element which is electrically connected to a gate of the transistor. Charge held in the capacitor element according to total voltage of voltage corresponding to the threshold voltage of the transistor and image signal voltage is once discharged through the transistor, so that variation in current flowing in the transistor or mobility of the transistor can be reduced.

Abstract: A pixel includes an organic light emitting diode, a first transistor configured to control a connection between a first power source and the organic light emitting diode, a second transistor configured to control a connection between a reference power source and the gate electrode of the first transistor, a third transistor, a fourth transistor, and a fifth transistor connected such that, when the third transistor, the fourth transistor, and the fifth transistor are all turned on, a data line is coupled to an anode electrode of the organic light emitting diode; and a storage capacitor having a first electrode coupled to the gate electrode of the first transistor and having a second electrode coupled to a common node between the third and fifth transistors, wherein the fourth transistor is configured to drop a voltage of a data signal on the data line by a threshold voltage of the fourth transistor.

Abstract: A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors.

Abstract: Reduction of luminance dispersion of a plurality of light-emitting panels combined into one light-emitting device is achieved by the use of a new light-emitting device which has a photosensor, a plurality of light-emitting panels, DC/DC converters connected to their respective light-emitting panels, and a control circuit configured to control output currents of the DC/DC converters in accordance with illuminance data acquired with the photosensor. The control circuit successively turns on the plurality of light-emitting panels, and controls the output currents of the DC/DC converters in accordance with differences of the illuminance data acquired with the photosensor when the light-emitting panels are turned on.

Abstract: A later generation display device may be connected to the video output port of an older electronic device which utilized an earlier generation display such as a dot matrix display. The early generation display is replaced with the later generation display. The display device includes software which receives graphic data through the video output port and identifies which frame is currently being streamed. The display device matches the frame being streamed to a stored graphic frame having a higher resolution and/or color. The matched frame is delivered to the later generation device so that the user can experience a higher quality visual effect by retrofitting the older electronic device with the later generation display.

Abstract: An apparatus may include a device and an image projection system configured to form an image on a surface viewable by a user. The image projection circuit may be configured to receive signals from the device, generate a pattern representative of data, process the pattern into a mirror image of the image, and project the mirror image from the device. The image projection system may include an electro optic system for generating the pattern, and an optics system for projecting the mirror image onto the surface. A method for projecting data may include providing the device with the image, and providing the image to the surface with the image projection system. The method may also include manipulating the device and/or a body part to locate and focus the image, sensing an orientation of the device, and orienting the image based, at least in part, on the sensing step.

Abstract: An image display system is disclosed. A gate driver drives includes a first side driving circuit and a second side driving circuit. The first and the second side driving circuits are disposed on the both sides of the pixel array. A first shift register receives a first shifted signal to generate a second shifted signal such that the gate driver drives a first row of pixels. A second shift register receives a third shifted signal to generate a fourth shifted signal. A third shift register is coupled to the second shift register and receives the fourth shifted signal to generate a fifth shifted signal such that the gate driver drives a second row of pixels. The first and the third shifted signals are simultaneously generated according to a vertical start pulse, and the second and the fourth shifted signals are simultaneously output.

Abstract: A display unit with which diffraction reflection is able to be decreased is provided. The display unit includes a display section having an organic EL device and a pixel circuit for every pixel. The pixel circuit has a first transistor for writing a video signal and a second transistor for driving the organic EL device based on the video signal written by the first transistor. The second transistor has a gate, a source and a drain. The organic EL device has an anode, an organic layer, and a cathode. An upper face of the source or the drain is formed at least in a region opposed to the anode or the cathode.

Abstract: A shift register is disclosed which includes, at respective stages, unit circuits (11) each including (i) a flip-flop (11a) including first and second CMOS circuits and (ii) a signal generation circuit (11b) for generating an output signal (SROUTk) for the current stage with use of an output (Q, QB) of the flip-flop (11a), the shift register including a floating control circuit (11c) between a gate terminal of an output transistor (Tr7) of the signal generation circuit (11b) and a Q terminal. This makes it possible to reduce a circuit scale of a display driving circuit without causing a shift register to malfunction.

Abstract: Provided is a liquid crystal display device with reduced power consumption employing a CS drive method. A CS driver (500) consists of a CS shift register (510) and a CS output portion (520). The CS shift register (510) outputs control signals (COUT(1) to COUT(m)) in accordance with a CS clock signal CCK. The CS output portion (520) outputs auxiliary capacitance signals (CSS(1) to CSS(m)) in accordance with the control signals (COUT(1) to COUT(m)), respectively. An idle period (T2) is set following a scanning period (T1). During the idle period (T2), the CS driver (500) is driven in accordance with the CS clock signal (CCK) at an idle-period CS frequency (fcck2). The idle-period CS frequency (fcck2) is lower than a scanning-period CS frequency (fcck1).

Abstract: A structure of a pixel and an organic light emitting display device using the same are provided. The pixel includes an organic light emitting diode; a first transistor controlling the amount of current supplied from a first power source to the organic light emitting diode depending on a voltage applied to a second node; a second transistor coupled between a data line and a first node, and turned on when a scan signal is supplied to a first scan line; a third transistor coupled between the first power source and the first node, and turned on when the scan signal is supplied to a second scan line; a fourth transistor coupled between the first power source and the second node, and turned on when the scan signal is supplied to the second scan line; and a storage capacitor coupled between the first and second nodes.

Abstract: An organic light emitting display capable of improving display quality. The organic light emitting display includes a data driver for supplying bias power supply to data lines in a first period of one frame, for supplying reference power supply in a second period, and for supplying data signals in a fourth period, a scan driver for sequentially supplying scan signals to scan lines in the fourth period, pixels positioned at intersections of the scan lines and the data lines, and a first control line, a second control line, a third control line, and a fourth control line commonly coupled to the pixels. Each of the pixels includes a first capacitor for previously charging voltages corresponding to the data signals and a second capacitor charged by a voltage of the first capacitor in a third period between the second period and the fourth period.

Abstract: An image display method includes alternately receiving left and right images of a 3D image; and turning on a backlight such that the backlight is on only in periods when the left images are displayed or only in periods when the right images are displayed. A method of controlling shutter glasses separately for left and right images of a three-dimensional (3D) image includes alternately receiving the left and right images of the 3D image; and opening two shutters of the shutter glasses only in periods when the left images are received or only in periods when the right images are received.

Abstract: A liquid crystal panel unit, a display device, and a method of manufacturing the same, in which the display device includes: a display panel that includes a display region; a gate driver that applies a gate signal to the display region; a data driver that applies a data signal to the display region; a vertical synchronization signal line that transfers a vertical synchronization start signal to the gate driver; a data signal line that transfers the data signal to the data driver; and an isolation pattern that is arranged between the vertical synchronization signal line and the data signal line. The isolation pattern intercepts an electromagnetic field that is generated and prevents image degradation.

Abstract: A control is provided that includes a current altering device for control of peripheral devices and a display having a first segment, second segment and third segment and the first and second segments are not located in the same plane. The display includes at least one touch sensitive segment to operate a peripheral control function. The display includes alphanumeric display areas adjacent to first and second segments. In an embodiment the display may have an arc shape and the first segment is located at an apex of the arc of the display in a first plane and a second segment is located in a second plane.

Abstract: Disclosed are a shift register and a flat panel display device. The shift register includes a plurality of stages that supply a gate-on voltage pulse to a plurality of gate lines formed in a display panel. Each of the stages includes a pull-up transistor configured to supply one of a plurality of clock signals to an output node according to a voltage of a first node, a pull-down transistor configured to supply a gate-off voltage to the output node according to a voltage of a second node, a node controller configured to control the voltages of the first and second nodes on the basis of a gate start signal, and a switching unit connected to at least two gate lines adjacent to the output node, and configured to sequentially supply gate-on voltage pulses having different pulse widths to the at least two adjacent gate lines using the clock signal.

Abstract: A novel highly reliable display device is provided. Further, a novel display device capable of displaying images with less flicker is provided. Further, a display device capable of displaying eye-friendly still images is provided. The display device includes a feedthrough correction circuit which corrects a primary image signal. The feedthrough correction circuit corrects the primary image signal to compensate predicted feedthrough.

Abstract: A display apparatus includes first scan lines and second scan lines arranged along one direction on a substrate, data signal lines are arranged intersecting the one direction, and display pixels are selected by a scan line selection signal. A first display circuit is connected to the first scan lines using the scan line selection signal and sequentially supplying an image signal which is sequentially input to a pixel electrode. A second display circuit is connected to the second scan lines using the scan line selection signal and includes a holding circuit which holds the image signal and supplies a voltage in accordance with the signal held by the holding circuit to the pixel electrode. A mode switching circuit performs mode switching between an analog display mode and a digital display mode in accordance with a mode switching signal.

Abstract: A self-luminous display panel driving method for driving a self-luminous display panel of the active matrix driving type, includes the step of executing threshold value correction operation for a driving transistor divisionally in a plurality of periods within at least one of which, after a point of time of an end of a preceding correction period till a point of time of a start of a succeeding correction period, a potential to be applied to the drain electrode of the driving transistor is controlled to an intermediate potential between a first potential for lighting driving of the driving transistor and a second potential for initialization applied within a preparation period of the first one of the correction periods.

Abstract: A control panel for proximity and force sensing, includes a cover layer, a first electrode layer including a first force sensor electrode, a second force sensor electrode positioned in a second electrode layer or on a support layer, and a dielectric substrate at least a portion of which is compressible and is positioned between the first and second force sensor electrodes. The support layer is positioned to support at the vicinity of the second force sensor electrode support location so that compression of the dielectric substrate and the separation of the first and second force sensor electrodes depends on the magnitude of a force applied to the cover layer. Touch sensor electrodes are positioned on one or more of the electrode layers such that their capacitance depends on proximity of an object such as a finger. Controllers measure the capacitance of the force and touch sensor electrodes respectively and output force and touch proximity signals.

Abstract: A display device in which partial driving can be performed with a simplified configuration of a circuit including a wiring. One of signal processing circuits includes a first transistor that controls the potential of its respective gate signal line, and a second transistor that outputs a start signal for the subsequent stage and a reset signal for the preceding stage. A signal for controlling whether the gate signal line is in an active state (a state where a selection signal is output) or a non-active state (a state where a selection signal is not output or a non-selection signal continues to be output) is input to the first transistor. A clock signal is input to the second transistor. Thus, the number of wirings necessary for operating the device is reduced.

Abstract: According to one embodiment, a method of increasing a perceived resolution of a display includes directing light at a optical dithering element and repeatedly transitioning the optical dithering element from a first position to a second position and then back to the first position such that the mirror alternately reflects light to a first position on the display and then to a second position on the display. Each transition of the mirror includes controlling any overshoot or ringing in the position of the optical dithering element by providing a predetermined drive signal to the optical dithering element to smoothly accelerate and decelerate the element during the traverse between the first and second positions.

Abstract: In an example embodiment, a display apparatus includes a substrate having wiring lines formed by a conductor film including signal and scanning lines arranged in columns and rows, and a matrix of pixels, and includes a light-emitting material interposed between an anode and cathode electrode and a first and second uneven zone are between the anode electrode of the pixel and an adjacent pixel. The first uneven zone is formed on the substrate due to level differences resulting from the presence of the scanning lines. The second uneven zone is formed on the substrate also due to level differences resulting from the presence of the scanning lines. A pattern of the conductor film of which the wiring lines are made is formed so part of recessed portions of the first uneven zone are located behind their corresponding raised portions of the second uneven zone, as viewed from inside the pixel.

Abstract: A pixel circuit for an electroluminescent element with a first storage capacitor formed overlapping a data line and which comprises a section where a semiconductor thin film constituting the switching transistor or the reset transistor extends, an insulating film, and a metal layer which is connected to the data line as a first terminal. A first terminal of a switching transistor and a first terminal of a reset transistor are connected to the second terminal of the first storage capacitor. The second terminal of the switching transistor is connected to a driving transistor. A second storage capacitor connects the control terminal and the first terminal of the switching transistor. The electroluminescent element is connected to the second terminal of the driving transistor through a light emission controlling transistor.

Abstract: A liquid crystal display device includes a first switching element for supplying a data voltage to a pixel electrode during a first period, a second switching element for supplying a common voltage to an auxiliary electrode during the first period, a third switching element for supplying the data voltage to the auxiliary electrode during a second period subsequent to the first period, a common electrode to which the common voltage is supplied, a liquid crystal capacitor coupled between the pixel electrode and the common electrode, and a storage capacitor coupled between the pixel electrode and the auxiliary electrode. The voltage at the auxiliary electrode changes from the common voltage during the first period to the data voltage during the second period, and a voltage at the pixel electrode changes from the data voltage during the first period to an amplified data voltage during the second period.

Abstract: There is provided a decoder in which a matrix of transistors, a plurality of reference voltage signal lines arranged on a first interconnect layer and extended in a row direction, being separated to one another over the matrix, and a plurality of reference voltage signal lines arranged on a second interconnect layer and extended in the row direction, being separated to one another over the matrix. The reference voltage signal lines on the mutually different layers are respectively connected to impurity diffusion layers of the transistors that are adjacent in the row direction. The reference voltage signal lines on the mutually different layers are respectively connected to the impurity diffusion layers of the transistors that are adjacent in a column direction.

Abstract: The present invention discloses an array substrate. The data line repair structure of the array substrate includes repair line, control line and a plurality of switch elements. One end of each data line is connected to shorting bar during shorting bar test stage, and the other end is connected to the repair line through a switch element. The control terminal of switch element is connected to control line, input terminal is connected to one end of repair line and the output terminal is connected to a data line. The other end of the repair line is connected to shorting bar during shorting bar test stage. The present invention further discloses a PSVA liquid crystal display panel and manufacturing method thereof. As such, the present invention can improve PSVA process yield rate.

Abstract: Disclosed is a display device. The display device includes a plurality of MCC packages each including one source driver IC and one gate driver IC disposed on a film, a panel including a plurality of data lines connected to the source driver IC, a plurality of gate connection lines that are connected to the gate driver IC and disposed in parallel to the data lines, a plurality of gate lines that are disposed vertically to the gate connection lines and the data lines and connected to the gate connection lines, and a plurality of dummy lines disposed in parallel to the gate connection lines and between the data lines, and a timing controller configured to transfer image data and a plurality of control signals to at least one or more of the MCC packages.

Abstract: An organic light emitting diode (OLED) display includes: a substrate; a scan line formed on the substrate and that transfers a scan signal; a data line and a driving voltage line that intersect the scan line and that transfer a data signal and a driving voltage, respectively; a switching thin film transistor (TFT) connected to the scan line and the data line; a driving TFT connected to the switching TFT and the driving voltage line; an OLED connected to the driving TFT; a storage capacitor connected between the driving voltage line and a driving gate electrode of the driving TFT; and a boosting capacitor connected to the storage capacitor, wherein the storage capacitor has at least one capacitor opening.

Abstract: A stem wiring (13a) having a broad line width is formed above branch wirings (13b) having a narrow line width. In a region where the stem wiring (13a) is connected to the branch wiring (13b), the stem wiring (13a) overlaps with the branch wiring (13b) via a gate insulating film when seen in a plan view, a contact hole is provided in the gate insulating film so as to uncover the branch wiring (13b), and the stem wiring (13a) is electrically connected to the branch wiring (13b) via a connecting conductor formed in the contact hole. Consequently, a TFT array substrate can be achieved, in which a disconnection failure or an abnormal line width is reduced without enlarging the dimension of a driving circuit region.

Abstract: A gate driving circuit (60) separated into a plurality of stages (ST) is provided. In each of the stages (ST), TFT elements (T1) through (T4) are provided, branch lines (78) that connect clock lines (72, 74) to the TFT elements are provided. Junction lines (79A, 79B) are each extended from the branch line (78A) of interest to electrically connect the branch line (78A) of interest to the TFT elements (T2, T4) provided in the stage (ST(j)) different from the stage (ST (j?1)) where the TFT elements (T1, T3) connected to the branch line (78A) of interest are provided.

Abstract: The present disclosure relates to a field of displaying, and particularly to a gate driving circuit, an array substrate, and a display apparatus capable of ensuring that noise can be pulled down immediately once it occurs, and thus increasing a quality of picture and reliability of the display apparatus. The gate driving circuit includes a plurality of cascaded shift registers, wherein an output terminal of the shift register is further connected to two Thin Film Transistors TFTs, wherein sources of the two TFTs are both connected to the output terminal of the shift register, drains of the two TFTs are both connected to a first level signal line VSS, and gates of the two TFTs are input to different control signals respectively, thus ensuring that at least one TFT is turned on when the shift register outputs a switching-off voltage.

Abstract: A display panel includes a plurality of pixels positioned in the display area, a pixel driver connected with two or more of the plurality of pixels and configured to drive the connected pixels, and a plurality of signal lines configured to transfer signals to the pixel driver, in which at least one of the plurality of signal lines overlaps the pixel driver.

Abstract: A method for de-interlacing interlaced video includes receiving a first video field and a second video field, generating a first video frame by inserting the first video field in the first video frame on every second line of the first video frame, and by inserting a first synthesized video field on the lines of the first video frame not populated by the first video field. The video data of the first synthesized video field is based on video data of the first and second video fields. A second video frame is generated by inserting the second video field in the first video frame on every second line of the second video frame and by inserting a second synthesized video field on the lines of the second video frame not populated by the second video field. Two de-interlaced video frames are output for every received interlaced video frame.

Abstract: A pixel circuit of a display panel, a method of driving the pixel circuit, and an organic light emitting display device including the display panel. All of a plurality of transistors included in the pixel circuit are NMOS transistors, and the pixel circuit configured to compensate for a voltage change at a source electrode of a driving transistor during light emission.

Abstract: A drive circuit is disclosed. The drive circuit includes a first p-typed thin film transistor (PTFT), a second PTFT, a first n-typed thin film transistor (NTFT), a second NTFT and a capacitor. The drain of the first PTFT is coupled to a first electrical line, and the gate thereof is coupled to a first clock line. The drain of the second PTFT is coupled to a second clock line, and the source thereof is coupled to an output. The source of the first NTFT is coupled to a second electrical line, and the gate thereof is couple to an output of a preceding drive circuit. The source of the second NTFT is couple to a third electrical line, the gate thereof is coupled to a third clock line, and the drain thereof is coupled to the output. The capacitor has one end coupled to the second electrical line, while the other end is coupled to the source of the first PTFT, the drain of the first NTFT and the gate of the second PTFT.

Abstract: An apparatus may include a device and an image projection system configured to form an image on a surface viewable by a user. The image projection circuit may be configured to receive signals from the device, generate a pattern representative of data, process the pattern into a mirror image of the image, and project the mirror image from the device. The image projection system may include an electro optic system for generating the pattern, and an optics system for projecting the mirror image onto the surface. A method for projecting data may include providing the device with the image, and providing the image to the surface with the image projection system. The method may also include manipulating the device and/or a body part to locate and focus the image, sensing an orientation of the device, and orienting the image based, at least in part, on the sensing step.

Abstract: Disclosed herein is a display device that allows a vertical scanning line to be shared between a plurality of rows without increasing the number of control lines or control signals, the display device including pixel circuits; vertical scanning lines; and horizontal scanning lines.

Abstract: In a display apparatus including a switching transistor, a correction voltage for eliminating an effect of a variation in a characteristic of a driving transistor is stored in a storage capacitor. The switching transistor is disposed between one current terminal of the driving transistor and a light emitting element. The switching transistor turns off during the non-light emission period thereby to electrically disconnect the light emitting element from the one current terminal of the driving transistor thereby preventing a leakage current from flowing through the light emitting element during the period in which the correction unit operates, and thus preventing the correction voltage from having an error due to the leakage current.

Abstract: A driving circuit including a timing control part, a driving voltage generating part, a voltage modifying part, and a slope control part. The voltage modifying part is configured to modify the gate-on voltage to a swing-on signal based on the kickback control signal, the swing-on signal including a slicing part, the slicing part including a falling portion during which a level of the swing-on signal falls from the first high level to a second high level lower than the first high level, and a rising portion during which the level of the swing-on signal rises from the second high level to the first high level. The slope control part is configured to decrease a slew rate of the rising portion in the swing-on signal and to output the swing-on signal decreased the slew rate of the rising portion as a gate-on signal.

Abstract: A network-connectable projector having a first CPU that executes a web application program stored in a first memory, and a second CPU that controls a working state of the projector, based on working state information stored in a second memory. The second CPU obtains the working state information from the second memory, and transfers the information to the first CPU. The first CPU distributes the web page information including the working state information received from the second CPU to the web client upon receipt of the request from the web client. The first CPU makes the second CPU control the working state of the projector, based on control information that is sent back from the web client and is related to performance control of the projector.

Abstract: According to an embodiment of the present invention, there is provided a display that includes a pixel array part having a plurality of pixel circuits that are arranged in a matrix and each have at least one transistor of which conduction state is controlled through reception of a drive signal to a control terminal, and a scanner including a plurality of buffers that are formed of transistors. The buffers correspond to a pixel arrangement and output a drive signal to the control terminals of the transistors included in the pixel circuits. The transistors in the pixel circuits and the transistors in the buffers are formed through irradiation with laser light that is moved for scanning in a predetermined direction and has a predetermined wavelength. The transistors in the buffers are formed in such a way that the channel length direction of the transistors is set parallel to the scan direction of the laser light.

Abstract: A functional, primary display means comprises a number of first, small pixel elements and comprises or communicates with image generating means for generation of a high resolution miniature image. A main display means comprises a dielectric material which is transparent to radio-, and/or millimeter waves and/or microwaves and comprises a number of second, passive, pixel elements substantially corresponding to, and considerably larger than, the first pixel elements. Each first pixel element is connected to a second pixel element by an optical transmission means for transfer of optical image information. The main display means is adapted to visually represent the transferred optical information as an enlarged image and receiving/transmitting means for communication of radio-, millimeter wave or microwave signals are arranged in or on the main display means such that reception/transmission can take place substantially independently of the optical representation.

Abstract: Each pixel of the organic light-emitting display apparatus comprises a plurality of sub-pixels by using an organic light-emitting transistor (OLET). The OLET includes a plurality of gate electrodes that have different areas and are arranged adjacent to one another, a plurality of source electrodes and a plurality of drain electrodes, and an organic thin film layer disposed between or below the source electrodes and drain electrodes, the organic thin film layer including an organic light-emitting material, wherein the sub-pixels of the pixel selected by a scan signal are selectively turned-on/off by a data signal to represent a gradation.

Abstract: In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

Abstract: The present invention provides the simple operation for displaying the information that is expected to be necessary for the user and the simplified procedure of the hands-free operation when displaying the map information on the screen. The display device 20 in which an arrangement state of the screen can be selected between a first state and a second state displays on the screen the detailed information of a destination or its surrounding area such as parking lot information, an access route guide to the transportation facilities, and information of the facility of the destination is displayed on the screen if a change of the arrangement of the screen is detected, if the destination has been set in advance, and if a distance between a current position and the destination is within a predetermined distance.

Abstract: A pixel circuitry for a display apparatus is provided herein. The pixel circuitry includes a first storage element, and a switching element composed of a plurality of switches. The first storage element has a first terminal receiving a pixel signal and a second terminal coupled to a first voltage. The first storage element is used for storing the pixel signal. The switching element includes a first switch and a second switch respectively conducted in response to a first signal and a second signal. Each of the first switch and the second switch has an input terminal coupled to a data line and an output terminal coupled to the first storage element. The cooperation of the first switch and the second switch has benefit of delivering the pixel signal without influence of body effect.

Abstract: This disclosure provides systems, methods and apparatus for glass via bars that can be used in compact three-dimensional packages, including package-on-packages (PoPs). The glass via bars can provide high density electrical interconnections in the PoPs. In some implementations, the glass via bars can include integrated passive components. Packaging methods employing glass via bars are also provided.

Abstract: A display device in which partial driving can be performed with a simplified configuration of a circuit including a wiring. One of signal processing circuits includes a first transistor that controls the potential of its respective gate signal line, and a second transistor that outputs a start signal for the subsequent stage and a reset signal for the preceding stage. A signal for controlling whether the gate signal line is in an active state (a state where a selection signal is output) or a non-active state (a state where a selection signal is not output or a non-selection signal continues to be output) is input to the first transistor. A clock signal is input to the second transistor. Thus, the number of wirings necessary for operating the device is reduced.